From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-12.5 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,HEADER_FROM_DIFFERENT_DOMAINS,MAILING_LIST_MULTI, MENTIONS_GIT_HOSTING,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id BB3E3C4338F for ; Wed, 28 Jul 2021 17:48:17 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 87A3860BD3 for ; Wed, 28 Jul 2021 17:48:17 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.4.1 mail.kernel.org 87A3860BD3 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=arm.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=lists.infradead.org DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-Id:Date:Subject:Cc:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=yBlet4pfC8gMoO5GM8gtXfyr336ctADEWsb6pgJMJRs=; b=rSGS4JZP5YR5GH Lt0bJsTN0NZ5N+oWHSsIqvPC7bTgiF4UTBSo0EGvNzgwpB3nzvzURdRn0yNW5IDA0LsVD5MqVKUXZ e9qrcof0OJ5IiyZaH8JNw7Iz+hH9lEv/olmKmYjPf1fBQRSrjIzWpfyqLjvYx8Gw56qdVHXC8PSwv Xblepih47GaHmvkThJPCIOm2azz0jnhn3K5WkcUKkcCQCN18mUsf7+I4lnnm/++j+sr9wXC0JdPvi dRl3GWWWv1X3S0UZSfWiDD6LgkldYaoX/KJZ8li24RDtTVIQejuXZrDaejmx7h060bNuMDhe589e8 ICkoTWdKiPNM/ihKAf0g==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1m8ndq-001srH-Lf; Wed, 28 Jul 2021 17:46:50 +0000 Received: from mail.kernel.org ([198.145.29.99]) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1m8ndV-001spd-Dn for linux-arm-kernel@lists.infradead.org; Wed, 28 Jul 2021 17:46:30 +0000 Received: by mail.kernel.org (Postfix) with ESMTPSA id 8B6F861052; Wed, 28 Jul 2021 17:46:27 +0000 (UTC) From: Catalin Marinas To: Vincenzo Frascino , Peter Collingbourne , Will Deacon , Andrey Konovalov Cc: Greg Kroah-Hartman , Szabolcs Nagy , linux-arm-kernel@lists.infradead.org, Tejas Belagod , Evgenii Stepanov Subject: Re: [PATCH v5] arm64: avoid double ISB on kernel entry Date: Wed, 28 Jul 2021 18:46:17 +0100 Message-Id: <162749406642.26134.3898491024786322912.b4-ty@arm.com> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20210727205439.2557419-1-pcc@google.com> References: <20210727205439.2557419-1-pcc@google.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20210728_104629_549546_0E3A4CCF X-CRM114-Status: GOOD ( 11.09 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On Tue, 27 Jul 2021 13:54:39 -0700, Peter Collingbourne wrote: > Although an ISB is required in order to make the MTE-related system > register update to GCR_EL1 effective, and the same is true for > PAC-related updates to SCTLR_EL1 or APIAKey{Hi,Lo}_EL1, we issue two > ISBs on machines that support both features while we only need to > issue one. To avoid the unnecessary additional ISB, remove the ISBs > from the PAC and MTE-specific alternative blocks and add a couple > of additional blocks that cause us to only execute one ISB if both > features are supported. Applied to arm64 (for-next/mte). It still conflicted, so please check that the result is fine. Thanks! [1/1] arm64: avoid double ISB on kernel entry https://git.kernel.org/arm64/c/d914b80a8f56 -- Catalin _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel