From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-17.3 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER, INCLUDES_PATCH,MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,UNPARSEABLE_RELAY, USER_AGENT_SANE_2 autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 53E49C432BE for ; Thu, 29 Jul 2021 06:41:50 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 32C526103A for ; Thu, 29 Jul 2021 06:41:50 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S234303AbhG2Glv (ORCPT ); Thu, 29 Jul 2021 02:41:51 -0400 Received: from mailgw01.mediatek.com ([60.244.123.138]:50178 "EHLO mailgw01.mediatek.com" rhost-flags-OK-FAIL-OK-FAIL) by vger.kernel.org with ESMTP id S234079AbhG2Glu (ORCPT ); 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Thu, 29 Jul 2021 14:41:42 +0800 Message-ID: <1627540902.13818.3.camel@mhfsdcap03> Subject: Re: [PATCH v2 11/11] memory: mtk-smi: mt8195: Add initial setting for smi-larb From: Yong Wu To: Ikjoon Jang CC: Krzysztof Kozlowski , Rob Herring , Matthias Brugger , "Krzysztof Kozlowski" , Joerg Roedel , Will Deacon , Robin Murphy , Tomasz Figa , "moderated list:ARM/Mediatek SoC support" , srv_heupstream , open list , "open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS" , "moderated list:ARM/Mediatek SoC support" , Date: Thu, 29 Jul 2021 14:41:42 +0800 In-Reply-To: <1626935902.27875.7.camel@mhfsdcap03> References: <20210715121209.31024-1-yong.wu@mediatek.com> <20210715121209.31024-12-yong.wu@mediatek.com> <1626935902.27875.7.camel@mhfsdcap03> Content-Type: text/plain; charset="UTF-8" X-Mailer: Evolution 3.10.4-0ubuntu2 MIME-Version: 1.0 X-MTK: N Content-Transfer-Encoding: base64 Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org SGkgSWtqb29uLA0KDQpKdXN0IGEgcGluZy4NCg0KT24gVGh1LCAyMDIxLTA3LTIyIGF0IDE0OjM4 ICswODAwLCBZb25nIFd1IHdyb3RlOg0KPiBPbiBXZWQsIDIwMjEtMDctMjEgYXQgMjE6NDAgKzA4 MDAsIElram9vbiBKYW5nIHdyb3RlOg0KPiA+IE9uIFRodSwgSnVsIDE1LCAyMDIxIGF0IDg6MjMg UE0gWW9uZyBXdSA8eW9uZy53dUBtZWRpYXRlay5jb20+IHdyb3RlOg0KPiA+ID4NCj4gPiA+IFRv IGltcHJvdmUgdGhlIHBlcmZvcm1hbmNlLCBXZSBhZGQgc29tZSBpbml0aWFsIHNldHRpbmcgZm9y IHNtaSBsYXJicy4NCj4gPiA+IHRoZXJlIGFyZSB0d28gcGFydDoNCj4gPiA+IDEpLCBFYWNoIHBv cnQgaGFzIHRoZSBzcGVjaWFsIG9zdGQob3V0c3RhbmRpbmcpIHZhbHVlIGluIGVhY2ggbGFyYi4N Cj4gPiA+IDIpLCBUd28gZ2VuZXJhbCBzZXR0aW5nIGZvciBlYWNoIGxhcmIuDQo+ID4gPg0KPiA+ ID4gSW4gc29tZSBTb0MsIHRoaXMgc2V0dGluZyBtYXliZSBjaGFuZ2VkIGR5bmFtaWNhbGx5IGZv ciBzb21lIHNwZWNpYWwgY2FzZQ0KPiA+ID4gbGlrZSA0SywgYW5kIHRoaXMgaW5pdGlhbCBzZXR0 aW5nIGlzIGVub3VnaCBpbiBtdDgxOTUuDQo+ID4gPg0KPiA+ID4gU2lnbmVkLW9mZi1ieTogWW9u ZyBXdSA8eW9uZy53dUBtZWRpYXRlay5jb20+DQo+ID4gPiAtLS0NCj4gWy4uLl0NCj4gPiA+ICBz dHJ1Y3QgbXRrX3NtaSB7DQo+ID4gPiBAQCAtMjEzLDEyICsyMjgsMjIgQEAgc3RhdGljIHZvaWQg bXRrX3NtaV9sYXJiX2NvbmZpZ19wb3J0X210ODE3MyhzdHJ1Y3QgZGV2aWNlICpkZXYpDQo+ID4g PiAgc3RhdGljIHZvaWQgbXRrX3NtaV9sYXJiX2NvbmZpZ19wb3J0X2dlbjJfZ2VuZXJhbChzdHJ1 Y3QgZGV2aWNlICpkZXYpDQo+ID4gPiAgew0KPiA+ID4gICAgICAgICBzdHJ1Y3QgbXRrX3NtaV9s YXJiICpsYXJiID0gZGV2X2dldF9kcnZkYXRhKGRldik7DQo+ID4gPiAtICAgICAgIHUzMiByZWc7 DQo+ID4gPiArICAgICAgIHUzMiByZWcsIGZsYWdzX2dlbmVyYWwgPSBsYXJiLT5sYXJiX2dlbi0+ ZmxhZ3NfZ2VuZXJhbDsNCj4gPiA+ICsgICAgICAgY29uc3QgdTggKmxhcmJvc3RkID0gbGFyYi0+ bGFyYl9nZW4tPm9zdGRbbGFyYi0+bGFyYmlkXTsNCj4gPiA+ICAgICAgICAgaW50IGk7DQo+ID4g Pg0KPiA+ID4gICAgICAgICBpZiAoQklUKGxhcmItPmxhcmJpZCkgJiBsYXJiLT5sYXJiX2dlbi0+ bGFyYl9kaXJlY3RfdG9fY29tbW9uX21hc2spDQo+ID4gPiAgICAgICAgICAgICAgICAgcmV0dXJu Ow0KPiA+ID4NCj4gPiA+ICsgICAgICAgaWYgKE1US19TTUlfQ0FQUyhmbGFnc19nZW5lcmFsLCBN VEtfU01JX0ZMQUdfTEFSQl9USFJUX0VOKSkNCj4gPiA+ICsgICAgICAgICAgICAgICB3cml0ZWxf cmVsYXhlZChTTUlfTEFSQl9USFJUX0VOLCBsYXJiLT5iYXNlICsgU01JX0xBUkJfQ01EX1RIUlRf Q09OKTsNCj4gPiA+ICsNCj4gPiA+ICsgICAgICAgaWYgKE1US19TTUlfQ0FQUyhmbGFnc19nZW5l cmFsLCBNVEtfU01JX0ZMQUdfTEFSQl9TV19GTEFHKSkNCj4gPiA+ICsgICAgICAgICAgICAgICB3 cml0ZWxfcmVsYXhlZChTTUlfTEFSQl9TV19GTEFHXzEsIGxhcmItPmJhc2UgKyBTTUlfTEFSQl9T V19GTEFHKTsNCj4gPiA+ICsNCj4gPiA+ICsgICAgICAgZm9yIChpID0gMDsgaSA8IFNNSV9MQVJC X1BPUlRfTlJfTUFYICYmIGxhcmJvc3RkICYmICEhbGFyYm9zdGRbaV07IGkrKykNCj4gPiA+ICsg ICAgICAgICAgICAgICB3cml0ZWxfcmVsYXhlZChsYXJib3N0ZFtpXSwgbGFyYi0+YmFzZSArIFNN SV9MQVJCX09TVERMX1BPUlR4KGkpKTsNCj4gPiANCj4gPiBBbGwgb3RoZXIgbXRrIHBsYXRmb3Jt J3MgbGFyYnMgaGF2ZSB0aGUgc2FtZSBmb3JtYXQgZm9yIFNNSV9MQVJCX09TVERMX1BPUlR4KCkN Cj4gPiByZWdpc3RlcnMgYXQgdGhlIHNhbWUgb2Zmc2V0PyBvciBpcyB0aGlzIHVuaXF1ZSBmZWF0 dXJlIGZvciBtdDgxOTU/DQo+IA0KPiBBbGwgdGhlIG90aGVyIFBsYXRmb3JtJ3MgbGFyYnMgaGF2 ZSB0aGUgc2FtZSBmb3JtYXQgYXQgdGhlIHNhbWUgb2Zmc2V0Lg0KDQpJbiB0aGlzIGNhc2UsIERv IHlvdSBoYXZlIHNvbWUgb3RoZXIgZnVydGhlciBjb21tZW50PyBJZiBubywgSSB3aWxsIGtlZXAN CnRoZSBjdXJyZW50IHNvbHV0aW9uIGZvciB0aGlzLg0KDQpUaGFua3MuDQoNCj4gDQo+ID4gDQo+ ID4gPiArDQo+ID4gPiAgICAgICAgIGZvcl9lYWNoX3NldF9iaXQoaSwgKHVuc2lnbmVkIGxvbmcg KilsYXJiLT5tbXUsIDMyKSB7DQo+ID4gPiAgICAgICAgICAgICAgICAgcmVnID0gcmVhZGxfcmVs YXhlZChsYXJiLT5iYXNlICsgU01JX0xBUkJfTk9OU0VDX0NPTihpKSk7DQo+ID4gPiAgICAgICAg ICAgICAgICAgcmVnIHw9IEZfTU1VX0VOOw0KPiA+ID4gQEAgLTIyNyw2ICsyNTIsNTEgQEAgc3Rh dGljIHZvaWQgbXRrX3NtaV9sYXJiX2NvbmZpZ19wb3J0X2dlbjJfZ2VuZXJhbChzdHJ1Y3QgZGV2 aWNlICpkZXYpDQo+ID4gPiAgICAgICAgIH0NCj4gPiA+ICB9DQo+ID4gPg0KPiANCj4gWy4uLl0N Cj4gDQoNCg== From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-15.1 required=3.0 tests=BAYES_00,DKIM_INVALID, DKIM_SIGNED,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,UNPARSEABLE_RELAY,URIBL_BLOCKED, USER_AGENT_SANE_2 autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 29208C4338F for ; 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Thu, 29 Jul 2021 14:41:42 +0800 Message-ID: <1627540902.13818.3.camel@mhfsdcap03> Subject: Re: [PATCH v2 11/11] memory: mtk-smi: mt8195: Add initial setting for smi-larb From: Yong Wu To: Ikjoon Jang Date: Thu, 29 Jul 2021 14:41:42 +0800 In-Reply-To: <1626935902.27875.7.camel@mhfsdcap03> References: <20210715121209.31024-1-yong.wu@mediatek.com> <20210715121209.31024-12-yong.wu@mediatek.com> <1626935902.27875.7.camel@mhfsdcap03> X-Mailer: Evolution 3.10.4-0ubuntu2 MIME-Version: 1.0 X-MTK: N Cc: "open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS" , srv_heupstream , Krzysztof Kozlowski , Robin Murphy , open list , Krzysztof Kozlowski , iommu@lists.linux-foundation.org, Rob Herring , "moderated list:ARM/Mediatek SoC support" , Matthias Brugger , Will Deacon , "moderated list:ARM/Mediatek SoC support" X-BeenThere: iommu@lists.linux-foundation.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: Development issues for Linux IOMMU support List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Errors-To: iommu-bounces@lists.linux-foundation.org Sender: "iommu" Hi Ikjoon, Just a ping. On Thu, 2021-07-22 at 14:38 +0800, Yong Wu wrote: > On Wed, 2021-07-21 at 21:40 +0800, Ikjoon Jang wrote: > > On Thu, Jul 15, 2021 at 8:23 PM Yong Wu wrote: > > > > > > To improve the performance, We add some initial setting for smi larbs. > > > there are two part: > > > 1), Each port has the special ostd(outstanding) value in each larb. > > > 2), Two general setting for each larb. > > > > > > In some SoC, this setting maybe changed dynamically for some special case > > > like 4K, and this initial setting is enough in mt8195. > > > > > > Signed-off-by: Yong Wu > > > --- > [...] > > > struct mtk_smi { > > > @@ -213,12 +228,22 @@ static void mtk_smi_larb_config_port_mt8173(struct device *dev) > > > static void mtk_smi_larb_config_port_gen2_general(struct device *dev) > > > { > > > struct mtk_smi_larb *larb = dev_get_drvdata(dev); > > > - u32 reg; > > > + u32 reg, flags_general = larb->larb_gen->flags_general; > > > + const u8 *larbostd = larb->larb_gen->ostd[larb->larbid]; > > > int i; > > > > > > if (BIT(larb->larbid) & larb->larb_gen->larb_direct_to_common_mask) > > > return; > > > > > > + if (MTK_SMI_CAPS(flags_general, MTK_SMI_FLAG_LARB_THRT_EN)) > > > + writel_relaxed(SMI_LARB_THRT_EN, larb->base + SMI_LARB_CMD_THRT_CON); > > > + > > > + if (MTK_SMI_CAPS(flags_general, MTK_SMI_FLAG_LARB_SW_FLAG)) > > > + writel_relaxed(SMI_LARB_SW_FLAG_1, larb->base + SMI_LARB_SW_FLAG); > > > + > > > + for (i = 0; i < SMI_LARB_PORT_NR_MAX && larbostd && !!larbostd[i]; i++) > > > + writel_relaxed(larbostd[i], larb->base + SMI_LARB_OSTDL_PORTx(i)); > > > > All other mtk platform's larbs have the same format for SMI_LARB_OSTDL_PORTx() > > registers at the same offset? or is this unique feature for mt8195? > > All the other Platform's larbs have the same format at the same offset. In this case, Do you have some other further comment? If no, I will keep the current solution for this. Thanks. > > > > > > + > > > for_each_set_bit(i, (unsigned long *)larb->mmu, 32) { > > > reg = readl_relaxed(larb->base + SMI_LARB_NONSEC_CON(i)); > > > reg |= F_MMU_EN; > > > @@ -227,6 +252,51 @@ static void mtk_smi_larb_config_port_gen2_general(struct device *dev) > > > } > > > } > > > > > [...] > _______________________________________________ iommu mailing list iommu@lists.linux-foundation.org https://lists.linuxfoundation.org/mailman/listinfo/iommu From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.0 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER, INCLUDES_PATCH,MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,UNPARSEABLE_RELAY, URIBL_BLOCKED,USER_AGENT_SANE_2 autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id C1EDEC4338F for ; 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Thu, 29 Jul 2021 14:41:42 +0800 Message-ID: <1627540902.13818.3.camel@mhfsdcap03> Subject: Re: [PATCH v2 11/11] memory: mtk-smi: mt8195: Add initial setting for smi-larb From: Yong Wu To: Ikjoon Jang CC: Krzysztof Kozlowski , Rob Herring , Matthias Brugger , "Krzysztof Kozlowski" , Joerg Roedel , Will Deacon , Robin Murphy , Tomasz Figa , "moderated list:ARM/Mediatek SoC support" , srv_heupstream , open list , "open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS" , "moderated list:ARM/Mediatek SoC support" , Date: Thu, 29 Jul 2021 14:41:42 +0800 In-Reply-To: <1626935902.27875.7.camel@mhfsdcap03> References: <20210715121209.31024-1-yong.wu@mediatek.com> <20210715121209.31024-12-yong.wu@mediatek.com> <1626935902.27875.7.camel@mhfsdcap03> X-Mailer: Evolution 3.10.4-0ubuntu2 MIME-Version: 1.0 X-MTK: N X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20210728_234150_469152_797A08E3 X-CRM114-Status: GOOD ( 23.24 ) X-BeenThere: linux-mediatek@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "Linux-mediatek" Errors-To: linux-mediatek-bounces+linux-mediatek=archiver.kernel.org@lists.infradead.org Hi Ikjoon, Just a ping. On Thu, 2021-07-22 at 14:38 +0800, Yong Wu wrote: > On Wed, 2021-07-21 at 21:40 +0800, Ikjoon Jang wrote: > > On Thu, Jul 15, 2021 at 8:23 PM Yong Wu wrote: > > > > > > To improve the performance, We add some initial setting for smi larbs. > > > there are two part: > > > 1), Each port has the special ostd(outstanding) value in each larb. > > > 2), Two general setting for each larb. > > > > > > In some SoC, this setting maybe changed dynamically for some special case > > > like 4K, and this initial setting is enough in mt8195. > > > > > > Signed-off-by: Yong Wu > > > --- > [...] > > > struct mtk_smi { > > > @@ -213,12 +228,22 @@ static void mtk_smi_larb_config_port_mt8173(struct device *dev) > > > static void mtk_smi_larb_config_port_gen2_general(struct device *dev) > > > { > > > struct mtk_smi_larb *larb = dev_get_drvdata(dev); > > > - u32 reg; > > > + u32 reg, flags_general = larb->larb_gen->flags_general; > > > + const u8 *larbostd = larb->larb_gen->ostd[larb->larbid]; > > > int i; > > > > > > if (BIT(larb->larbid) & larb->larb_gen->larb_direct_to_common_mask) > > > return; > > > > > > + if (MTK_SMI_CAPS(flags_general, MTK_SMI_FLAG_LARB_THRT_EN)) > > > + writel_relaxed(SMI_LARB_THRT_EN, larb->base + SMI_LARB_CMD_THRT_CON); > > > + > > > + if (MTK_SMI_CAPS(flags_general, MTK_SMI_FLAG_LARB_SW_FLAG)) > > > + writel_relaxed(SMI_LARB_SW_FLAG_1, larb->base + SMI_LARB_SW_FLAG); > > > + > > > + for (i = 0; i < SMI_LARB_PORT_NR_MAX && larbostd && !!larbostd[i]; i++) > > > + writel_relaxed(larbostd[i], larb->base + SMI_LARB_OSTDL_PORTx(i)); > > > > All other mtk platform's larbs have the same format for SMI_LARB_OSTDL_PORTx() > > registers at the same offset? or is this unique feature for mt8195? > > All the other Platform's larbs have the same format at the same offset. In this case, Do you have some other further comment? If no, I will keep the current solution for this. Thanks. > > > > > > + > > > for_each_set_bit(i, (unsigned long *)larb->mmu, 32) { > > > reg = readl_relaxed(larb->base + SMI_LARB_NONSEC_CON(i)); > > > reg |= F_MMU_EN; > > > @@ -227,6 +252,51 @@ static void mtk_smi_larb_config_port_gen2_general(struct device *dev) > > > } > > > } > > > > > [...] > _______________________________________________ Linux-mediatek mailing list Linux-mediatek@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-mediatek From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.0 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER, INCLUDES_PATCH,MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,UNPARSEABLE_RELAY, URIBL_BLOCKED,USER_AGENT_SANE_2 autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 85E96C4338F for ; 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Thu, 29 Jul 2021 14:41:42 +0800 Message-ID: <1627540902.13818.3.camel@mhfsdcap03> Subject: Re: [PATCH v2 11/11] memory: mtk-smi: mt8195: Add initial setting for smi-larb From: Yong Wu To: Ikjoon Jang CC: Krzysztof Kozlowski , Rob Herring , Matthias Brugger , "Krzysztof Kozlowski" , Joerg Roedel , Will Deacon , Robin Murphy , Tomasz Figa , "moderated list:ARM/Mediatek SoC support" , srv_heupstream , open list , "open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS" , "moderated list:ARM/Mediatek SoC support" , Date: Thu, 29 Jul 2021 14:41:42 +0800 In-Reply-To: <1626935902.27875.7.camel@mhfsdcap03> References: <20210715121209.31024-1-yong.wu@mediatek.com> <20210715121209.31024-12-yong.wu@mediatek.com> <1626935902.27875.7.camel@mhfsdcap03> X-Mailer: Evolution 3.10.4-0ubuntu2 MIME-Version: 1.0 X-MTK: N X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20210728_234150_469152_797A08E3 X-CRM114-Status: GOOD ( 23.24 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Hi Ikjoon, Just a ping. On Thu, 2021-07-22 at 14:38 +0800, Yong Wu wrote: > On Wed, 2021-07-21 at 21:40 +0800, Ikjoon Jang wrote: > > On Thu, Jul 15, 2021 at 8:23 PM Yong Wu wrote: > > > > > > To improve the performance, We add some initial setting for smi larbs. > > > there are two part: > > > 1), Each port has the special ostd(outstanding) value in each larb. > > > 2), Two general setting for each larb. > > > > > > In some SoC, this setting maybe changed dynamically for some special case > > > like 4K, and this initial setting is enough in mt8195. > > > > > > Signed-off-by: Yong Wu > > > --- > [...] > > > struct mtk_smi { > > > @@ -213,12 +228,22 @@ static void mtk_smi_larb_config_port_mt8173(struct device *dev) > > > static void mtk_smi_larb_config_port_gen2_general(struct device *dev) > > > { > > > struct mtk_smi_larb *larb = dev_get_drvdata(dev); > > > - u32 reg; > > > + u32 reg, flags_general = larb->larb_gen->flags_general; > > > + const u8 *larbostd = larb->larb_gen->ostd[larb->larbid]; > > > int i; > > > > > > if (BIT(larb->larbid) & larb->larb_gen->larb_direct_to_common_mask) > > > return; > > > > > > + if (MTK_SMI_CAPS(flags_general, MTK_SMI_FLAG_LARB_THRT_EN)) > > > + writel_relaxed(SMI_LARB_THRT_EN, larb->base + SMI_LARB_CMD_THRT_CON); > > > + > > > + if (MTK_SMI_CAPS(flags_general, MTK_SMI_FLAG_LARB_SW_FLAG)) > > > + writel_relaxed(SMI_LARB_SW_FLAG_1, larb->base + SMI_LARB_SW_FLAG); > > > + > > > + for (i = 0; i < SMI_LARB_PORT_NR_MAX && larbostd && !!larbostd[i]; i++) > > > + writel_relaxed(larbostd[i], larb->base + SMI_LARB_OSTDL_PORTx(i)); > > > > All other mtk platform's larbs have the same format for SMI_LARB_OSTDL_PORTx() > > registers at the same offset? or is this unique feature for mt8195? > > All the other Platform's larbs have the same format at the same offset. In this case, Do you have some other further comment? If no, I will keep the current solution for this. Thanks. > > > > > > + > > > for_each_set_bit(i, (unsigned long *)larb->mmu, 32) { > > > reg = readl_relaxed(larb->base + SMI_LARB_NONSEC_CON(i)); > > > reg |= F_MMU_EN; > > > @@ -227,6 +252,51 @@ static void mtk_smi_larb_config_port_gen2_general(struct device *dev) > > > } > > > } > > > > > [...] > _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel