From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-17.2 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER, INCLUDES_PATCH,MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,UNPARSEABLE_RELAY, URIBL_BLOCKED,USER_AGENT_SANE_2 autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 2900EC432BE for ; Mon, 2 Aug 2021 07:07:30 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 0AB7560E97 for ; Mon, 2 Aug 2021 07:07:30 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232456AbhHBHHh (ORCPT ); Mon, 2 Aug 2021 03:07:37 -0400 Received: from mailgw01.mediatek.com ([60.244.123.138]:58432 "EHLO mailgw01.mediatek.com" rhost-flags-OK-FAIL-OK-FAIL) by vger.kernel.org with ESMTP id S229500AbhHBHHg (ORCPT ); Mon, 2 Aug 2021 03:07:36 -0400 X-UUID: 63fb95fb88ef46a9a61516fd821c764e-20210802 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=mediatek.com; s=dk; h=Content-Transfer-Encoding:MIME-Version:Content-Type:References:In-Reply-To:Date:CC:To:From:Subject:Message-ID; bh=21ZQL0O+AYNYOVFc0STZ7qW2KMKVaTPFPt6AU1g4ZHY=; b=WX6FnVSFJdUXjVhxXqOCRqwFQMaxZI7xH8q6uVRPDecNMKc8lNp+iGETgUqb/ZyFIE/O1EIFMttw7fS6uLyrQ2EcmRuLfnSrXhc3C2TfcQ6/C3ogCIisvzPSISmKORffyO0id1ZmeqbF8/dl3sRb3MOGcKzSdHF5FEfLtS8jHqE=; X-UUID: 63fb95fb88ef46a9a61516fd821c764e-20210802 Received: from mtkcas10.mediatek.inc [(172.21.101.39)] by mailgw01.mediatek.com (envelope-from ) (Generic MTA with TLSv1.2 ECDHE-RSA-AES256-SHA384 256/256) with ESMTP id 17423531; Mon, 02 Aug 2021 15:07:24 +0800 Received: from MTKCAS06.mediatek.inc (172.21.101.30) by mtkmbs06n1.mediatek.inc (172.21.101.129) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Mon, 2 Aug 2021 15:07:23 +0800 Received: from [10.17.3.153] (10.17.3.153) by MTKCAS06.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.0.1497.2 via Frontend Transport; Mon, 2 Aug 2021 15:07:22 +0800 Message-ID: <1627888042.1118.2.camel@mhfsdcap03> Subject: Re: [PATCH v11 2/4] PCI: mediatek: Add new method to get shared pcie-cfg base address and parse node From: Chuanjia Liu To: , Bjorn Helgaas , "Matthias Brugger" , Lorenzo Pieralisi CC: , , , Frank Wunderlich , , , , , , Date: Mon, 2 Aug 2021 15:07:22 +0800 In-Reply-To: <20210719073456.28666-3-chuanjia.liu@mediatek.com> References: <20210719073456.28666-1-chuanjia.liu@mediatek.com> <20210719073456.28666-3-chuanjia.liu@mediatek.com> Content-Type: text/plain; charset="UTF-8" X-Mailer: Evolution 3.10.4-0ubuntu2 MIME-Version: 1.0 X-MTK: N Content-Transfer-Encoding: base64 Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org T24gTW9uLCAyMDIxLTA3LTE5IGF0IDE1OjM0ICswODAwLCBDaHVhbmppYSBMaXUgd3JvdGU6DQoN CkdlbnRseSBwaW5nLi4uDQo+IEZvciB0aGUgbmV3IGR0cyBmb3JtYXQsIGFkZCBhIG5ldyBtZXRo b2QgdG8gZ2V0DQo+IHNoYXJlZCBwY2llLWNmZyBiYXNlIGFkZHJlc3MgYW5kIHBhcnNlIG5vZGUu DQo+IA0KPiBTaWduZWQtb2ZmLWJ5OiBDaHVhbmppYSBMaXUgPGNodWFuamlhLmxpdUBtZWRpYXRl ay5jb20+DQo+IEFja2VkLWJ5OiBSeWRlciBMZWUgPHJ5ZGVyLmxlZUBtZWRpYXRlay5jb20+DQo+ IC0tLQ0KPiAgZHJpdmVycy9wY2kvY29udHJvbGxlci9wY2llLW1lZGlhdGVrLmMgfCA1MiArKysr KysrKysrKysrKysrKysrLS0tLS0tLQ0KPiAgMSBmaWxlIGNoYW5nZWQsIDM5IGluc2VydGlvbnMo KyksIDEzIGRlbGV0aW9ucygtKQ0KPiANCj4gZGlmZiAtLWdpdCBhL2RyaXZlcnMvcGNpL2NvbnRy b2xsZXIvcGNpZS1tZWRpYXRlay5jIGIvZHJpdmVycy9wY2kvY29udHJvbGxlci9wY2llLW1lZGlh dGVrLmMNCj4gaW5kZXggMjViZWU2OTM4MzRmLi45MjhlMDk4M2E5MDAgMTAwNjQ0DQo+IC0tLSBh L2RyaXZlcnMvcGNpL2NvbnRyb2xsZXIvcGNpZS1tZWRpYXRlay5jDQo+ICsrKyBiL2RyaXZlcnMv cGNpL2NvbnRyb2xsZXIvcGNpZS1tZWRpYXRlay5jDQo+IEBAIC0xNCw2ICsxNCw3IEBADQo+ICAj aW5jbHVkZSA8bGludXgvaXJxY2hpcC9jaGFpbmVkX2lycS5oPg0KPiAgI2luY2x1ZGUgPGxpbnV4 L2lycWRvbWFpbi5oPg0KPiAgI2luY2x1ZGUgPGxpbnV4L2tlcm5lbC5oPg0KPiArI2luY2x1ZGUg PGxpbnV4L21mZC9zeXNjb24uaD4NCj4gICNpbmNsdWRlIDxsaW51eC9tc2kuaD4NCj4gICNpbmNs dWRlIDxsaW51eC9tb2R1bGUuaD4NCj4gICNpbmNsdWRlIDxsaW51eC9vZl9hZGRyZXNzLmg+DQo+ IEBAIC0yMyw2ICsyNCw3IEBADQo+ICAjaW5jbHVkZSA8bGludXgvcGh5L3BoeS5oPg0KPiAgI2lu Y2x1ZGUgPGxpbnV4L3BsYXRmb3JtX2RldmljZS5oPg0KPiAgI2luY2x1ZGUgPGxpbnV4L3BtX3J1 bnRpbWUuaD4NCj4gKyNpbmNsdWRlIDxsaW51eC9yZWdtYXAuaD4NCj4gICNpbmNsdWRlIDxsaW51 eC9yZXNldC5oPg0KPiAgDQo+ICAjaW5jbHVkZSAiLi4vcGNpLmgiDQo+IEBAIC0yMDcsNiArMjA5 LDcgQEAgc3RydWN0IG10a19wY2llX3BvcnQgew0KPiAgICogc3RydWN0IG10a19wY2llIC0gUENJ ZSBob3N0IGluZm9ybWF0aW9uDQo+ICAgKiBAZGV2OiBwb2ludGVyIHRvIFBDSWUgZGV2aWNlDQo+ ICAgKiBAYmFzZTogSU8gbWFwcGVkIHJlZ2lzdGVyIGJhc2UNCj4gKyAqIEBjZmc6IElPIG1hcHBl ZCByZWdpc3RlciBtYXAgZm9yIFBDSWUgY29uZmlnDQo+ICAgKiBAZnJlZV9jazogZnJlZS1ydW4g cmVmZXJlbmNlIGNsb2NrDQo+ICAgKiBAbWVtOiBub24tcHJlZmV0Y2hhYmxlIG1lbW9yeSByZXNv dXJjZQ0KPiAgICogQHBvcnRzOiBwb2ludGVyIHRvIFBDSWUgcG9ydCBpbmZvcm1hdGlvbg0KPiBA QCAtMjE1LDYgKzIxOCw3IEBAIHN0cnVjdCBtdGtfcGNpZV9wb3J0IHsNCj4gIHN0cnVjdCBtdGtf cGNpZSB7DQo+ICAJc3RydWN0IGRldmljZSAqZGV2Ow0KPiAgCXZvaWQgX19pb21lbSAqYmFzZTsN Cj4gKwlzdHJ1Y3QgcmVnbWFwICpjZmc7DQo+ICAJc3RydWN0IGNsayAqZnJlZV9jazsNCj4gIA0K PiAgCXN0cnVjdCBsaXN0X2hlYWQgcG9ydHM7DQo+IEBAIC02NTAsNyArNjU0LDExIEBAIHN0YXRp YyBpbnQgbXRrX3BjaWVfc2V0dXBfaXJxKHN0cnVjdCBtdGtfcGNpZV9wb3J0ICpwb3J0LA0KPiAg CQlyZXR1cm4gZXJyOw0KPiAgCX0NCj4gIA0KPiAtCXBvcnQtPmlycSA9IHBsYXRmb3JtX2dldF9p cnEocGRldiwgcG9ydC0+c2xvdCk7DQo+ICsJaWYgKG9mX2ZpbmRfcHJvcGVydHkoZGV2LT5vZl9u b2RlLCAiaW50ZXJydXB0LW5hbWVzIiwgTlVMTCkpDQo+ICsJCXBvcnQtPmlycSA9IHBsYXRmb3Jt X2dldF9pcnFfYnluYW1lKHBkZXYsICJwY2llX2lycSIpOw0KPiArCWVsc2UNCj4gKwkJcG9ydC0+ aXJxID0gcGxhdGZvcm1fZ2V0X2lycShwZGV2LCBwb3J0LT5zbG90KTsNCj4gKw0KPiAgCWlmIChw b3J0LT5pcnEgPCAwKQ0KPiAgCQlyZXR1cm4gcG9ydC0+aXJxOw0KPiAgDQo+IEBAIC02ODIsNiAr NjkwLDEwIEBAIHN0YXRpYyBpbnQgbXRrX3BjaWVfc3RhcnR1cF9wb3J0X3YyKHN0cnVjdCBtdGtf cGNpZV9wb3J0ICpwb3J0KQ0KPiAgCQl2YWwgfD0gUENJRV9DU1JfTFRTU01fRU4ocG9ydC0+c2xv dCkgfA0KPiAgCQkgICAgICAgUENJRV9DU1JfQVNQTV9MMV9FTihwb3J0LT5zbG90KTsNCj4gIAkJ d3JpdGVsKHZhbCwgcGNpZS0+YmFzZSArIFBDSUVfU1lTX0NGR19WMik7DQo+ICsJfSBlbHNlIGlm IChwY2llLT5jZmcpIHsNCj4gKwkJdmFsID0gUENJRV9DU1JfTFRTU01fRU4ocG9ydC0+c2xvdCkg fA0KPiArCQkgICAgICBQQ0lFX0NTUl9BU1BNX0wxX0VOKHBvcnQtPnNsb3QpOw0KPiArCQlyZWdt YXBfdXBkYXRlX2JpdHMocGNpZS0+Y2ZnLCBQQ0lFX1NZU19DRkdfVjIsIHZhbCwgdmFsKTsNCj4g IAl9DQo+ICANCj4gIAkvKiBBc3NlcnQgYWxsIHJlc2V0IHNpZ25hbHMgKi8NCj4gQEAgLTk4NSw2 ICs5OTcsNyBAQCBzdGF0aWMgaW50IG10a19wY2llX3N1YnN5c19wb3dlcnVwKHN0cnVjdCBtdGtf cGNpZSAqcGNpZSkNCj4gIAlzdHJ1Y3QgZGV2aWNlICpkZXYgPSBwY2llLT5kZXY7DQo+ICAJc3Ry dWN0IHBsYXRmb3JtX2RldmljZSAqcGRldiA9IHRvX3BsYXRmb3JtX2RldmljZShkZXYpOw0KPiAg CXN0cnVjdCByZXNvdXJjZSAqcmVnczsNCj4gKwlzdHJ1Y3QgZGV2aWNlX25vZGUgKmNmZ19ub2Rl Ow0KPiAgCWludCBlcnI7DQo+ICANCj4gIAkvKiBnZXQgc2hhcmVkIHJlZ2lzdGVycywgd2hpY2gg YXJlIG9wdGlvbmFsICovDQo+IEBAIC05OTUsNiArMTAwOCwxNCBAQCBzdGF0aWMgaW50IG10a19w Y2llX3N1YnN5c19wb3dlcnVwKHN0cnVjdCBtdGtfcGNpZSAqcGNpZSkNCj4gIAkJCXJldHVybiBQ VFJfRVJSKHBjaWUtPmJhc2UpOw0KPiAgCX0NCj4gIA0KPiArCWNmZ19ub2RlID0gb2ZfZmluZF9j b21wYXRpYmxlX25vZGUoTlVMTCwgTlVMTCwNCj4gKwkJCQkJICAgIm1lZGlhdGVrLGdlbmVyaWMt cGNpZWNmZyIpOw0KPiArCWlmIChjZmdfbm9kZSkgew0KPiArCQlwY2llLT5jZmcgPSBzeXNjb25f bm9kZV90b19yZWdtYXAoY2ZnX25vZGUpOw0KPiArCQlpZiAoSVNfRVJSKHBjaWUtPmNmZykpDQo+ ICsJCQlyZXR1cm4gUFRSX0VSUihwY2llLT5jZmcpOw0KPiArCX0NCj4gKw0KPiAgCXBjaWUtPmZy ZWVfY2sgPSBkZXZtX2Nsa19nZXQoZGV2LCAiZnJlZV9jayIpOw0KPiAgCWlmIChJU19FUlIocGNp ZS0+ZnJlZV9jaykpIHsNCj4gIAkJaWYgKFBUUl9FUlIocGNpZS0+ZnJlZV9jaykgPT0gLUVQUk9C RV9ERUZFUikNCj4gQEAgLTEwMjcsMjIgKzEwNDgsMjcgQEAgc3RhdGljIGludCBtdGtfcGNpZV9z ZXR1cChzdHJ1Y3QgbXRrX3BjaWUgKnBjaWUpDQo+ICAJc3RydWN0IGRldmljZSAqZGV2ID0gcGNp ZS0+ZGV2Ow0KPiAgCXN0cnVjdCBkZXZpY2Vfbm9kZSAqbm9kZSA9IGRldi0+b2Zfbm9kZSwgKmNo aWxkOw0KPiAgCXN0cnVjdCBtdGtfcGNpZV9wb3J0ICpwb3J0LCAqdG1wOw0KPiAtCWludCBlcnI7 DQo+ICsJaW50IGVyciwgc2xvdDsNCj4gKw0KPiArCXNsb3QgPSBvZl9nZXRfcGNpX2RvbWFpbl9u cihkZXYtPm9mX25vZGUpOw0KPiArCWlmIChzbG90IDwgMCkgew0KPiArCQlmb3JfZWFjaF9hdmFp bGFibGVfY2hpbGRfb2Zfbm9kZShub2RlLCBjaGlsZCkgew0KPiArCQkJZXJyID0gb2ZfcGNpX2dl dF9kZXZmbihjaGlsZCk7DQo+ICsJCQlpZiAoZXJyIDwgMCkgew0KPiArCQkJCWRldl9lcnIoZGV2 LCAiZmFpbGVkIHRvIGdldCBkZXZmbjogJWRcbiIsIGVycik7DQo+ICsJCQkJZ290byBlcnJvcl9w dXRfbm9kZTsNCj4gKwkJCX0NCj4gIA0KPiAtCWZvcl9lYWNoX2F2YWlsYWJsZV9jaGlsZF9vZl9u b2RlKG5vZGUsIGNoaWxkKSB7DQo+IC0JCWludCBzbG90Ow0KPiArCQkJc2xvdCA9IFBDSV9TTE9U KGVycik7DQo+ICANCj4gLQkJZXJyID0gb2ZfcGNpX2dldF9kZXZmbihjaGlsZCk7DQo+IC0JCWlm IChlcnIgPCAwKSB7DQo+IC0JCQlkZXZfZXJyKGRldiwgImZhaWxlZCB0byBwYXJzZSBkZXZmbjog JWRcbiIsIGVycik7DQo+IC0JCQlnb3RvIGVycm9yX3B1dF9ub2RlOw0KPiArCQkJZXJyID0gbXRr X3BjaWVfcGFyc2VfcG9ydChwY2llLCBjaGlsZCwgc2xvdCk7DQo+ICsJCQlpZiAoZXJyKQ0KPiAr CQkJCWdvdG8gZXJyb3JfcHV0X25vZGU7DQo+ICAJCX0NCj4gLQ0KPiAtCQlzbG90ID0gUENJX1NM T1QoZXJyKTsNCj4gLQ0KPiAtCQllcnIgPSBtdGtfcGNpZV9wYXJzZV9wb3J0KHBjaWUsIGNoaWxk LCBzbG90KTsNCj4gKwl9IGVsc2Ugew0KPiArCQllcnIgPSBtdGtfcGNpZV9wYXJzZV9wb3J0KHBj aWUsIG5vZGUsIHNsb3QpOw0KPiAgCQlpZiAoZXJyKQ0KPiAtCQkJZ290byBlcnJvcl9wdXRfbm9k ZTsNCj4gKwkJCXJldHVybiBlcnI7DQo+ICAJfQ0KPiAgDQo+ICAJZXJyID0gbXRrX3BjaWVfc3Vi c3lzX3Bvd2VydXAocGNpZSk7DQoNCg== From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-15.9 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER, INCLUDES_PATCH,MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,UNPARSEABLE_RELAY, URIBL_BLOCKED,USER_AGENT_SANE_2 autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id C367CC4320A for ; Mon, 2 Aug 2021 07:09:02 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 8145F60F58 for ; Mon, 2 Aug 2021 07:09:02 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.4.1 mail.kernel.org 8145F60F58 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=mediatek.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=lists.infradead.org DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Date:CC:To:From:Subject:Message-ID:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=w9v638aesdvlsRd5hlQqcT1cQBlKJMlgArDtuB0JE2w=; b=ESMMQKrynE6aq7 nAjHKMtRyYDAh4f8i4jdvYCLlvhRlSnH2ZiF5grhjjs+jWUtKYpM50dbh8zqtGGQy0q2Uhv2HB2Mm 2Bn42UCRPltS3SbKsqrGM8D3qhnzAIkw6JS2LHyxz1wB/jURFF59QPaAdF/BUZQY89HjEyaKorBF6 nFk1QfFJpWqw1EB2U7Sb0n4msA235WkTWk6n6XJxwjGQwUwFLI4PN19CY5TyZpHXLZ/QcIEmJ6K34 edcXBT7M+6DLYrfU2DNQ5V9ixISIdCx0PPUQf+qCmN1q8awTjB78hEwBo23K2qb8DFqUNxMhiFgiv lAmrJ7PBA/cTWbqxQuFQ==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1mAS44-00FEje-IN; Mon, 02 Aug 2021 07:08:44 +0000 Received: from mailgw02.mediatek.com ([216.200.240.185]) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1mAS40-00FEic-QA; Mon, 02 Aug 2021 07:08:43 +0000 X-UUID: d3d95e50291e414bbe719599a538be74-20210802 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=mediatek.com; s=dk; h=Content-Transfer-Encoding:MIME-Version:Content-Type:References:In-Reply-To:Date:CC:To:From:Subject:Message-ID; bh=21ZQL0O+AYNYOVFc0STZ7qW2KMKVaTPFPt6AU1g4ZHY=; b=WX6FnVSFJdUXjVhxXqOCRqwFQMaxZI7xH8q6uVRPDecNMKc8lNp+iGETgUqb/ZyFIE/O1EIFMttw7fS6uLyrQ2EcmRuLfnSrXhc3C2TfcQ6/C3ogCIisvzPSISmKORffyO0id1ZmeqbF8/dl3sRb3MOGcKzSdHF5FEfLtS8jHqE=; X-UUID: d3d95e50291e414bbe719599a538be74-20210802 Received: from mtkcas66.mediatek.inc [(172.29.193.44)] by mailgw02.mediatek.com (envelope-from ) (musrelay.mediatek.com ESMTP with TLSv1.2 ECDHE-RSA-AES256-SHA384 256/256) with ESMTP id 20501569; Mon, 02 Aug 2021 00:08:30 -0700 Received: from MTKMBS06N1.mediatek.inc (172.21.101.129) by MTKMBS62N1.mediatek.inc (172.29.193.41) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Mon, 2 Aug 2021 00:07:24 -0700 Received: from MTKCAS06.mediatek.inc (172.21.101.30) by mtkmbs06n1.mediatek.inc (172.21.101.129) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Mon, 2 Aug 2021 15:07:23 +0800 Received: from [10.17.3.153] (10.17.3.153) by MTKCAS06.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.0.1497.2 via Frontend Transport; Mon, 2 Aug 2021 15:07:22 +0800 Message-ID: <1627888042.1118.2.camel@mhfsdcap03> Subject: Re: [PATCH v11 2/4] PCI: mediatek: Add new method to get shared pcie-cfg base address and parse node From: Chuanjia Liu To: , Bjorn Helgaas , "Matthias Brugger" , Lorenzo Pieralisi CC: , , , Frank Wunderlich , , , , , , Date: Mon, 2 Aug 2021 15:07:22 +0800 In-Reply-To: <20210719073456.28666-3-chuanjia.liu@mediatek.com> References: <20210719073456.28666-1-chuanjia.liu@mediatek.com> <20210719073456.28666-3-chuanjia.liu@mediatek.com> X-Mailer: Evolution 3.10.4-0ubuntu2 MIME-Version: 1.0 X-MTK: N X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20210802_000840_895305_93B83FC2 X-CRM114-Status: GOOD ( 24.14 ) X-BeenThere: linux-mediatek@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "Linux-mediatek" Errors-To: linux-mediatek-bounces+linux-mediatek=archiver.kernel.org@lists.infradead.org On Mon, 2021-07-19 at 15:34 +0800, Chuanjia Liu wrote: Gently ping... > For the new dts format, add a new method to get > shared pcie-cfg base address and parse node. > > Signed-off-by: Chuanjia Liu > Acked-by: Ryder Lee > --- > drivers/pci/controller/pcie-mediatek.c | 52 +++++++++++++++++++------- > 1 file changed, 39 insertions(+), 13 deletions(-) > > diff --git a/drivers/pci/controller/pcie-mediatek.c b/drivers/pci/controller/pcie-mediatek.c > index 25bee693834f..928e0983a900 100644 > --- a/drivers/pci/controller/pcie-mediatek.c > +++ b/drivers/pci/controller/pcie-mediatek.c > @@ -14,6 +14,7 @@ > #include > #include > #include > +#include > #include > #include > #include > @@ -23,6 +24,7 @@ > #include > #include > #include > +#include > #include > > #include "../pci.h" > @@ -207,6 +209,7 @@ struct mtk_pcie_port { > * struct mtk_pcie - PCIe host information > * @dev: pointer to PCIe device > * @base: IO mapped register base > + * @cfg: IO mapped register map for PCIe config > * @free_ck: free-run reference clock > * @mem: non-prefetchable memory resource > * @ports: pointer to PCIe port information > @@ -215,6 +218,7 @@ struct mtk_pcie_port { > struct mtk_pcie { > struct device *dev; > void __iomem *base; > + struct regmap *cfg; > struct clk *free_ck; > > struct list_head ports; > @@ -650,7 +654,11 @@ static int mtk_pcie_setup_irq(struct mtk_pcie_port *port, > return err; > } > > - port->irq = platform_get_irq(pdev, port->slot); > + if (of_find_property(dev->of_node, "interrupt-names", NULL)) > + port->irq = platform_get_irq_byname(pdev, "pcie_irq"); > + else > + port->irq = platform_get_irq(pdev, port->slot); > + > if (port->irq < 0) > return port->irq; > > @@ -682,6 +690,10 @@ static int mtk_pcie_startup_port_v2(struct mtk_pcie_port *port) > val |= PCIE_CSR_LTSSM_EN(port->slot) | > PCIE_CSR_ASPM_L1_EN(port->slot); > writel(val, pcie->base + PCIE_SYS_CFG_V2); > + } else if (pcie->cfg) { > + val = PCIE_CSR_LTSSM_EN(port->slot) | > + PCIE_CSR_ASPM_L1_EN(port->slot); > + regmap_update_bits(pcie->cfg, PCIE_SYS_CFG_V2, val, val); > } > > /* Assert all reset signals */ > @@ -985,6 +997,7 @@ static int mtk_pcie_subsys_powerup(struct mtk_pcie *pcie) > struct device *dev = pcie->dev; > struct platform_device *pdev = to_platform_device(dev); > struct resource *regs; > + struct device_node *cfg_node; > int err; > > /* get shared registers, which are optional */ > @@ -995,6 +1008,14 @@ static int mtk_pcie_subsys_powerup(struct mtk_pcie *pcie) > return PTR_ERR(pcie->base); > } > > + cfg_node = of_find_compatible_node(NULL, NULL, > + "mediatek,generic-pciecfg"); > + if (cfg_node) { > + pcie->cfg = syscon_node_to_regmap(cfg_node); > + if (IS_ERR(pcie->cfg)) > + return PTR_ERR(pcie->cfg); > + } > + > pcie->free_ck = devm_clk_get(dev, "free_ck"); > if (IS_ERR(pcie->free_ck)) { > if (PTR_ERR(pcie->free_ck) == -EPROBE_DEFER) > @@ -1027,22 +1048,27 @@ static int mtk_pcie_setup(struct mtk_pcie *pcie) > struct device *dev = pcie->dev; > struct device_node *node = dev->of_node, *child; > struct mtk_pcie_port *port, *tmp; > - int err; > + int err, slot; > + > + slot = of_get_pci_domain_nr(dev->of_node); > + if (slot < 0) { > + for_each_available_child_of_node(node, child) { > + err = of_pci_get_devfn(child); > + if (err < 0) { > + dev_err(dev, "failed to get devfn: %d\n", err); > + goto error_put_node; > + } > > - for_each_available_child_of_node(node, child) { > - int slot; > + slot = PCI_SLOT(err); > > - err = of_pci_get_devfn(child); > - if (err < 0) { > - dev_err(dev, "failed to parse devfn: %d\n", err); > - goto error_put_node; > + err = mtk_pcie_parse_port(pcie, child, slot); > + if (err) > + goto error_put_node; > } > - > - slot = PCI_SLOT(err); > - > - err = mtk_pcie_parse_port(pcie, child, slot); > + } else { > + err = mtk_pcie_parse_port(pcie, node, slot); > if (err) > - goto error_put_node; > + return err; > } > > err = mtk_pcie_subsys_powerup(pcie); _______________________________________________ Linux-mediatek mailing list Linux-mediatek@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-mediatek From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-15.9 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER, INCLUDES_PATCH,MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,UNPARSEABLE_RELAY, URIBL_BLOCKED,USER_AGENT_SANE_2 autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 57B4CC4338F for ; Mon, 2 Aug 2021 07:10:54 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 088C960E97 for ; Mon, 2 Aug 2021 07:10:54 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.4.1 mail.kernel.org 088C960E97 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=mediatek.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=lists.infradead.org DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Date:CC:To:From:Subject:Message-ID:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=5e6dJZ30xhR7tWXNbJCEkvezn2l9186mi7cUf3TVPrc=; b=qki7qa/ROnoyoh V3jKCiDms/1YkB0S8eamH8m3vBUC3c9Nhtv3RMO7+HxyQU7ReiT6IF6F3lFB7ya6ClNm1JryWT8Bn +v8lyAB7dPz4AG2Sem/cX3ssYa/++l4zV9wEV0xLq6jcKG1DovgB1zz6ELvYR+gfHm4k6D7XJ3ILU Hz0PhTyyzGGeip1ODqMw0SQd7xNmczcV7LUllpepqPqLxLmaXv/rww2LbcgsATtoVcSmNDyi+hnge 1YmlGT8/0kscR8CpExOBriTLBpr+RJR9adW768IoMnJTk5xaYURVVVznAPB7kMJaZ7j5F6mCpX3SO anWRclId8MDtv19nFk3Q==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1mAS46-00FEjm-Bj; Mon, 02 Aug 2021 07:08:46 +0000 Received: from mailgw02.mediatek.com ([216.200.240.185]) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1mAS40-00FEic-QA; Mon, 02 Aug 2021 07:08:43 +0000 X-UUID: d3d95e50291e414bbe719599a538be74-20210802 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=mediatek.com; s=dk; h=Content-Transfer-Encoding:MIME-Version:Content-Type:References:In-Reply-To:Date:CC:To:From:Subject:Message-ID; bh=21ZQL0O+AYNYOVFc0STZ7qW2KMKVaTPFPt6AU1g4ZHY=; b=WX6FnVSFJdUXjVhxXqOCRqwFQMaxZI7xH8q6uVRPDecNMKc8lNp+iGETgUqb/ZyFIE/O1EIFMttw7fS6uLyrQ2EcmRuLfnSrXhc3C2TfcQ6/C3ogCIisvzPSISmKORffyO0id1ZmeqbF8/dl3sRb3MOGcKzSdHF5FEfLtS8jHqE=; X-UUID: d3d95e50291e414bbe719599a538be74-20210802 Received: from mtkcas66.mediatek.inc [(172.29.193.44)] by mailgw02.mediatek.com (envelope-from ) (musrelay.mediatek.com ESMTP with TLSv1.2 ECDHE-RSA-AES256-SHA384 256/256) with ESMTP id 20501569; Mon, 02 Aug 2021 00:08:30 -0700 Received: from MTKMBS06N1.mediatek.inc (172.21.101.129) by MTKMBS62N1.mediatek.inc (172.29.193.41) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Mon, 2 Aug 2021 00:07:24 -0700 Received: from MTKCAS06.mediatek.inc (172.21.101.30) by mtkmbs06n1.mediatek.inc (172.21.101.129) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Mon, 2 Aug 2021 15:07:23 +0800 Received: from [10.17.3.153] (10.17.3.153) by MTKCAS06.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.0.1497.2 via Frontend Transport; Mon, 2 Aug 2021 15:07:22 +0800 Message-ID: <1627888042.1118.2.camel@mhfsdcap03> Subject: Re: [PATCH v11 2/4] PCI: mediatek: Add new method to get shared pcie-cfg base address and parse node From: Chuanjia Liu To: , Bjorn Helgaas , "Matthias Brugger" , Lorenzo Pieralisi CC: , , , Frank Wunderlich , , , , , , Date: Mon, 2 Aug 2021 15:07:22 +0800 In-Reply-To: <20210719073456.28666-3-chuanjia.liu@mediatek.com> References: <20210719073456.28666-1-chuanjia.liu@mediatek.com> <20210719073456.28666-3-chuanjia.liu@mediatek.com> X-Mailer: Evolution 3.10.4-0ubuntu2 MIME-Version: 1.0 X-MTK: N X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20210802_000840_895305_93B83FC2 X-CRM114-Status: GOOD ( 24.14 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On Mon, 2021-07-19 at 15:34 +0800, Chuanjia Liu wrote: Gently ping... > For the new dts format, add a new method to get > shared pcie-cfg base address and parse node. > > Signed-off-by: Chuanjia Liu > Acked-by: Ryder Lee > --- > drivers/pci/controller/pcie-mediatek.c | 52 +++++++++++++++++++------- > 1 file changed, 39 insertions(+), 13 deletions(-) > > diff --git a/drivers/pci/controller/pcie-mediatek.c b/drivers/pci/controller/pcie-mediatek.c > index 25bee693834f..928e0983a900 100644 > --- a/drivers/pci/controller/pcie-mediatek.c > +++ b/drivers/pci/controller/pcie-mediatek.c > @@ -14,6 +14,7 @@ > #include > #include > #include > +#include > #include > #include > #include > @@ -23,6 +24,7 @@ > #include > #include > #include > +#include > #include > > #include "../pci.h" > @@ -207,6 +209,7 @@ struct mtk_pcie_port { > * struct mtk_pcie - PCIe host information > * @dev: pointer to PCIe device > * @base: IO mapped register base > + * @cfg: IO mapped register map for PCIe config > * @free_ck: free-run reference clock > * @mem: non-prefetchable memory resource > * @ports: pointer to PCIe port information > @@ -215,6 +218,7 @@ struct mtk_pcie_port { > struct mtk_pcie { > struct device *dev; > void __iomem *base; > + struct regmap *cfg; > struct clk *free_ck; > > struct list_head ports; > @@ -650,7 +654,11 @@ static int mtk_pcie_setup_irq(struct mtk_pcie_port *port, > return err; > } > > - port->irq = platform_get_irq(pdev, port->slot); > + if (of_find_property(dev->of_node, "interrupt-names", NULL)) > + port->irq = platform_get_irq_byname(pdev, "pcie_irq"); > + else > + port->irq = platform_get_irq(pdev, port->slot); > + > if (port->irq < 0) > return port->irq; > > @@ -682,6 +690,10 @@ static int mtk_pcie_startup_port_v2(struct mtk_pcie_port *port) > val |= PCIE_CSR_LTSSM_EN(port->slot) | > PCIE_CSR_ASPM_L1_EN(port->slot); > writel(val, pcie->base + PCIE_SYS_CFG_V2); > + } else if (pcie->cfg) { > + val = PCIE_CSR_LTSSM_EN(port->slot) | > + PCIE_CSR_ASPM_L1_EN(port->slot); > + regmap_update_bits(pcie->cfg, PCIE_SYS_CFG_V2, val, val); > } > > /* Assert all reset signals */ > @@ -985,6 +997,7 @@ static int mtk_pcie_subsys_powerup(struct mtk_pcie *pcie) > struct device *dev = pcie->dev; > struct platform_device *pdev = to_platform_device(dev); > struct resource *regs; > + struct device_node *cfg_node; > int err; > > /* get shared registers, which are optional */ > @@ -995,6 +1008,14 @@ static int mtk_pcie_subsys_powerup(struct mtk_pcie *pcie) > return PTR_ERR(pcie->base); > } > > + cfg_node = of_find_compatible_node(NULL, NULL, > + "mediatek,generic-pciecfg"); > + if (cfg_node) { > + pcie->cfg = syscon_node_to_regmap(cfg_node); > + if (IS_ERR(pcie->cfg)) > + return PTR_ERR(pcie->cfg); > + } > + > pcie->free_ck = devm_clk_get(dev, "free_ck"); > if (IS_ERR(pcie->free_ck)) { > if (PTR_ERR(pcie->free_ck) == -EPROBE_DEFER) > @@ -1027,22 +1048,27 @@ static int mtk_pcie_setup(struct mtk_pcie *pcie) > struct device *dev = pcie->dev; > struct device_node *node = dev->of_node, *child; > struct mtk_pcie_port *port, *tmp; > - int err; > + int err, slot; > + > + slot = of_get_pci_domain_nr(dev->of_node); > + if (slot < 0) { > + for_each_available_child_of_node(node, child) { > + err = of_pci_get_devfn(child); > + if (err < 0) { > + dev_err(dev, "failed to get devfn: %d\n", err); > + goto error_put_node; > + } > > - for_each_available_child_of_node(node, child) { > - int slot; > + slot = PCI_SLOT(err); > > - err = of_pci_get_devfn(child); > - if (err < 0) { > - dev_err(dev, "failed to parse devfn: %d\n", err); > - goto error_put_node; > + err = mtk_pcie_parse_port(pcie, child, slot); > + if (err) > + goto error_put_node; > } > - > - slot = PCI_SLOT(err); > - > - err = mtk_pcie_parse_port(pcie, child, slot); > + } else { > + err = mtk_pcie_parse_port(pcie, node, slot); > if (err) > - goto error_put_node; > + return err; > } > > err = mtk_pcie_subsys_powerup(pcie); _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel