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From: Ye Li <ye.li@nxp.com>
To: sbabic@denx.de, u-boot@lists.denx.de, festevam@gmail.com,
	peng.fan@nxp.com
Cc: uboot-imx@nxp.com, marex@denx.de, rfried.dev@gmail.com,
	s.arendt@sensopart.de
Subject: [PATCH 3/7] arm: dts: imx8mp-evk: Enable the EQoS ethernet port
Date: Mon, 16 Aug 2021 18:44:28 +0800	[thread overview]
Message-ID: <1629110672-28374-3-git-send-email-ye.li@nxp.com> (raw)
In-Reply-To: <1629110672-28374-1-git-send-email-ye.li@nxp.com>

i.MX8MP EVK has two ethernet ports. Add relevant nodes and properties
for EQoS port to the EVK DTS file.
In -u-boot.dtsi, change the u-boot eqos compatible string, add PHY
reset gpio and remove assigned clocks as not supported in CCF.

Signed-off-by: Ye Li <ye.li@nxp.com>
---
 arch/arm/dts/imx8mp-evk-u-boot.dtsi | 13 ++++++++++++
 arch/arm/dts/imx8mp-evk.dts         | 40 +++++++++++++++++++++++++++++++++++++
 2 files changed, 53 insertions(+)

diff --git a/arch/arm/dts/imx8mp-evk-u-boot.dtsi b/arch/arm/dts/imx8mp-evk-u-boot.dtsi
index 2abcf1f..ab849eb 100644
--- a/arch/arm/dts/imx8mp-evk-u-boot.dtsi
+++ b/arch/arm/dts/imx8mp-evk-u-boot.dtsi
@@ -111,6 +111,19 @@
 	u-boot,dm-spl;
 };
 
+&eqos {
+	compatible = "fsl,imx-eqos";
+	/delete-property/ assigned-clocks;
+	/delete-property/ assigned-clock-parents;
+	/delete-property/ assigned-clock-rates;
+};
+
+&ethphy0 {
+	reset-gpios = <&gpio4 22 GPIO_ACTIVE_LOW>;
+	reset-delay-us = <15000>;
+	reset-post-delay-us = <100000>;
+};
+
 &fec {
 	phy-reset-gpios = <&gpio4 2 GPIO_ACTIVE_LOW>;
 	phy-reset-duration = <15>;
diff --git a/arch/arm/dts/imx8mp-evk.dts b/arch/arm/dts/imx8mp-evk.dts
index b10dce8..f846d69 100644
--- a/arch/arm/dts/imx8mp-evk.dts
+++ b/arch/arm/dts/imx8mp-evk.dts
@@ -74,6 +74,26 @@
 	status = "okay";
 };
 
+&eqos {
+	pinctrl-names = "default";
+	pinctrl-0 = <&pinctrl_eqos>;
+	phy-mode = "rgmii-id";
+	phy-handle = <&ethphy0>;
+	status = "okay";
+
+	mdio {
+		compatible = "snps,dwmac-mdio";
+		#address-cells = <1>;
+		#size-cells = <0>;
+
+		ethphy0: ethernet-phy@1 {
+			compatible = "ethernet-phy-ieee802.3-c22";
+			reg = <1>;
+			eee-broken-1000t;
+		};
+	};
+};
+
 &flexcan2 {
 	pinctrl-names = "default";
 	pinctrl-0 = <&pinctrl_flexcan2>;
@@ -160,6 +180,26 @@
 };
 
 &iomuxc {
+	pinctrl_eqos: eqosgrp {
+		fsl,pins = <
+			MX8MP_IOMUXC_ENET_MDC__ENET_QOS_MDC	0x3
+			MX8MP_IOMUXC_ENET_MDIO__ENET_QOS_MDIO	0x3
+			MX8MP_IOMUXC_ENET_RD0__ENET_QOS_RGMII_RD0	0x91
+			MX8MP_IOMUXC_ENET_RD1__ENET_QOS_RGMII_RD1	0x91
+			MX8MP_IOMUXC_ENET_RD2__ENET_QOS_RGMII_RD2	0x91
+			MX8MP_IOMUXC_ENET_RD3__ENET_QOS_RGMII_RD3	0x91
+			MX8MP_IOMUXC_ENET_RXC__CCM_ENET_QOS_CLOCK_GENERATE_RX_CLK	0x91
+			MX8MP_IOMUXC_ENET_RX_CTL__ENET_QOS_RGMII_RX_CTL	0x91
+			MX8MP_IOMUXC_ENET_TD0__ENET_QOS_RGMII_TD0		0x1f
+			MX8MP_IOMUXC_ENET_TD1__ENET_QOS_RGMII_TD1		0x1f
+			MX8MP_IOMUXC_ENET_TD2__ENET_QOS_RGMII_TD2		0x1f
+			MX8MP_IOMUXC_ENET_TD3__ENET_QOS_RGMII_TD3		0x1f
+			MX8MP_IOMUXC_ENET_TX_CTL__ENET_QOS_RGMII_TX_CTL	0x1f
+			MX8MP_IOMUXC_ENET_TXC__CCM_ENET_QOS_CLOCK_GENERATE_TX_CLK	0x1f
+			MX8MP_IOMUXC_SAI2_RXC__GPIO4_IO22		0x19
+		>;
+	};
+
 	pinctrl_fec: fecgrp {
 		fsl,pins = <
 			MX8MP_IOMUXC_SAI1_RXD2__ENET1_MDC		0x3
-- 
2.7.4


  parent reply	other threads:[~2021-08-16 10:45 UTC|newest]

Thread overview: 15+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-08-16 10:44 [PATCH 1/7] arm: mach-imx: Update MAC fuse for i.MX8MP Ye Li
2021-08-16 10:44 ` [PATCH 2/7] arm: mach-imx: Allow to build mac.c for EQoS driver Ye Li
2021-10-21 14:13   ` sbabic
2021-08-16 10:44 ` Ye Li [this message]
2021-10-21 14:12   ` [PATCH 3/7] arm: dts: imx8mp-evk: Enable the EQoS ethernet port sbabic
2021-08-16 10:44 ` [PATCH 4/7] imx8mp_evk: Fix incorrect cascade for FEC and EQOS setup Ye Li
2021-10-21 14:12   ` sbabic
2021-08-16 10:44 ` [PATCH 5/7] imx8mp_evk: Remove EQoS PHY reset codes Ye Li
2021-10-21 14:12   ` sbabic
2021-08-16 10:44 ` [PATCH 6/7] imx8mp_evk: Delete noncached memory config Ye Li
2021-10-21 14:12   ` sbabic
2021-08-16 10:44 ` [PATCH 7/7] imx8mp_evk: Enable the DWC EQoS iMX driver Ye Li
2021-10-21 14:12   ` sbabic
2021-10-10  8:35 ` [PATCH 1/7] arm: mach-imx: Update MAC fuse for i.MX8MP Marcel Ziswiler
2021-10-21 14:13 ` sbabic

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