[Intel-gfx] [PATCH 0/5] drm/i915/fdi: refactor some fdi code out of intel_display.c

[Intel-gfx] [PATCH 0/5] drm/i915/fdi: refactor some fdi code out of intel_display.c

[Jani Nikula]

Axe more stuff from intel_display.c.

Jani Nikula (5):
  drm/i915/fdi: move intel_update_fdi_pll_freq to intel_fdi.c
  drm/i915/fdi: move fdi bc bifurcation functions to intel_fdi.c
  drm/i915/fdi: move more FDI stuff to FDI link train hooks
  drm/i915/fdi: move fdi mphy reset and programming to intel_fdi.c
  drm/i915/fdi: convert BUG()'s to MISSING_CASE()

 drivers/gpu/drm/i915/display/intel_display.c | 177 +----------------
 drivers/gpu/drm/i915/display/intel_fdi.c     | 191 ++++++++++++++++++-
 drivers/gpu/drm/i915/display/intel_fdi.h     |   2 +
 3 files changed, 195 insertions(+), 175 deletions(-)

-- 
2.20.1

[Intel-gfx] [PATCH 1/5] drm/i915/fdi: move intel_update_fdi_pll_freq to intel_fdi.c

[Jani Nikula]

Move FDI related functions to intel_fdi.c. Rename to have intel_fdi
prefix while at it.

Signed-off-by: Jani Nikula <jani.nikula@intel.com>
---
 drivers/gpu/drm/i915/display/intel_display.c | 18 +-----------------
 drivers/gpu/drm/i915/display/intel_fdi.c     | 16 ++++++++++++++++
 drivers/gpu/drm/i915/display/intel_fdi.h     |  1 +
 3 files changed, 18 insertions(+), 17 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
index 794690c0dba5..3a9afe04ce0a 100644
--- a/drivers/gpu/drm/i915/display/intel_display.c
+++ b/drivers/gpu/drm/i915/display/intel_display.c
@@ -11564,22 +11564,6 @@ static void sanitize_watermarks(struct drm_i915_private *dev_priv)
 	drm_modeset_acquire_fini(&ctx);
 }
 
-static void intel_update_fdi_pll_freq(struct drm_i915_private *dev_priv)
-{
-	if (IS_IRONLAKE(dev_priv)) {
-		u32 fdi_pll_clk =
-			intel_de_read(dev_priv, FDI_PLL_BIOS_0) & FDI_PLL_FB_CLOCK_MASK;
-
-		dev_priv->fdi_pll_freq = (fdi_pll_clk + 2) * 10000;
-	} else if (IS_SANDYBRIDGE(dev_priv) || IS_IVYBRIDGE(dev_priv)) {
-		dev_priv->fdi_pll_freq = 270000;
-	} else {
-		return;
-	}
-
-	drm_dbg(&dev_priv->drm, "FDI PLL freq=%d\n", dev_priv->fdi_pll_freq);
-}
-
 static int intel_initial_commit(struct drm_device *dev)
 {
 	struct drm_atomic_state *state = NULL;
@@ -11833,7 +11817,7 @@ int intel_modeset_init_nogem(struct drm_i915_private *i915)
 
 	intel_plane_possible_crtcs_init(i915);
 	intel_shared_dpll_init(dev);
-	intel_update_fdi_pll_freq(i915);
+	intel_fdi_pll_freq_update(i915);
 
 	intel_update_czclk(i915);
 	intel_modeset_init_hw(i915);
diff --git a/drivers/gpu/drm/i915/display/intel_fdi.c b/drivers/gpu/drm/i915/display/intel_fdi.c
index 13f8ba4c9188..88a78dafd54d 100644
--- a/drivers/gpu/drm/i915/display/intel_fdi.c
+++ b/drivers/gpu/drm/i915/display/intel_fdi.c
@@ -95,6 +95,22 @@ static int ilk_check_fdi_lanes(struct drm_device *dev, enum pipe pipe,
 	}
 }
 
+void intel_fdi_pll_freq_update(struct drm_i915_private *i915)
+{
+	if (IS_IRONLAKE(i915)) {
+		u32 fdi_pll_clk =
+			intel_de_read(i915, FDI_PLL_BIOS_0) & FDI_PLL_FB_CLOCK_MASK;
+
+		i915->fdi_pll_freq = (fdi_pll_clk + 2) * 10000;
+	} else if (IS_SANDYBRIDGE(i915) || IS_IVYBRIDGE(i915)) {
+		i915->fdi_pll_freq = 270000;
+	} else {
+		return;
+	}
+
+	drm_dbg(&i915->drm, "FDI PLL freq=%d\n", i915->fdi_pll_freq);
+}
+
 int intel_fdi_link_freq(struct drm_i915_private *i915,
 			const struct intel_crtc_state *pipe_config)
 {
diff --git a/drivers/gpu/drm/i915/display/intel_fdi.h b/drivers/gpu/drm/i915/display/intel_fdi.h
index 2c8ffd9ceaed..cda9a32c25ba 100644
--- a/drivers/gpu/drm/i915/display/intel_fdi.h
+++ b/drivers/gpu/drm/i915/display/intel_fdi.h
@@ -23,5 +23,6 @@ void ilk_fdi_pll_enable(const struct intel_crtc_state *crtc_state);
 void intel_fdi_init_hook(struct drm_i915_private *dev_priv);
 void hsw_fdi_link_train(struct intel_encoder *encoder,
 			const struct intel_crtc_state *crtc_state);
+void intel_fdi_pll_freq_update(struct drm_i915_private *i915);
 
 #endif
-- 
2.20.1

[Intel-gfx] [PATCH 2/5] drm/i915/fdi: move fdi bc bifurcation functions to intel_fdi.c

[Jani Nikula]

Move FDI related functions to intel_fdi.c. Don't bother with renaming as
we'll make the functions static shortly.

Signed-off-by: Jani Nikula <jani.nikula@intel.com>
---
 drivers/gpu/drm/i915/display/intel_display.c | 49 --------------------
 drivers/gpu/drm/i915/display/intel_fdi.c     | 49 ++++++++++++++++++++
 drivers/gpu/drm/i915/display/intel_fdi.h     |  1 +
 3 files changed, 50 insertions(+), 49 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
index 3a9afe04ce0a..f62bbff7a6be 100644
--- a/drivers/gpu/drm/i915/display/intel_display.c
+++ b/drivers/gpu/drm/i915/display/intel_display.c
@@ -2010,55 +2010,6 @@ static void ilk_pch_transcoder_set_timings(const struct intel_crtc_state *crtc_s
 		       intel_de_read(dev_priv, VSYNCSHIFT(cpu_transcoder)));
 }
 
-static void cpt_set_fdi_bc_bifurcation(struct drm_i915_private *dev_priv, bool enable)
-{
-	u32 temp;
-
-	temp = intel_de_read(dev_priv, SOUTH_CHICKEN1);
-	if (!!(temp & FDI_BC_BIFURCATION_SELECT) == enable)
-		return;
-
-	drm_WARN_ON(&dev_priv->drm,
-		    intel_de_read(dev_priv, FDI_RX_CTL(PIPE_B)) &
-		    FDI_RX_ENABLE);
-	drm_WARN_ON(&dev_priv->drm,
-		    intel_de_read(dev_priv, FDI_RX_CTL(PIPE_C)) &
-		    FDI_RX_ENABLE);
-
-	temp &= ~FDI_BC_BIFURCATION_SELECT;
-	if (enable)
-		temp |= FDI_BC_BIFURCATION_SELECT;
-
-	drm_dbg_kms(&dev_priv->drm, "%sabling fdi C rx\n",
-		    enable ? "en" : "dis");
-	intel_de_write(dev_priv, SOUTH_CHICKEN1, temp);
-	intel_de_posting_read(dev_priv, SOUTH_CHICKEN1);
-}
-
-static void ivb_update_fdi_bc_bifurcation(const struct intel_crtc_state *crtc_state)
-{
-	struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);
-	struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
-
-	switch (crtc->pipe) {
-	case PIPE_A:
-		break;
-	case PIPE_B:
-		if (crtc_state->fdi_lanes > 2)
-			cpt_set_fdi_bc_bifurcation(dev_priv, false);
-		else
-			cpt_set_fdi_bc_bifurcation(dev_priv, true);
-
-		break;
-	case PIPE_C:
-		cpt_set_fdi_bc_bifurcation(dev_priv, true);
-
-		break;
-	default:
-		BUG();
-	}
-}
-
 /*
  * Finds the encoder associated with the given CRTC. This can only be
  * used when we know that the CRTC isn't feeding multiple encoders!
diff --git a/drivers/gpu/drm/i915/display/intel_fdi.c b/drivers/gpu/drm/i915/display/intel_fdi.c
index 88a78dafd54d..f8ffd5c032ae 100644
--- a/drivers/gpu/drm/i915/display/intel_fdi.c
+++ b/drivers/gpu/drm/i915/display/intel_fdi.c
@@ -170,6 +170,55 @@ int ilk_fdi_compute_config(struct intel_crtc *crtc,
 	return ret;
 }
 
+static void cpt_set_fdi_bc_bifurcation(struct drm_i915_private *dev_priv, bool enable)
+{
+	u32 temp;
+
+	temp = intel_de_read(dev_priv, SOUTH_CHICKEN1);
+	if (!!(temp & FDI_BC_BIFURCATION_SELECT) == enable)
+		return;
+
+	drm_WARN_ON(&dev_priv->drm,
+		    intel_de_read(dev_priv, FDI_RX_CTL(PIPE_B)) &
+		    FDI_RX_ENABLE);
+	drm_WARN_ON(&dev_priv->drm,
+		    intel_de_read(dev_priv, FDI_RX_CTL(PIPE_C)) &
+		    FDI_RX_ENABLE);
+
+	temp &= ~FDI_BC_BIFURCATION_SELECT;
+	if (enable)
+		temp |= FDI_BC_BIFURCATION_SELECT;
+
+	drm_dbg_kms(&dev_priv->drm, "%sabling fdi C rx\n",
+		    enable ? "en" : "dis");
+	intel_de_write(dev_priv, SOUTH_CHICKEN1, temp);
+	intel_de_posting_read(dev_priv, SOUTH_CHICKEN1);
+}
+
+void ivb_update_fdi_bc_bifurcation(const struct intel_crtc_state *crtc_state)
+{
+	struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);
+	struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
+
+	switch (crtc->pipe) {
+	case PIPE_A:
+		break;
+	case PIPE_B:
+		if (crtc_state->fdi_lanes > 2)
+			cpt_set_fdi_bc_bifurcation(dev_priv, false);
+		else
+			cpt_set_fdi_bc_bifurcation(dev_priv, true);
+
+		break;
+	case PIPE_C:
+		cpt_set_fdi_bc_bifurcation(dev_priv, true);
+
+		break;
+	default:
+		BUG();
+	}
+}
+
 void intel_fdi_normal_train(struct intel_crtc *crtc)
 {
 	struct drm_device *dev = crtc->base.dev;
diff --git a/drivers/gpu/drm/i915/display/intel_fdi.h b/drivers/gpu/drm/i915/display/intel_fdi.h
index cda9a32c25ba..135802e4da68 100644
--- a/drivers/gpu/drm/i915/display/intel_fdi.h
+++ b/drivers/gpu/drm/i915/display/intel_fdi.h
@@ -16,6 +16,7 @@ int intel_fdi_link_freq(struct drm_i915_private *i915,
 			const struct intel_crtc_state *pipe_config);
 int ilk_fdi_compute_config(struct intel_crtc *intel_crtc,
 			   struct intel_crtc_state *pipe_config);
+void ivb_update_fdi_bc_bifurcation(const struct intel_crtc_state *crtc_state);
 void intel_fdi_normal_train(struct intel_crtc *crtc);
 void ilk_fdi_disable(struct intel_crtc *crtc);
 void ilk_fdi_pll_disable(struct intel_crtc *intel_crtc);
-- 
2.20.1

[Intel-gfx] [PATCH 3/5] drm/i915/fdi: move more FDI stuff to FDI link train hooks

[Jani Nikula]

Accept slight duplication in the fdi link train hooks in exchange for
simplification in ilk_pch_enable(). This lets us make
ivb_update_fdi_bc_bifurcation() static again, now in intel_fdi.c.

Signed-off-by: Jani Nikula <jani.nikula@intel.com>
---
 drivers/gpu/drm/i915/display/intel_display.c |  8 -------
 drivers/gpu/drm/i915/display/intel_fdi.c     | 25 +++++++++++++++++++-
 drivers/gpu/drm/i915/display/intel_fdi.h     |  1 -
 3 files changed, 24 insertions(+), 10 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
index f62bbff7a6be..e7b6969cd2e2 100644
--- a/drivers/gpu/drm/i915/display/intel_display.c
+++ b/drivers/gpu/drm/i915/display/intel_display.c
@@ -2059,14 +2059,6 @@ static void ilk_pch_enable(const struct intel_atomic_state *state,
 
 	assert_pch_transcoder_disabled(dev_priv, pipe);
 
-	if (IS_IVYBRIDGE(dev_priv))
-		ivb_update_fdi_bc_bifurcation(crtc_state);
-
-	/* Write the TU size bits before fdi link training, so that error
-	 * detection works. */
-	intel_de_write(dev_priv, FDI_RX_TUSIZE1(pipe),
-		       intel_de_read(dev_priv, PIPE_DATA_M1(pipe)) & TU_SIZE_MASK);
-
 	/* For PCH output, training FDI link */
 	dev_priv->display.fdi_link_train(crtc, crtc_state);
 
diff --git a/drivers/gpu/drm/i915/display/intel_fdi.c b/drivers/gpu/drm/i915/display/intel_fdi.c
index f8ffd5c032ae..f5e42985084a 100644
--- a/drivers/gpu/drm/i915/display/intel_fdi.c
+++ b/drivers/gpu/drm/i915/display/intel_fdi.c
@@ -195,7 +195,7 @@ static void cpt_set_fdi_bc_bifurcation(struct drm_i915_private *dev_priv, bool e
 	intel_de_posting_read(dev_priv, SOUTH_CHICKEN1);
 }
 
-void ivb_update_fdi_bc_bifurcation(const struct intel_crtc_state *crtc_state)
+static void ivb_update_fdi_bc_bifurcation(const struct intel_crtc_state *crtc_state)
 {
 	struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);
 	struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
@@ -270,6 +270,13 @@ static void ilk_fdi_link_train(struct intel_crtc *crtc,
 	i915_reg_t reg;
 	u32 temp, tries;
 
+	/*
+	 * Write the TU size bits before fdi link training, so that error
+	 * detection works.
+	 */
+	intel_de_write(dev_priv, FDI_RX_TUSIZE1(pipe),
+		       intel_de_read(dev_priv, PIPE_DATA_M1(pipe)) & TU_SIZE_MASK);
+
 	/* FDI needs bits from pipe first */
 	assert_pipe_enabled(dev_priv, crtc_state->cpu_transcoder);
 
@@ -373,6 +380,13 @@ static void gen6_fdi_link_train(struct intel_crtc *crtc,
 	i915_reg_t reg;
 	u32 temp, i, retry;
 
+	/*
+	 * Write the TU size bits before fdi link training, so that error
+	 * detection works.
+	 */
+	intel_de_write(dev_priv, FDI_RX_TUSIZE1(pipe),
+		       intel_de_read(dev_priv, PIPE_DATA_M1(pipe)) & TU_SIZE_MASK);
+
 	/* Train 1: umask FDI RX Interrupt symbol_lock and bit_lock bit
 	   for train result */
 	reg = FDI_RX_IMR(pipe);
@@ -510,6 +524,15 @@ static void ivb_manual_fdi_link_train(struct intel_crtc *crtc,
 	i915_reg_t reg;
 	u32 temp, i, j;
 
+	ivb_update_fdi_bc_bifurcation(crtc_state);
+
+	/*
+	 * Write the TU size bits before fdi link training, so that error
+	 * detection works.
+	 */
+	intel_de_write(dev_priv, FDI_RX_TUSIZE1(pipe),
+		       intel_de_read(dev_priv, PIPE_DATA_M1(pipe)) & TU_SIZE_MASK);
+
 	/* Train 1: umask FDI RX Interrupt symbol_lock and bit_lock bit
 	   for train result */
 	reg = FDI_RX_IMR(pipe);
diff --git a/drivers/gpu/drm/i915/display/intel_fdi.h b/drivers/gpu/drm/i915/display/intel_fdi.h
index 135802e4da68..cda9a32c25ba 100644
--- a/drivers/gpu/drm/i915/display/intel_fdi.h
+++ b/drivers/gpu/drm/i915/display/intel_fdi.h
@@ -16,7 +16,6 @@ int intel_fdi_link_freq(struct drm_i915_private *i915,
 			const struct intel_crtc_state *pipe_config);
 int ilk_fdi_compute_config(struct intel_crtc *intel_crtc,
 			   struct intel_crtc_state *pipe_config);
-void ivb_update_fdi_bc_bifurcation(const struct intel_crtc_state *crtc_state);
 void intel_fdi_normal_train(struct intel_crtc *crtc);
 void ilk_fdi_disable(struct intel_crtc *crtc);
 void ilk_fdi_pll_disable(struct intel_crtc *intel_crtc);
-- 
2.20.1

[Intel-gfx] [PATCH 4/5] drm/i915/fdi: move fdi mphy reset and programming to intel_fdi.c

[Jani Nikula]

This fairly detailed stuff that really has no place in
intel_display.c. Combine the calls into one to avoid exposing both.

Signed-off-by: Jani Nikula <jani.nikula@intel.com>
---
 drivers/gpu/drm/i915/display/intel_display.c | 102 +------------------
 drivers/gpu/drm/i915/display/intel_fdi.c     | 100 ++++++++++++++++++
 drivers/gpu/drm/i915/display/intel_fdi.h     |   1 +
 3 files changed, 103 insertions(+), 100 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
index e7b6969cd2e2..c8da214083b5 100644
--- a/drivers/gpu/drm/i915/display/intel_display.c
+++ b/drivers/gpu/drm/i915/display/intel_display.c
@@ -4916,102 +4916,6 @@ static void ilk_init_pch_refclk(struct drm_i915_private *dev_priv)
 	BUG_ON(val != final);
 }
 
-static void lpt_reset_fdi_mphy(struct drm_i915_private *dev_priv)
-{
-	u32 tmp;
-
-	tmp = intel_de_read(dev_priv, SOUTH_CHICKEN2);
-	tmp |= FDI_MPHY_IOSFSB_RESET_CTL;
-	intel_de_write(dev_priv, SOUTH_CHICKEN2, tmp);
-
-	if (wait_for_us(intel_de_read(dev_priv, SOUTH_CHICKEN2) &
-			FDI_MPHY_IOSFSB_RESET_STATUS, 100))
-		drm_err(&dev_priv->drm, "FDI mPHY reset assert timeout\n");
-
-	tmp = intel_de_read(dev_priv, SOUTH_CHICKEN2);
-	tmp &= ~FDI_MPHY_IOSFSB_RESET_CTL;
-	intel_de_write(dev_priv, SOUTH_CHICKEN2, tmp);
-
-	if (wait_for_us((intel_de_read(dev_priv, SOUTH_CHICKEN2) &
-			 FDI_MPHY_IOSFSB_RESET_STATUS) == 0, 100))
-		drm_err(&dev_priv->drm, "FDI mPHY reset de-assert timeout\n");
-}
-
-/* WaMPhyProgramming:hsw */
-static void lpt_program_fdi_mphy(struct drm_i915_private *dev_priv)
-{
-	u32 tmp;
-
-	tmp = intel_sbi_read(dev_priv, 0x8008, SBI_MPHY);
-	tmp &= ~(0xFF << 24);
-	tmp |= (0x12 << 24);
-	intel_sbi_write(dev_priv, 0x8008, tmp, SBI_MPHY);
-
-	tmp = intel_sbi_read(dev_priv, 0x2008, SBI_MPHY);
-	tmp |= (1 << 11);
-	intel_sbi_write(dev_priv, 0x2008, tmp, SBI_MPHY);
-
-	tmp = intel_sbi_read(dev_priv, 0x2108, SBI_MPHY);
-	tmp |= (1 << 11);
-	intel_sbi_write(dev_priv, 0x2108, tmp, SBI_MPHY);
-
-	tmp = intel_sbi_read(dev_priv, 0x206C, SBI_MPHY);
-	tmp |= (1 << 24) | (1 << 21) | (1 << 18);
-	intel_sbi_write(dev_priv, 0x206C, tmp, SBI_MPHY);
-
-	tmp = intel_sbi_read(dev_priv, 0x216C, SBI_MPHY);
-	tmp |= (1 << 24) | (1 << 21) | (1 << 18);
-	intel_sbi_write(dev_priv, 0x216C, tmp, SBI_MPHY);
-
-	tmp = intel_sbi_read(dev_priv, 0x2080, SBI_MPHY);
-	tmp &= ~(7 << 13);
-	tmp |= (5 << 13);
-	intel_sbi_write(dev_priv, 0x2080, tmp, SBI_MPHY);
-
-	tmp = intel_sbi_read(dev_priv, 0x2180, SBI_MPHY);
-	tmp &= ~(7 << 13);
-	tmp |= (5 << 13);
-	intel_sbi_write(dev_priv, 0x2180, tmp, SBI_MPHY);
-
-	tmp = intel_sbi_read(dev_priv, 0x208C, SBI_MPHY);
-	tmp &= ~0xFF;
-	tmp |= 0x1C;
-	intel_sbi_write(dev_priv, 0x208C, tmp, SBI_MPHY);
-
-	tmp = intel_sbi_read(dev_priv, 0x218C, SBI_MPHY);
-	tmp &= ~0xFF;
-	tmp |= 0x1C;
-	intel_sbi_write(dev_priv, 0x218C, tmp, SBI_MPHY);
-
-	tmp = intel_sbi_read(dev_priv, 0x2098, SBI_MPHY);
-	tmp &= ~(0xFF << 16);
-	tmp |= (0x1C << 16);
-	intel_sbi_write(dev_priv, 0x2098, tmp, SBI_MPHY);
-
-	tmp = intel_sbi_read(dev_priv, 0x2198, SBI_MPHY);
-	tmp &= ~(0xFF << 16);
-	tmp |= (0x1C << 16);
-	intel_sbi_write(dev_priv, 0x2198, tmp, SBI_MPHY);
-
-	tmp = intel_sbi_read(dev_priv, 0x20C4, SBI_MPHY);
-	tmp |= (1 << 27);
-	intel_sbi_write(dev_priv, 0x20C4, tmp, SBI_MPHY);
-
-	tmp = intel_sbi_read(dev_priv, 0x21C4, SBI_MPHY);
-	tmp |= (1 << 27);
-	intel_sbi_write(dev_priv, 0x21C4, tmp, SBI_MPHY);
-
-	tmp = intel_sbi_read(dev_priv, 0x20EC, SBI_MPHY);
-	tmp &= ~(0xF << 28);
-	tmp |= (4 << 28);
-	intel_sbi_write(dev_priv, 0x20EC, tmp, SBI_MPHY);
-
-	tmp = intel_sbi_read(dev_priv, 0x21EC, SBI_MPHY);
-	tmp &= ~(0xF << 28);
-	tmp |= (4 << 28);
-	intel_sbi_write(dev_priv, 0x21EC, tmp, SBI_MPHY);
-}
-
 /* Implements 3 different sequences from BSpec chapter "Display iCLK
  * Programming" based on the parameters passed:
  * - Sequence to enable CLKOUT_DP
@@ -5044,10 +4948,8 @@ static void lpt_enable_clkout_dp(struct drm_i915_private *dev_priv,
 		tmp &= ~SBI_SSCCTL_PATHALT;
 		intel_sbi_write(dev_priv, SBI_SSCCTL, tmp, SBI_ICLK);
 
-		if (with_fdi) {
-			lpt_reset_fdi_mphy(dev_priv);
-			lpt_program_fdi_mphy(dev_priv);
-		}
+		if (with_fdi)
+			lpt_fdi_program_mphy(dev_priv);
 	}
 
 	reg = HAS_PCH_LPT_LP(dev_priv) ? SBI_GEN0 : SBI_DBUFF0;
diff --git a/drivers/gpu/drm/i915/display/intel_fdi.c b/drivers/gpu/drm/i915/display/intel_fdi.c
index f5e42985084a..cc83a6532a71 100644
--- a/drivers/gpu/drm/i915/display/intel_fdi.c
+++ b/drivers/gpu/drm/i915/display/intel_fdi.c
@@ -2,11 +2,13 @@
 /*
  * Copyright © 2020 Intel Corporation
  */
+
 #include "intel_atomic.h"
 #include "intel_ddi.h"
 #include "intel_de.h"
 #include "intel_display_types.h"
 #include "intel_fdi.h"
+#include "intel_sideband.h"
 
 /* units of 100MHz */
 static int pipe_required_fdi_lanes(struct intel_crtc_state *crtc_state)
@@ -904,6 +906,104 @@ void ilk_fdi_disable(struct intel_crtc *crtc)
 	udelay(100);
 }
 
+static void lpt_fdi_reset_mphy(struct drm_i915_private *dev_priv)
+{
+	u32 tmp;
+
+	tmp = intel_de_read(dev_priv, SOUTH_CHICKEN2);
+	tmp |= FDI_MPHY_IOSFSB_RESET_CTL;
+	intel_de_write(dev_priv, SOUTH_CHICKEN2, tmp);
+
+	if (wait_for_us(intel_de_read(dev_priv, SOUTH_CHICKEN2) &
+			FDI_MPHY_IOSFSB_RESET_STATUS, 100))
+		drm_err(&dev_priv->drm, "FDI mPHY reset assert timeout\n");
+
+	tmp = intel_de_read(dev_priv, SOUTH_CHICKEN2);
+	tmp &= ~FDI_MPHY_IOSFSB_RESET_CTL;
+	intel_de_write(dev_priv, SOUTH_CHICKEN2, tmp);
+
+	if (wait_for_us((intel_de_read(dev_priv, SOUTH_CHICKEN2) &
+			 FDI_MPHY_IOSFSB_RESET_STATUS) == 0, 100))
+		drm_err(&dev_priv->drm, "FDI mPHY reset de-assert timeout\n");
+}
+
+/* WaMPhyProgramming:hsw */
+void lpt_fdi_program_mphy(struct drm_i915_private *dev_priv)
+{
+	u32 tmp;
+
+	lpt_fdi_reset_mphy(dev_priv);
+
+	tmp = intel_sbi_read(dev_priv, 0x8008, SBI_MPHY);
+	tmp &= ~(0xFF << 24);
+	tmp |= (0x12 << 24);
+	intel_sbi_write(dev_priv, 0x8008, tmp, SBI_MPHY);
+
+	tmp = intel_sbi_read(dev_priv, 0x2008, SBI_MPHY);
+	tmp |= (1 << 11);
+	intel_sbi_write(dev_priv, 0x2008, tmp, SBI_MPHY);
+
+	tmp = intel_sbi_read(dev_priv, 0x2108, SBI_MPHY);
+	tmp |= (1 << 11);
+	intel_sbi_write(dev_priv, 0x2108, tmp, SBI_MPHY);
+
+	tmp = intel_sbi_read(dev_priv, 0x206C, SBI_MPHY);
+	tmp |= (1 << 24) | (1 << 21) | (1 << 18);
+	intel_sbi_write(dev_priv, 0x206C, tmp, SBI_MPHY);
+
+	tmp = intel_sbi_read(dev_priv, 0x216C, SBI_MPHY);
+	tmp |= (1 << 24) | (1 << 21) | (1 << 18);
+	intel_sbi_write(dev_priv, 0x216C, tmp, SBI_MPHY);
+
+	tmp = intel_sbi_read(dev_priv, 0x2080, SBI_MPHY);
+	tmp &= ~(7 << 13);
+	tmp |= (5 << 13);
+	intel_sbi_write(dev_priv, 0x2080, tmp, SBI_MPHY);
+
+	tmp = intel_sbi_read(dev_priv, 0x2180, SBI_MPHY);
+	tmp &= ~(7 << 13);
+	tmp |= (5 << 13);
+	intel_sbi_write(dev_priv, 0x2180, tmp, SBI_MPHY);
+
+	tmp = intel_sbi_read(dev_priv, 0x208C, SBI_MPHY);
+	tmp &= ~0xFF;
+	tmp |= 0x1C;
+	intel_sbi_write(dev_priv, 0x208C, tmp, SBI_MPHY);
+
+	tmp = intel_sbi_read(dev_priv, 0x218C, SBI_MPHY);
+	tmp &= ~0xFF;
+	tmp |= 0x1C;
+	intel_sbi_write(dev_priv, 0x218C, tmp, SBI_MPHY);
+
+	tmp = intel_sbi_read(dev_priv, 0x2098, SBI_MPHY);
+	tmp &= ~(0xFF << 16);
+	tmp |= (0x1C << 16);
+	intel_sbi_write(dev_priv, 0x2098, tmp, SBI_MPHY);
+
+	tmp = intel_sbi_read(dev_priv, 0x2198, SBI_MPHY);
+	tmp &= ~(0xFF << 16);
+	tmp |= (0x1C << 16);
+	intel_sbi_write(dev_priv, 0x2198, tmp, SBI_MPHY);
+
+	tmp = intel_sbi_read(dev_priv, 0x20C4, SBI_MPHY);
+	tmp |= (1 << 27);
+	intel_sbi_write(dev_priv, 0x20C4, tmp, SBI_MPHY);
+
+	tmp = intel_sbi_read(dev_priv, 0x21C4, SBI_MPHY);
+	tmp |= (1 << 27);
+	intel_sbi_write(dev_priv, 0x21C4, tmp, SBI_MPHY);
+
+	tmp = intel_sbi_read(dev_priv, 0x20EC, SBI_MPHY);
+	tmp &= ~(0xF << 28);
+	tmp |= (4 << 28);
+	intel_sbi_write(dev_priv, 0x20EC, tmp, SBI_MPHY);
+
+	tmp = intel_sbi_read(dev_priv, 0x21EC, SBI_MPHY);
+	tmp &= ~(0xF << 28);
+	tmp |= (4 << 28);
+	intel_sbi_write(dev_priv, 0x21EC, tmp, SBI_MPHY);
+}
+
 void
 intel_fdi_init_hook(struct drm_i915_private *dev_priv)
 {
diff --git a/drivers/gpu/drm/i915/display/intel_fdi.h b/drivers/gpu/drm/i915/display/intel_fdi.h
index cda9a32c25ba..60acf2133145 100644
--- a/drivers/gpu/drm/i915/display/intel_fdi.h
+++ b/drivers/gpu/drm/i915/display/intel_fdi.h
@@ -24,5 +24,6 @@ void intel_fdi_init_hook(struct drm_i915_private *dev_priv);
 void hsw_fdi_link_train(struct intel_encoder *encoder,
 			const struct intel_crtc_state *crtc_state);
 void intel_fdi_pll_freq_update(struct drm_i915_private *i915);
+void lpt_fdi_program_mphy(struct drm_i915_private *i915);
 
 #endif
-- 
2.20.1

[Intel-gfx] [PATCH 5/5] drm/i915/fdi: convert BUG()'s to MISSING_CASE()

[Jani Nikula]

These shouldn't happen, but in the off chance they do, we'll want a
warning rather than panic.

Signed-off-by: Jani Nikula <jani.nikula@intel.com>
---
 drivers/gpu/drm/i915/display/intel_fdi.c | 5 +++--
 1 file changed, 3 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_fdi.c b/drivers/gpu/drm/i915/display/intel_fdi.c
index cc83a6532a71..fc09b781f15f 100644
--- a/drivers/gpu/drm/i915/display/intel_fdi.c
+++ b/drivers/gpu/drm/i915/display/intel_fdi.c
@@ -93,7 +93,8 @@ static int ilk_check_fdi_lanes(struct drm_device *dev, enum pipe pipe,
 		}
 		return 0;
 	default:
-		BUG();
+		MISSING_CASE(pipe);
+		return 0;
 	}
 }
 
@@ -217,7 +218,7 @@ static void ivb_update_fdi_bc_bifurcation(const struct intel_crtc_state *crtc_st
 
 		break;
 	default:
-		BUG();
+		MISSING_CASE(crtc->pipe);
 	}
 }
 
-- 
2.20.1

[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915/fdi: refactor some fdi code out of intel_display.c

[Patchwork]

== Series Details ==

Series: drm/i915/fdi: refactor some fdi code out of intel_display.c
URL   : https://patchwork.freedesktop.org/series/94026/
State : warning

== Summary ==

$ dim checkpatch origin/drm-tip
b573cd162507 drm/i915/fdi: move intel_update_fdi_pll_freq to intel_fdi.c
e2f0b2d220b7 drm/i915/fdi: move fdi bc bifurcation functions to intel_fdi.c
-:125: WARNING:AVOID_BUG: Avoid crashing the kernel - try using WARN_ON & recovery code rather than BUG() or BUG_ON()
#125: FILE: drivers/gpu/drm/i915/display/intel_fdi.c:218:
+		BUG();

total: 0 errors, 1 warnings, 0 checks, 117 lines checked
efc363bfa49e drm/i915/fdi: move more FDI stuff to FDI link train hooks
dd2f514ed896 drm/i915/fdi: move fdi mphy reset and programming to intel_fdi.c
8e6bd97aa2be drm/i915/fdi: convert BUG()'s to MISSING_CASE()

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/fdi: refactor some fdi code out of intel_display.c

[Patchwork]

[-- Attachment #1: Type: text/plain, Size: 2553 bytes --]

== Series Details ==

Series: drm/i915/fdi: refactor some fdi code out of intel_display.c
URL   : https://patchwork.freedesktop.org/series/94026/
State : success

== Summary ==

CI Bug Log - changes from CI_DRM_10520 -> Patchwork_20894
====================================================

Summary
-------

  **SUCCESS**

  No regressions found.

  External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20894/index.html

Known issues
------------

  Here are the changes found in Patchwork_20894 that come from known issues:

### IGT changes ###

#### Issues hit ####

  * igt@amdgpu/amd_basic@cs-gfx:
    - fi-kbl-soraka:      NOTRUN -> [SKIP][1] ([fdo#109271]) +12 similar issues
   [1]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20894/fi-kbl-soraka/igt@amdgpu/amd_basic@cs-gfx.html

  * igt@kms_chamelium@dp-crc-fast:
    - fi-kbl-7500u:       [PASS][2] -> [FAIL][3] ([i915#1372])
   [2]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10520/fi-kbl-7500u/igt@kms_chamelium@dp-crc-fast.html
   [3]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20894/fi-kbl-7500u/igt@kms_chamelium@dp-crc-fast.html

  
  {name}: This element is suppressed. This means it is ignored when computing
          the status of the difference (SUCCESS, WARNING, or FAILURE).

  [fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
  [i915#1372]: https://gitlab.freedesktop.org/drm/intel/issues/1372
  [i915#1982]: https://gitlab.freedesktop.org/drm/intel/issues/1982


Participating hosts (40 -> 33)
------------------------------

  Missing    (7): fi-ilk-m540 bat-adls-5 fi-hsw-4200u fi-tgl-1115g4 fi-bsw-cyan fi-bdw-samus bat-jsl-1 


Build changes
-------------

  * Linux: CI_DRM_10520 -> Patchwork_20894

  CI-20190529: 20190529
  CI_DRM_10520: df6d856ea920279c17e875a80fca47a428fd7fcd @ git://anongit.freedesktop.org/gfx-ci/linux
  IGT_6185: 5dca04416f50576f464ebbd9aea96edccd7e4eab @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
  Patchwork_20894: 8e6bd97aa2be037c4bc36c05cf15025a98c5b745 @ git://anongit.freedesktop.org/gfx-ci/linux


== Linux commits ==

8e6bd97aa2be drm/i915/fdi: convert BUG()'s to MISSING_CASE()
dd2f514ed896 drm/i915/fdi: move fdi mphy reset and programming to intel_fdi.c
efc363bfa49e drm/i915/fdi: move more FDI stuff to FDI link train hooks
e2f0b2d220b7 drm/i915/fdi: move fdi bc bifurcation functions to intel_fdi.c
b573cd162507 drm/i915/fdi: move intel_update_fdi_pll_freq to intel_fdi.c

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20894/index.html

[-- Attachment #2: Type: text/html, Size: 3147 bytes --]

[Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915/fdi: refactor some fdi code out of intel_display.c

[Patchwork]

[-- Attachment #1: Type: text/plain, Size: 30281 bytes --]

== Series Details ==

Series: drm/i915/fdi: refactor some fdi code out of intel_display.c
URL   : https://patchwork.freedesktop.org/series/94026/
State : success

== Summary ==

CI Bug Log - changes from CI_DRM_10520_full -> Patchwork_20894_full
====================================================

Summary
-------

  **SUCCESS**

  No regressions found.

  

Known issues
------------

  Here are the changes found in Patchwork_20894_full that come from known issues:

### IGT changes ###

#### Issues hit ####

  * igt@feature_discovery@psr2:
    - shard-iclb:         [PASS][1] -> [SKIP][2] ([i915#658])
   [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10520/shard-iclb2/igt@feature_discovery@psr2.html
   [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20894/shard-iclb6/igt@feature_discovery@psr2.html

  * igt@gem_create@create-massive:
    - shard-snb:          NOTRUN -> [DMESG-WARN][3] ([i915#3002])
   [3]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20894/shard-snb6/igt@gem_create@create-massive.html
    - shard-kbl:          NOTRUN -> [DMESG-WARN][4] ([i915#3002]) +1 similar issue
   [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20894/shard-kbl3/igt@gem_create@create-massive.html

  * igt@gem_ctx_isolation@preservation-s3@vcs0:
    - shard-apl:          NOTRUN -> [DMESG-WARN][5] ([i915#180])
   [5]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20894/shard-apl7/igt@gem_ctx_isolation@preservation-s3@vcs0.html

  * igt@gem_ctx_persistence@legacy-engines-mixed:
    - shard-snb:          NOTRUN -> [SKIP][6] ([fdo#109271] / [i915#1099]) +6 similar issues
   [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20894/shard-snb2/igt@gem_ctx_persistence@legacy-engines-mixed.html

  * igt@gem_exec_fair@basic-none@vecs0:
    - shard-kbl:          NOTRUN -> [FAIL][7] ([i915#2842])
   [7]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20894/shard-kbl4/igt@gem_exec_fair@basic-none@vecs0.html

  * igt@gem_exec_fair@basic-pace@rcs0:
    - shard-kbl:          [PASS][8] -> [FAIL][9] ([i915#2842])
   [8]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10520/shard-kbl6/igt@gem_exec_fair@basic-pace@rcs0.html
   [9]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20894/shard-kbl2/igt@gem_exec_fair@basic-pace@rcs0.html

  * igt@gem_exec_fair@basic-pace@vcs1:
    - shard-iclb:         NOTRUN -> [FAIL][10] ([i915#2842])
   [10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20894/shard-iclb4/igt@gem_exec_fair@basic-pace@vcs1.html

  * igt@gem_mmap_gtt@cpuset-big-copy-odd:
    - shard-skl:          [PASS][11] -> [FAIL][12] ([i915#1888] / [i915#307])
   [11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10520/shard-skl6/igt@gem_mmap_gtt@cpuset-big-copy-odd.html
   [12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20894/shard-skl2/igt@gem_mmap_gtt@cpuset-big-copy-odd.html

  * igt@gem_mmap_gtt@cpuset-big-copy-xy:
    - shard-iclb:         [PASS][13] -> [FAIL][14] ([i915#2428])
   [13]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10520/shard-iclb4/igt@gem_mmap_gtt@cpuset-big-copy-xy.html
   [14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20894/shard-iclb2/igt@gem_mmap_gtt@cpuset-big-copy-xy.html

  * igt@gem_render_copy@yf-tiled-to-vebox-linear:
    - shard-iclb:         NOTRUN -> [SKIP][15] ([i915#768])
   [15]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20894/shard-iclb4/igt@gem_render_copy@yf-tiled-to-vebox-linear.html

  * igt@gem_userptr_blits@dmabuf-sync:
    - shard-apl:          NOTRUN -> [SKIP][16] ([fdo#109271] / [i915#3323])
   [16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20894/shard-apl1/igt@gem_userptr_blits@dmabuf-sync.html

  * igt@gem_userptr_blits@map-fixed-invalidate-overlap-busy@fixed:
    - shard-iclb:         NOTRUN -> [SKIP][17] ([i915#3922])
   [17]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20894/shard-iclb4/igt@gem_userptr_blits@map-fixed-invalidate-overlap-busy@fixed.html

  * igt@gem_userptr_blits@vma-merge:
    - shard-snb:          NOTRUN -> [FAIL][18] ([i915#2724])
   [18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20894/shard-snb2/igt@gem_userptr_blits@vma-merge.html
    - shard-apl:          NOTRUN -> [FAIL][19] ([i915#3318])
   [19]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20894/shard-apl2/igt@gem_userptr_blits@vma-merge.html

  * igt@gen9_exec_parse@allowed-single:
    - shard-skl:          [PASS][20] -> [DMESG-WARN][21] ([i915#1436] / [i915#716])
   [20]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10520/shard-skl9/igt@gen9_exec_parse@allowed-single.html
   [21]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20894/shard-skl9/igt@gen9_exec_parse@allowed-single.html

  * igt@i915_query@query-topology-known-pci-ids:
    - shard-iclb:         NOTRUN -> [SKIP][22] ([fdo#109303])
   [22]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20894/shard-iclb4/igt@i915_query@query-topology-known-pci-ids.html

  * igt@kms_big_fb@x-tiled-max-hw-stride-64bpp-rotate-0-hflip:
    - shard-kbl:          NOTRUN -> [SKIP][23] ([fdo#109271] / [i915#3777])
   [23]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20894/shard-kbl6/igt@kms_big_fb@x-tiled-max-hw-stride-64bpp-rotate-0-hflip.html

  * igt@kms_big_fb@y-tiled-max-hw-stride-32bpp-rotate-180-hflip:
    - shard-apl:          NOTRUN -> [SKIP][24] ([fdo#109271] / [i915#3777]) +1 similar issue
   [24]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20894/shard-apl2/igt@kms_big_fb@y-tiled-max-hw-stride-32bpp-rotate-180-hflip.html

  * igt@kms_big_fb@yf-tiled-8bpp-rotate-90:
    - shard-iclb:         NOTRUN -> [SKIP][25] ([fdo#110723])
   [25]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20894/shard-iclb4/igt@kms_big_fb@yf-tiled-8bpp-rotate-90.html

  * igt@kms_big_fb@yf-tiled-max-hw-stride-64bpp-rotate-0:
    - shard-apl:          NOTRUN -> [SKIP][26] ([fdo#109271]) +145 similar issues
   [26]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20894/shard-apl2/igt@kms_big_fb@yf-tiled-max-hw-stride-64bpp-rotate-0.html

  * igt@kms_ccs@pipe-a-ccs-on-another-bo-y_tiled_gen12_mc_ccs:
    - shard-apl:          NOTRUN -> [SKIP][27] ([fdo#109271] / [i915#3886]) +5 similar issues
   [27]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20894/shard-apl1/igt@kms_ccs@pipe-a-ccs-on-another-bo-y_tiled_gen12_mc_ccs.html

  * igt@kms_ccs@pipe-b-crc-primary-rotation-180-y_tiled_gen12_mc_ccs:
    - shard-skl:          NOTRUN -> [SKIP][28] ([fdo#109271] / [i915#3886])
   [28]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20894/shard-skl9/igt@kms_ccs@pipe-b-crc-primary-rotation-180-y_tiled_gen12_mc_ccs.html

  * igt@kms_ccs@pipe-b-missing-ccs-buffer-y_tiled_gen12_rc_ccs_cc:
    - shard-kbl:          NOTRUN -> [SKIP][29] ([fdo#109271] / [i915#3886]) +4 similar issues
   [29]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20894/shard-kbl6/igt@kms_ccs@pipe-b-missing-ccs-buffer-y_tiled_gen12_rc_ccs_cc.html

  * igt@kms_ccs@pipe-c-bad-pixel-format-y_tiled_ccs:
    - shard-tglb:         NOTRUN -> [SKIP][30] ([i915#3689])
   [30]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20894/shard-tglb1/igt@kms_ccs@pipe-c-bad-pixel-format-y_tiled_ccs.html

  * igt@kms_ccs@pipe-d-bad-pixel-format-y_tiled_ccs:
    - shard-snb:          NOTRUN -> [SKIP][31] ([fdo#109271]) +442 similar issues
   [31]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20894/shard-snb2/igt@kms_ccs@pipe-d-bad-pixel-format-y_tiled_ccs.html

  * igt@kms_chamelium@hdmi-edid-change-during-suspend:
    - shard-apl:          NOTRUN -> [SKIP][32] ([fdo#109271] / [fdo#111827]) +12 similar issues
   [32]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20894/shard-apl2/igt@kms_chamelium@hdmi-edid-change-during-suspend.html

  * igt@kms_color_chamelium@pipe-a-ctm-blue-to-red:
    - shard-iclb:         NOTRUN -> [SKIP][33] ([fdo#109284] / [fdo#111827])
   [33]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20894/shard-iclb4/igt@kms_color_chamelium@pipe-a-ctm-blue-to-red.html

  * igt@kms_color_chamelium@pipe-c-ctm-0-25:
    - shard-kbl:          NOTRUN -> [SKIP][34] ([fdo#109271] / [fdo#111827]) +5 similar issues
   [34]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20894/shard-kbl4/igt@kms_color_chamelium@pipe-c-ctm-0-25.html

  * igt@kms_color_chamelium@pipe-d-ctm-0-5:
    - shard-snb:          NOTRUN -> [SKIP][35] ([fdo#109271] / [fdo#111827]) +20 similar issues
   [35]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20894/shard-snb2/igt@kms_color_chamelium@pipe-d-ctm-0-5.html

  * igt@kms_color_chamelium@pipe-d-ctm-red-to-blue:
    - shard-skl:          NOTRUN -> [SKIP][36] ([fdo#109271] / [fdo#111827]) +1 similar issue
   [36]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20894/shard-skl9/igt@kms_color_chamelium@pipe-d-ctm-red-to-blue.html

  * igt@kms_content_protection@legacy:
    - shard-apl:          NOTRUN -> [FAIL][37] ([fdo#110321] / [fdo#110336])
   [37]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20894/shard-apl3/igt@kms_content_protection@legacy.html

  * igt@kms_cursor_crc@pipe-b-cursor-512x512-onscreen:
    - shard-iclb:         NOTRUN -> [SKIP][38] ([fdo#109278] / [fdo#109279]) +1 similar issue
   [38]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20894/shard-iclb4/igt@kms_cursor_crc@pipe-b-cursor-512x512-onscreen.html

  * igt@kms_cursor_crc@pipe-b-cursor-suspend:
    - shard-skl:          [PASS][39] -> [INCOMPLETE][40] ([i915#300])
   [39]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10520/shard-skl3/igt@kms_cursor_crc@pipe-b-cursor-suspend.html
   [40]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20894/shard-skl7/igt@kms_cursor_crc@pipe-b-cursor-suspend.html

  * igt@kms_cursor_legacy@2x-flip-vs-cursor-atomic:
    - shard-iclb:         NOTRUN -> [SKIP][41] ([fdo#109274] / [fdo#109278])
   [41]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20894/shard-iclb4/igt@kms_cursor_legacy@2x-flip-vs-cursor-atomic.html

  * igt@kms_cursor_legacy@2x-flip-vs-cursor-legacy:
    - shard-glk:          [PASS][42] -> [FAIL][43] ([i915#72])
   [42]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10520/shard-glk3/igt@kms_cursor_legacy@2x-flip-vs-cursor-legacy.html
   [43]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20894/shard-glk1/igt@kms_cursor_legacy@2x-flip-vs-cursor-legacy.html

  * igt@kms_cursor_legacy@flip-vs-cursor-crc-legacy:
    - shard-skl:          [PASS][44] -> [FAIL][45] ([i915#2346])
   [44]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10520/shard-skl7/igt@kms_cursor_legacy@flip-vs-cursor-crc-legacy.html
   [45]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20894/shard-skl3/igt@kms_cursor_legacy@flip-vs-cursor-crc-legacy.html

  * igt@kms_cursor_legacy@pipe-d-single-bo:
    - shard-apl:          NOTRUN -> [SKIP][46] ([fdo#109271] / [i915#533])
   [46]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20894/shard-apl8/igt@kms_cursor_legacy@pipe-d-single-bo.html

  * igt@kms_cursor_legacy@pipe-d-torture-bo:
    - shard-kbl:          NOTRUN -> [SKIP][47] ([fdo#109271] / [i915#533])
   [47]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20894/shard-kbl6/igt@kms_cursor_legacy@pipe-d-torture-bo.html

  * igt@kms_fbcon_fbt@fbc-suspend:
    - shard-apl:          [PASS][48] -> [INCOMPLETE][49] ([i915#180])
   [48]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10520/shard-apl7/igt@kms_fbcon_fbt@fbc-suspend.html
   [49]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20894/shard-apl2/igt@kms_fbcon_fbt@fbc-suspend.html

  * igt@kms_flip@2x-flip-vs-suspend-interruptible:
    - shard-iclb:         NOTRUN -> [SKIP][50] ([fdo#109274]) +1 similar issue
   [50]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20894/shard-iclb4/igt@kms_flip@2x-flip-vs-suspend-interruptible.html

  * igt@kms_flip@2x-nonexisting-fb:
    - shard-tglb:         NOTRUN -> [SKIP][51] ([fdo#111825]) +1 similar issue
   [51]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20894/shard-tglb1/igt@kms_flip@2x-nonexisting-fb.html

  * igt@kms_flip@flip-vs-absolute-wf_vblank-interruptible@c-edp1:
    - shard-skl:          [PASS][52] -> [FAIL][53] ([i915#2122]) +1 similar issue
   [52]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10520/shard-skl6/igt@kms_flip@flip-vs-absolute-wf_vblank-interruptible@c-edp1.html
   [53]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20894/shard-skl2/igt@kms_flip@flip-vs-absolute-wf_vblank-interruptible@c-edp1.html

  * igt@kms_flip@flip-vs-expired-vblank@a-edp1:
    - shard-skl:          [PASS][54] -> [DMESG-WARN][55] ([i915#1982]) +1 similar issue
   [54]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10520/shard-skl10/igt@kms_flip@flip-vs-expired-vblank@a-edp1.html
   [55]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20894/shard-skl7/igt@kms_flip@flip-vs-expired-vblank@a-edp1.html

  * igt@kms_flip@plain-flip-fb-recreate-interruptible@b-hdmi-a1:
    - shard-glk:          [PASS][56] -> [FAIL][57] ([i915#2122])
   [56]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10520/shard-glk4/igt@kms_flip@plain-flip-fb-recreate-interruptible@b-hdmi-a1.html
   [57]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20894/shard-glk6/igt@kms_flip@plain-flip-fb-recreate-interruptible@b-hdmi-a1.html

  * igt@kms_frontbuffer_tracking@fbc-2p-pri-indfb-multidraw:
    - shard-iclb:         NOTRUN -> [SKIP][58] ([fdo#109280]) +3 similar issues
   [58]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20894/shard-iclb4/igt@kms_frontbuffer_tracking@fbc-2p-pri-indfb-multidraw.html

  * igt@kms_frontbuffer_tracking@fbcpsr-2p-scndscrn-pri-indfb-draw-render:
    - shard-skl:          NOTRUN -> [SKIP][59] ([fdo#109271]) +9 similar issues
   [59]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20894/shard-skl9/igt@kms_frontbuffer_tracking@fbcpsr-2p-scndscrn-pri-indfb-draw-render.html

  * igt@kms_hdr@bpc-switch-suspend:
    - shard-skl:          [PASS][60] -> [FAIL][61] ([i915#1188])
   [60]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10520/shard-skl5/igt@kms_hdr@bpc-switch-suspend.html
   [61]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20894/shard-skl4/igt@kms_hdr@bpc-switch-suspend.html

  * igt@kms_pipe_b_c_ivb@pipe-b-double-modeset-then-modeset-pipe-c:
    - shard-iclb:         NOTRUN -> [SKIP][62] ([fdo#109289])
   [62]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20894/shard-iclb4/igt@kms_pipe_b_c_ivb@pipe-b-double-modeset-then-modeset-pipe-c.html

  * igt@kms_plane_alpha_blend@pipe-a-alpha-7efc:
    - shard-kbl:          NOTRUN -> [FAIL][63] ([fdo#108145] / [i915#265]) +1 similar issue
   [63]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20894/shard-kbl7/igt@kms_plane_alpha_blend@pipe-a-alpha-7efc.html

  * igt@kms_plane_alpha_blend@pipe-b-constant-alpha-max:
    - shard-apl:          NOTRUN -> [FAIL][64] ([fdo#108145] / [i915#265]) +1 similar issue
   [64]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20894/shard-apl3/igt@kms_plane_alpha_blend@pipe-b-constant-alpha-max.html

  * igt@kms_plane_alpha_blend@pipe-b-constant-alpha-min:
    - shard-skl:          [PASS][65] -> [FAIL][66] ([fdo#108145] / [i915#265])
   [65]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10520/shard-skl7/igt@kms_plane_alpha_blend@pipe-b-constant-alpha-min.html
   [66]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20894/shard-skl3/igt@kms_plane_alpha_blend@pipe-b-constant-alpha-min.html

  * igt@kms_plane_alpha_blend@pipe-c-alpha-transparent-fb:
    - shard-kbl:          NOTRUN -> [FAIL][67] ([i915#265])
   [67]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20894/shard-kbl4/igt@kms_plane_alpha_blend@pipe-c-alpha-transparent-fb.html

  * igt@kms_plane_alpha_blend@pipe-d-constant-alpha-min:
    - shard-iclb:         NOTRUN -> [SKIP][68] ([fdo#109278]) +3 similar issues
   [68]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20894/shard-iclb4/igt@kms_plane_alpha_blend@pipe-d-constant-alpha-min.html

  * igt@kms_psr2_sf@overlay-plane-update-sf-dmg-area-4:
    - shard-apl:          NOTRUN -> [SKIP][69] ([fdo#109271] / [i915#658]) +3 similar issues
   [69]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20894/shard-apl7/igt@kms_psr2_sf@overlay-plane-update-sf-dmg-area-4.html

  * igt@kms_psr2_sf@overlay-primary-update-sf-dmg-area-2:
    - shard-iclb:         NOTRUN -> [SKIP][70] ([i915#658])
   [70]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20894/shard-iclb4/igt@kms_psr2_sf@overlay-primary-update-sf-dmg-area-2.html

  * igt@kms_psr2_sf@plane-move-sf-dmg-area-3:
    - shard-kbl:          NOTRUN -> [SKIP][71] ([fdo#109271] / [i915#658]) +1 similar issue
   [71]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20894/shard-kbl4/igt@kms_psr2_sf@plane-move-sf-dmg-area-3.html

  * igt@kms_psr@psr2_basic:
    - shard-iclb:         [PASS][72] -> [SKIP][73] ([fdo#109441]) +2 similar issues
   [72]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10520/shard-iclb2/igt@kms_psr@psr2_basic.html
   [73]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20894/shard-iclb6/igt@kms_psr@psr2_basic.html

  * igt@kms_psr@psr2_cursor_blt:
    - shard-iclb:         NOTRUN -> [SKIP][74] ([fdo#109441])
   [74]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20894/shard-iclb4/igt@kms_psr@psr2_cursor_blt.html

  * igt@kms_setmode@basic:
    - shard-snb:          NOTRUN -> [FAIL][75] ([i915#31])
   [75]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20894/shard-snb2/igt@kms_setmode@basic.html

  * igt@kms_sysfs_edid_timing:
    - shard-skl:          NOTRUN -> [FAIL][76] ([IGT#2])
   [76]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20894/shard-skl9/igt@kms_sysfs_edid_timing.html

  * igt@kms_writeback@writeback-check-output:
    - shard-kbl:          NOTRUN -> [SKIP][77] ([fdo#109271] / [i915#2437])
   [77]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20894/shard-kbl6/igt@kms_writeback@writeback-check-output.html

  * igt@kms_writeback@writeback-pixel-formats:
    - shard-apl:          NOTRUN -> [SKIP][78] ([fdo#109271] / [i915#2437])
   [78]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20894/shard-apl1/igt@kms_writeback@writeback-pixel-formats.html

  * igt@nouveau_crc@pipe-b-ctx-flip-skip-current-frame:
    - shard-iclb:         NOTRUN -> [SKIP][79] ([i915#2530])
   [79]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20894/shard-iclb4/igt@nouveau_crc@pipe-b-ctx-flip-skip-current-frame.html

  * igt@prime_nv_pcopy@test1_macro:
    - shard-iclb:         NOTRUN -> [SKIP][80] ([fdo#109291])
   [80]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20894/shard-iclb4/igt@prime_nv_pcopy@test1_macro.html

  * igt@prime_nv_pcopy@test2:
    - shard-kbl:          NOTRUN -> [SKIP][81] ([fdo#109271]) +104 similar issues
   [81]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20894/shard-kbl6/igt@prime_nv_pcopy@test2.html

  * igt@sysfs_clients@fair-7:
    - shard-tglb:         NOTRUN -> [SKIP][82] ([i915#2994])
   [82]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20894/shard-tglb1/igt@sysfs_clients@fair-7.html

  * igt@sysfs_clients@recycle:
    - shard-kbl:          NOTRUN -> [SKIP][83] ([fdo#109271] / [i915#2994]) +4 similar issues
   [83]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20894/shard-kbl4/igt@sysfs_clients@recycle.html

  * igt@sysfs_clients@sema-10:
    - shard-apl:          NOTRUN -> [SKIP][84] ([fdo#109271] / [i915#2994]) +1 similar issue
   [84]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20894/shard-apl1/igt@sysfs_clients@sema-10.html

  
#### Possible fixes ####

  * igt@gem_eio@hibernate:
    - {shard-rkl}:        [INCOMPLETE][85] ([i915#3189] / [i915#3811] / [i915#3833]) -> [PASS][86]
   [85]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10520/shard-rkl-2/igt@gem_eio@hibernate.html
   [86]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20894/shard-rkl-1/igt@gem_eio@hibernate.html

  * igt@gem_eio@in-flight-suspend:
    - shard-iclb:         [INCOMPLETE][87] -> [PASS][88]
   [87]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10520/shard-iclb3/igt@gem_eio@in-flight-suspend.html
   [88]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20894/shard-iclb4/igt@gem_eio@in-flight-suspend.html

  * igt@gem_eio@unwedge-stress:
    - shard-tglb:         [TIMEOUT][89] ([i915#2369] / [i915#3063] / [i915#3648]) -> [PASS][90]
   [89]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10520/shard-tglb7/igt@gem_eio@unwedge-stress.html
   [90]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20894/shard-tglb6/igt@gem_eio@unwedge-stress.html

  * igt@gem_exec_fair@basic-deadline:
    - shard-glk:          [FAIL][91] ([i915#2846]) -> [PASS][92]
   [91]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10520/shard-glk3/igt@gem_exec_fair@basic-deadline.html
   [92]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20894/shard-glk4/igt@gem_exec_fair@basic-deadline.html

  * igt@gem_exec_fair@basic-none-share@rcs0:
    - shard-iclb:         [FAIL][93] ([i915#2842]) -> [PASS][94]
   [93]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10520/shard-iclb1/igt@gem_exec_fair@basic-none-share@rcs0.html
   [94]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20894/shard-iclb5/igt@gem_exec_fair@basic-none-share@rcs0.html
    - {shard-rkl}:        [FAIL][95] ([i915#2842]) -> [PASS][96]
   [95]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10520/shard-rkl-1/igt@gem_exec_fair@basic-none-share@rcs0.html
   [96]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20894/shard-rkl-5/igt@gem_exec_fair@basic-none-share@rcs0.html

  * igt@gem_exec_fair@basic-pace@rcs0:
    - shard-tglb:         [FAIL][97] ([i915#2842]) -> [PASS][98] +1 similar issue
   [97]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10520/shard-tglb1/igt@gem_exec_fair@basic-pace@rcs0.html
   [98]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20894/shard-tglb7/igt@gem_exec_fair@basic-pace@rcs0.html

  * igt@gem_exec_fair@basic-throttle@rcs0:
    - shard-iclb:         [FAIL][99] ([i915#2849]) -> [PASS][100]
   [99]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10520/shard-iclb2/igt@gem_exec_fair@basic-throttle@rcs0.html
   [100]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20894/shard-iclb6/igt@gem_exec_fair@basic-throttle@rcs0.html

  * igt@gem_exec_suspend@basic-s4-devices:
    - {shard-rkl}:        [INCOMPLETE][101] ([i915#3189] / [i915#3810]) -> [PASS][102]
   [101]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10520/shard-rkl-1/igt@gem_exec_suspend@basic-s4-devices.html
   [102]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20894/shard-rkl-1/igt@gem_exec_suspend@basic-s4-devices.html

  * igt@i915_pm_sseu@full-enable:
    - shard-apl:          [FAIL][103] -> [PASS][104]
   [103]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10520/shard-apl7/igt@i915_pm_sseu@full-enable.html
   [104]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20894/shard-apl1/igt@i915_pm_sseu@full-enable.html

  * igt@i915_selftest@mock@requests:
    - shard-skl:          [INCOMPLETE][105] ([i915#198]) -> [PASS][106]
   [105]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10520/shard-skl6/igt@i915_selftest@mock@requests.html
   [106]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20894/shard-skl2/igt@i915_selftest@mock@requests.html

  * igt@kms_cursor_crc@pipe-a-cursor-suspend:
    - shard-kbl:          [DMESG-WARN][107] ([i915#180]) -> [PASS][108] +3 similar issues
   [107]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10520/shard-kbl3/igt@kms_cursor_crc@pipe-a-cursor-suspend.html
   [108]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20894/shard-kbl3/igt@kms_cursor_crc@pipe-a-cursor-suspend.html

  * igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions:
    - shard-skl:          [FAIL][109] ([i915#2346]) -> [PASS][110]
   [109]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10520/shard-skl5/igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions.html
   [110]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20894/shard-skl5/igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions.html

  * igt@kms_dither@fb-8bpc-vs-panel-8bpc@edp-1-pipe-a:
    - shard-iclb:         [SKIP][111] ([i915#3788]) -> [PASS][112]
   [111]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10520/shard-iclb2/igt@kms_dither@fb-8bpc-vs-panel-8bpc@edp-1-pipe-a.html
   [112]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20894/shard-iclb6/igt@kms_dither@fb-8bpc-vs-panel-8bpc@edp-1-pipe-a.html

  * igt@kms_fbcon_fbt@fbc-suspend:
    - shard-kbl:          [INCOMPLETE][113] ([i915#155] / [i915#180] / [i915#636]) -> [PASS][114]
   [113]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10520/shard-kbl3/igt@kms_fbcon_fbt@fbc-suspend.html
   [114]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20894/shard-kbl4/igt@kms_fbcon_fbt@fbc-suspend.html

  * igt@kms_flip@flip-vs-suspend@c-dp1:
    - shard-apl:          [DMESG-WARN][115] ([i915#180]) -> [PASS][116]
   [115]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10520/shard-apl2/igt@kms_flip@flip-vs-suspend@c-dp1.html
   [116]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20894/shard-apl3/igt@kms_flip@flip-vs-suspend@c-dp1.html

  * igt@kms_flip@plain-flip-fb-recreate-interruptible@b-edp1:
    - shard-skl:          [FAIL][117] ([i915#2122]) -> [PASS][118]
   [117]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10520/shard-skl2/igt@kms_flip@plain-flip-fb-recreate-interruptible@b-edp1.html
   [118]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20894/shard-skl10/igt@kms_flip@plain-flip-fb-recreate-interruptible@b-edp1.html

  * igt@kms_frontbuffer_tracking@fbc-1p-primscrn-pri-indfb-draw-blt:
    - shard-glk:          [FAIL][119] ([i915#1888] / [i915#2546]) -> [PASS][120]
   [119]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10520/shard-glk9/igt@kms_frontbuffer_tracking@fbc-1p-primscrn-pri-indfb-draw-blt.html
   [120]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20894/shard-glk9/igt@kms_frontbuffer_tracking@fbc-1p-primscrn-pri-indfb-draw-blt.html

  * igt@kms_hdr@bpc-switch-dpms:
    - shard-skl:          [FAIL][121] ([i915#1188]) -> [PASS][122]
   [121]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10520/shard-skl4/igt@kms_hdr@bpc-switch-dpms.html
   [122]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20894/shard-skl9/igt@kms_hdr@bpc-switch-dpms.html

  * igt@kms_plane_alpha_blend@pipe-a-coverage-7efc:
    - shard-skl:          [FAIL][123] ([fdo#108145] / [i915#265]) -> [PASS][124]
   [123]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10520/shard-skl2/igt@kms_plane_alpha_blend@pipe-a-coverage-7efc.html
   [124]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20894/shard-skl10/igt@kms_plane_alpha_blend@pipe-a-coverage-7efc.html

  * igt@kms_psr@psr2_sprite_mmap_gtt:
    - shard-iclb:         [SKIP][125] ([fdo#109441]) -> [PASS][126] +2 similar issues
   [125]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10520/shard-iclb4/igt@kms_psr@psr2_sprite_mmap_gtt.html
   [126]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20894/shard-iclb2/igt@kms_psr@psr2_sprite_mmap_gtt.html

  * igt@perf@polling:
    - {shard-rkl}:        [FAIL][127] ([i915#1542]) -> [PASS][128]
   [127]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10520/shard-rkl-5/igt@perf@polling.html
   [128]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20894/shard-rkl-1/igt@perf@polling.html

  * igt@perf@polling-small-buf:
    - shard-skl:          [FAIL][129] ([i915#1722]) -> [PASS][130]
   [129]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10520/shard-skl9/igt@perf@polling-small-buf.html
   [130]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20894/shard-skl6/igt@perf@polling-small-buf.html

  * igt@sysfs_timeslice_duration@timeout@rcs0:
    - {shard-rkl}:        [FAIL][131] ([i915#3259]) -> [PASS][132]
   [131]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10520/shard-rkl-1/igt@sysfs_timeslice_duration@timeout@rcs0.html
   [132]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20894/shard-rkl-1/igt@sysfs_timeslice_duration@timeout@rcs0.html

  
#### Warnings ####

  * igt@i915_pm_rc6_residency@rc6-fence:
    - shard-iclb:         [WARN][133] ([i915#2684]) -> [WARN][134] ([i915#1804] / [i915#2684])
   [133]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10520/shard-iclb2/igt@i915_pm_rc6_residency@rc6-fence.html
   [134]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20894/shard-iclb6/igt@i915_pm_rc6_residency@rc6-fence.html

  * igt@kms_big_fb@x-tiled-max-hw-stride-32bpp-rotate-180-async-flip:
    - shard-skl:          [FAIL][135] ([i915#3722]) -> [FAIL][136] ([i915#1888] / [i915#3722])
   [135]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10520/shard-skl3/igt@kms_big_fb@x-tiled-max-hw-stride-32bpp-rotate-180-async-flip.html
   [136]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20894/shard-skl10/igt@kms_big_fb@x-tiled-max-hw-stride-32bpp-rotate-180-async-flip.html

  * igt@kms_big_fb@y-tiled-max-hw-stride-32bpp-rotate-0-async-flip:
    - shard-skl:          [FAIL][137] ([i915#3722]) -> [FAIL][138] ([i915#3743])
   [137]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10520/shard-skl7/igt@kms_big_fb@y-tiled-max-hw-stride-32bpp-rotate-0-async-flip.html
   [138]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20894/shard-skl3/igt@kms_big_fb@y-tiled-max-hw-stride-32bpp-rotate-0-async-flip.html

  * igt@kms_psr2_sf@overlay-plane-update-sf-dmg-area-2:
    - shard-iclb:         [SKIP][139] ([i915#2920]) -> [SKIP][140] ([i915#658]) +1 similar issue
   [139]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10520/shard-iclb2/igt@kms_psr2_sf@overlay-plane-update-sf-dmg-area-2.html
   [140]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20894/shard-iclb4/igt@kms_psr2_sf@overlay-plane-update-sf-dmg-area-2.html

  * igt@kms_psr2_sf@primary-plane-update-sf-dmg-area-4:
    - shard-iclb:         [SKIP][141] ([i915#658]) -> [SKIP][142] ([i915#2920]) +1 similar issue
   [141]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10520/shard-iclb6/igt@kms_psr2_sf@primary-plane-update-sf-dmg-area-4.html
   [142]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20894/shard-iclb2/igt@kms_psr2_sf@primary-plane-update-sf-dmg-area-4.html

  * igt@runner@aborted:
    - shard-kbl:          ([FAIL][143], [FAIL][144], [FAIL][145], [FAIL][146]) ([i915#180]

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20894/index.html

[-- Attachment #2: Type: text/html, Size: 33573 bytes --]

Re: [Intel-gfx] [PATCH 1/5] drm/i915/fdi: move intel_update_fdi_pll_freq to intel_fdi.c

[Rodrigo Vivi]

On Wed, Aug 25, 2021 at 06:47:48PM +0300, Jani Nikula wrote:
> Move FDI related functions to intel_fdi.c. Rename to have intel_fdi
> prefix while at it.
> 
> Signed-off-by: Jani Nikula <jani.nikula@intel.com>

Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>

> ---
>  drivers/gpu/drm/i915/display/intel_display.c | 18 +-----------------
>  drivers/gpu/drm/i915/display/intel_fdi.c     | 16 ++++++++++++++++
>  drivers/gpu/drm/i915/display/intel_fdi.h     |  1 +
>  3 files changed, 18 insertions(+), 17 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
> index 794690c0dba5..3a9afe04ce0a 100644
> --- a/drivers/gpu/drm/i915/display/intel_display.c
> +++ b/drivers/gpu/drm/i915/display/intel_display.c
> @@ -11564,22 +11564,6 @@ static void sanitize_watermarks(struct drm_i915_private *dev_priv)
>  	drm_modeset_acquire_fini(&ctx);
>  }
>  
> -static void intel_update_fdi_pll_freq(struct drm_i915_private *dev_priv)
> -{
> -	if (IS_IRONLAKE(dev_priv)) {
> -		u32 fdi_pll_clk =
> -			intel_de_read(dev_priv, FDI_PLL_BIOS_0) & FDI_PLL_FB_CLOCK_MASK;
> -
> -		dev_priv->fdi_pll_freq = (fdi_pll_clk + 2) * 10000;
> -	} else if (IS_SANDYBRIDGE(dev_priv) || IS_IVYBRIDGE(dev_priv)) {
> -		dev_priv->fdi_pll_freq = 270000;
> -	} else {
> -		return;
> -	}
> -
> -	drm_dbg(&dev_priv->drm, "FDI PLL freq=%d\n", dev_priv->fdi_pll_freq);
> -}
> -
>  static int intel_initial_commit(struct drm_device *dev)
>  {
>  	struct drm_atomic_state *state = NULL;
> @@ -11833,7 +11817,7 @@ int intel_modeset_init_nogem(struct drm_i915_private *i915)
>  
>  	intel_plane_possible_crtcs_init(i915);
>  	intel_shared_dpll_init(dev);
> -	intel_update_fdi_pll_freq(i915);
> +	intel_fdi_pll_freq_update(i915);
>  
>  	intel_update_czclk(i915);
>  	intel_modeset_init_hw(i915);
> diff --git a/drivers/gpu/drm/i915/display/intel_fdi.c b/drivers/gpu/drm/i915/display/intel_fdi.c
> index 13f8ba4c9188..88a78dafd54d 100644
> --- a/drivers/gpu/drm/i915/display/intel_fdi.c
> +++ b/drivers/gpu/drm/i915/display/intel_fdi.c
> @@ -95,6 +95,22 @@ static int ilk_check_fdi_lanes(struct drm_device *dev, enum pipe pipe,
>  	}
>  }
>  
> +void intel_fdi_pll_freq_update(struct drm_i915_private *i915)
> +{
> +	if (IS_IRONLAKE(i915)) {
> +		u32 fdi_pll_clk =
> +			intel_de_read(i915, FDI_PLL_BIOS_0) & FDI_PLL_FB_CLOCK_MASK;
> +
> +		i915->fdi_pll_freq = (fdi_pll_clk + 2) * 10000;
> +	} else if (IS_SANDYBRIDGE(i915) || IS_IVYBRIDGE(i915)) {
> +		i915->fdi_pll_freq = 270000;
> +	} else {
> +		return;
> +	}
> +
> +	drm_dbg(&i915->drm, "FDI PLL freq=%d\n", i915->fdi_pll_freq);
> +}
> +
>  int intel_fdi_link_freq(struct drm_i915_private *i915,
>  			const struct intel_crtc_state *pipe_config)
>  {
> diff --git a/drivers/gpu/drm/i915/display/intel_fdi.h b/drivers/gpu/drm/i915/display/intel_fdi.h
> index 2c8ffd9ceaed..cda9a32c25ba 100644
> --- a/drivers/gpu/drm/i915/display/intel_fdi.h
> +++ b/drivers/gpu/drm/i915/display/intel_fdi.h
> @@ -23,5 +23,6 @@ void ilk_fdi_pll_enable(const struct intel_crtc_state *crtc_state);
>  void intel_fdi_init_hook(struct drm_i915_private *dev_priv);
>  void hsw_fdi_link_train(struct intel_encoder *encoder,
>  			const struct intel_crtc_state *crtc_state);
> +void intel_fdi_pll_freq_update(struct drm_i915_private *i915);
>  
>  #endif
> -- 
> 2.20.1
> 

Re: [Intel-gfx] [PATCH 2/5] drm/i915/fdi: move fdi bc bifurcation functions to intel_fdi.c

[Rodrigo Vivi]

On Wed, Aug 25, 2021 at 06:47:49PM +0300, Jani Nikula wrote:
> Move FDI related functions to intel_fdi.c. Don't bother with renaming as
> we'll make the functions static shortly.
> 
> Signed-off-by: Jani Nikula <jani.nikula@intel.com>

Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>

> ---
>  drivers/gpu/drm/i915/display/intel_display.c | 49 --------------------
>  drivers/gpu/drm/i915/display/intel_fdi.c     | 49 ++++++++++++++++++++
>  drivers/gpu/drm/i915/display/intel_fdi.h     |  1 +
>  3 files changed, 50 insertions(+), 49 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
> index 3a9afe04ce0a..f62bbff7a6be 100644
> --- a/drivers/gpu/drm/i915/display/intel_display.c
> +++ b/drivers/gpu/drm/i915/display/intel_display.c
> @@ -2010,55 +2010,6 @@ static void ilk_pch_transcoder_set_timings(const struct intel_crtc_state *crtc_s
>  		       intel_de_read(dev_priv, VSYNCSHIFT(cpu_transcoder)));
>  }
>  
> -static void cpt_set_fdi_bc_bifurcation(struct drm_i915_private *dev_priv, bool enable)
> -{
> -	u32 temp;
> -
> -	temp = intel_de_read(dev_priv, SOUTH_CHICKEN1);
> -	if (!!(temp & FDI_BC_BIFURCATION_SELECT) == enable)
> -		return;
> -
> -	drm_WARN_ON(&dev_priv->drm,
> -		    intel_de_read(dev_priv, FDI_RX_CTL(PIPE_B)) &
> -		    FDI_RX_ENABLE);
> -	drm_WARN_ON(&dev_priv->drm,
> -		    intel_de_read(dev_priv, FDI_RX_CTL(PIPE_C)) &
> -		    FDI_RX_ENABLE);
> -
> -	temp &= ~FDI_BC_BIFURCATION_SELECT;
> -	if (enable)
> -		temp |= FDI_BC_BIFURCATION_SELECT;
> -
> -	drm_dbg_kms(&dev_priv->drm, "%sabling fdi C rx\n",
> -		    enable ? "en" : "dis");
> -	intel_de_write(dev_priv, SOUTH_CHICKEN1, temp);
> -	intel_de_posting_read(dev_priv, SOUTH_CHICKEN1);
> -}
> -
> -static void ivb_update_fdi_bc_bifurcation(const struct intel_crtc_state *crtc_state)
> -{
> -	struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);
> -	struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
> -
> -	switch (crtc->pipe) {
> -	case PIPE_A:
> -		break;
> -	case PIPE_B:
> -		if (crtc_state->fdi_lanes > 2)
> -			cpt_set_fdi_bc_bifurcation(dev_priv, false);
> -		else
> -			cpt_set_fdi_bc_bifurcation(dev_priv, true);
> -
> -		break;
> -	case PIPE_C:
> -		cpt_set_fdi_bc_bifurcation(dev_priv, true);
> -
> -		break;
> -	default:
> -		BUG();
> -	}
> -}
> -
>  /*
>   * Finds the encoder associated with the given CRTC. This can only be
>   * used when we know that the CRTC isn't feeding multiple encoders!
> diff --git a/drivers/gpu/drm/i915/display/intel_fdi.c b/drivers/gpu/drm/i915/display/intel_fdi.c
> index 88a78dafd54d..f8ffd5c032ae 100644
> --- a/drivers/gpu/drm/i915/display/intel_fdi.c
> +++ b/drivers/gpu/drm/i915/display/intel_fdi.c
> @@ -170,6 +170,55 @@ int ilk_fdi_compute_config(struct intel_crtc *crtc,
>  	return ret;
>  }
>  
> +static void cpt_set_fdi_bc_bifurcation(struct drm_i915_private *dev_priv, bool enable)
> +{
> +	u32 temp;
> +
> +	temp = intel_de_read(dev_priv, SOUTH_CHICKEN1);
> +	if (!!(temp & FDI_BC_BIFURCATION_SELECT) == enable)
> +		return;
> +
> +	drm_WARN_ON(&dev_priv->drm,
> +		    intel_de_read(dev_priv, FDI_RX_CTL(PIPE_B)) &
> +		    FDI_RX_ENABLE);
> +	drm_WARN_ON(&dev_priv->drm,
> +		    intel_de_read(dev_priv, FDI_RX_CTL(PIPE_C)) &
> +		    FDI_RX_ENABLE);
> +
> +	temp &= ~FDI_BC_BIFURCATION_SELECT;
> +	if (enable)
> +		temp |= FDI_BC_BIFURCATION_SELECT;
> +
> +	drm_dbg_kms(&dev_priv->drm, "%sabling fdi C rx\n",
> +		    enable ? "en" : "dis");
> +	intel_de_write(dev_priv, SOUTH_CHICKEN1, temp);
> +	intel_de_posting_read(dev_priv, SOUTH_CHICKEN1);
> +}
> +
> +void ivb_update_fdi_bc_bifurcation(const struct intel_crtc_state *crtc_state)
> +{
> +	struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);
> +	struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
> +
> +	switch (crtc->pipe) {
> +	case PIPE_A:
> +		break;
> +	case PIPE_B:
> +		if (crtc_state->fdi_lanes > 2)
> +			cpt_set_fdi_bc_bifurcation(dev_priv, false);
> +		else
> +			cpt_set_fdi_bc_bifurcation(dev_priv, true);
> +
> +		break;
> +	case PIPE_C:
> +		cpt_set_fdi_bc_bifurcation(dev_priv, true);
> +
> +		break;
> +	default:
> +		BUG();
> +	}
> +}
> +
>  void intel_fdi_normal_train(struct intel_crtc *crtc)
>  {
>  	struct drm_device *dev = crtc->base.dev;
> diff --git a/drivers/gpu/drm/i915/display/intel_fdi.h b/drivers/gpu/drm/i915/display/intel_fdi.h
> index cda9a32c25ba..135802e4da68 100644
> --- a/drivers/gpu/drm/i915/display/intel_fdi.h
> +++ b/drivers/gpu/drm/i915/display/intel_fdi.h
> @@ -16,6 +16,7 @@ int intel_fdi_link_freq(struct drm_i915_private *i915,
>  			const struct intel_crtc_state *pipe_config);
>  int ilk_fdi_compute_config(struct intel_crtc *intel_crtc,
>  			   struct intel_crtc_state *pipe_config);
> +void ivb_update_fdi_bc_bifurcation(const struct intel_crtc_state *crtc_state);
>  void intel_fdi_normal_train(struct intel_crtc *crtc);
>  void ilk_fdi_disable(struct intel_crtc *crtc);
>  void ilk_fdi_pll_disable(struct intel_crtc *intel_crtc);
> -- 
> 2.20.1
> 

Re: [Intel-gfx] [PATCH 3/5] drm/i915/fdi: move more FDI stuff to FDI link train hooks

[Rodrigo Vivi]

On Wed, Aug 25, 2021 at 06:47:50PM +0300, Jani Nikula wrote:
> Accept slight duplication in the fdi link train hooks in exchange for
> simplification in ilk_pch_enable(). This lets us make
> ivb_update_fdi_bc_bifurcation() static again, now in intel_fdi.c.

For a moment I thought there were some order changes of the calls here,
but in the end it is crtc_enable and then link_training, so it looks
okay. Also CI passed and I trust your experiments and experience on
the order here.

So,

Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>



> 
> Signed-off-by: Jani Nikula <jani.nikula@intel.com>
> ---
>  drivers/gpu/drm/i915/display/intel_display.c |  8 -------
>  drivers/gpu/drm/i915/display/intel_fdi.c     | 25 +++++++++++++++++++-
>  drivers/gpu/drm/i915/display/intel_fdi.h     |  1 -
>  3 files changed, 24 insertions(+), 10 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
> index f62bbff7a6be..e7b6969cd2e2 100644
> --- a/drivers/gpu/drm/i915/display/intel_display.c
> +++ b/drivers/gpu/drm/i915/display/intel_display.c
> @@ -2059,14 +2059,6 @@ static void ilk_pch_enable(const struct intel_atomic_state *state,
>  
>  	assert_pch_transcoder_disabled(dev_priv, pipe);
>  
> -	if (IS_IVYBRIDGE(dev_priv))
> -		ivb_update_fdi_bc_bifurcation(crtc_state);
> -
> -	/* Write the TU size bits before fdi link training, so that error
> -	 * detection works. */
> -	intel_de_write(dev_priv, FDI_RX_TUSIZE1(pipe),
> -		       intel_de_read(dev_priv, PIPE_DATA_M1(pipe)) & TU_SIZE_MASK);
> -
>  	/* For PCH output, training FDI link */
>  	dev_priv->display.fdi_link_train(crtc, crtc_state);
>  
> diff --git a/drivers/gpu/drm/i915/display/intel_fdi.c b/drivers/gpu/drm/i915/display/intel_fdi.c
> index f8ffd5c032ae..f5e42985084a 100644
> --- a/drivers/gpu/drm/i915/display/intel_fdi.c
> +++ b/drivers/gpu/drm/i915/display/intel_fdi.c
> @@ -195,7 +195,7 @@ static void cpt_set_fdi_bc_bifurcation(struct drm_i915_private *dev_priv, bool e
>  	intel_de_posting_read(dev_priv, SOUTH_CHICKEN1);
>  }
>  
> -void ivb_update_fdi_bc_bifurcation(const struct intel_crtc_state *crtc_state)
> +static void ivb_update_fdi_bc_bifurcation(const struct intel_crtc_state *crtc_state)
>  {
>  	struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);
>  	struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
> @@ -270,6 +270,13 @@ static void ilk_fdi_link_train(struct intel_crtc *crtc,
>  	i915_reg_t reg;
>  	u32 temp, tries;
>  
> +	/*
> +	 * Write the TU size bits before fdi link training, so that error
> +	 * detection works.
> +	 */
> +	intel_de_write(dev_priv, FDI_RX_TUSIZE1(pipe),
> +		       intel_de_read(dev_priv, PIPE_DATA_M1(pipe)) & TU_SIZE_MASK);
> +
>  	/* FDI needs bits from pipe first */
>  	assert_pipe_enabled(dev_priv, crtc_state->cpu_transcoder);
>  
> @@ -373,6 +380,13 @@ static void gen6_fdi_link_train(struct intel_crtc *crtc,
>  	i915_reg_t reg;
>  	u32 temp, i, retry;
>  
> +	/*
> +	 * Write the TU size bits before fdi link training, so that error
> +	 * detection works.
> +	 */
> +	intel_de_write(dev_priv, FDI_RX_TUSIZE1(pipe),
> +		       intel_de_read(dev_priv, PIPE_DATA_M1(pipe)) & TU_SIZE_MASK);
> +
>  	/* Train 1: umask FDI RX Interrupt symbol_lock and bit_lock bit
>  	   for train result */
>  	reg = FDI_RX_IMR(pipe);
> @@ -510,6 +524,15 @@ static void ivb_manual_fdi_link_train(struct intel_crtc *crtc,
>  	i915_reg_t reg;
>  	u32 temp, i, j;
>  
> +	ivb_update_fdi_bc_bifurcation(crtc_state);
> +
> +	/*
> +	 * Write the TU size bits before fdi link training, so that error
> +	 * detection works.
> +	 */
> +	intel_de_write(dev_priv, FDI_RX_TUSIZE1(pipe),
> +		       intel_de_read(dev_priv, PIPE_DATA_M1(pipe)) & TU_SIZE_MASK);
> +
>  	/* Train 1: umask FDI RX Interrupt symbol_lock and bit_lock bit
>  	   for train result */
>  	reg = FDI_RX_IMR(pipe);
> diff --git a/drivers/gpu/drm/i915/display/intel_fdi.h b/drivers/gpu/drm/i915/display/intel_fdi.h
> index 135802e4da68..cda9a32c25ba 100644
> --- a/drivers/gpu/drm/i915/display/intel_fdi.h
> +++ b/drivers/gpu/drm/i915/display/intel_fdi.h
> @@ -16,7 +16,6 @@ int intel_fdi_link_freq(struct drm_i915_private *i915,
>  			const struct intel_crtc_state *pipe_config);
>  int ilk_fdi_compute_config(struct intel_crtc *intel_crtc,
>  			   struct intel_crtc_state *pipe_config);
> -void ivb_update_fdi_bc_bifurcation(const struct intel_crtc_state *crtc_state);
>  void intel_fdi_normal_train(struct intel_crtc *crtc);
>  void ilk_fdi_disable(struct intel_crtc *crtc);
>  void ilk_fdi_pll_disable(struct intel_crtc *intel_crtc);
> -- 
> 2.20.1
> 

Re: [Intel-gfx] [PATCH 4/5] drm/i915/fdi: move fdi mphy reset and programming to intel_fdi.c

[Rodrigo Vivi]

On Wed, Aug 25, 2021 at 06:47:51PM +0300, Jani Nikula wrote:
> This fairly detailed stuff that really has no place in
> intel_display.c. Combine the calls into one to avoid exposing both.
> 
> Signed-off-by: Jani Nikula <jani.nikula@intel.com>

Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>

> ---
>  drivers/gpu/drm/i915/display/intel_display.c | 102 +------------------
>  drivers/gpu/drm/i915/display/intel_fdi.c     | 100 ++++++++++++++++++
>  drivers/gpu/drm/i915/display/intel_fdi.h     |   1 +
>  3 files changed, 103 insertions(+), 100 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
> index e7b6969cd2e2..c8da214083b5 100644
> --- a/drivers/gpu/drm/i915/display/intel_display.c
> +++ b/drivers/gpu/drm/i915/display/intel_display.c
> @@ -4916,102 +4916,6 @@ static void ilk_init_pch_refclk(struct drm_i915_private *dev_priv)
>  	BUG_ON(val != final);
>  }
>  
> -static void lpt_reset_fdi_mphy(struct drm_i915_private *dev_priv)
> -{
> -	u32 tmp;
> -
> -	tmp = intel_de_read(dev_priv, SOUTH_CHICKEN2);
> -	tmp |= FDI_MPHY_IOSFSB_RESET_CTL;
> -	intel_de_write(dev_priv, SOUTH_CHICKEN2, tmp);
> -
> -	if (wait_for_us(intel_de_read(dev_priv, SOUTH_CHICKEN2) &
> -			FDI_MPHY_IOSFSB_RESET_STATUS, 100))
> -		drm_err(&dev_priv->drm, "FDI mPHY reset assert timeout\n");
> -
> -	tmp = intel_de_read(dev_priv, SOUTH_CHICKEN2);
> -	tmp &= ~FDI_MPHY_IOSFSB_RESET_CTL;
> -	intel_de_write(dev_priv, SOUTH_CHICKEN2, tmp);
> -
> -	if (wait_for_us((intel_de_read(dev_priv, SOUTH_CHICKEN2) &
> -			 FDI_MPHY_IOSFSB_RESET_STATUS) == 0, 100))
> -		drm_err(&dev_priv->drm, "FDI mPHY reset de-assert timeout\n");
> -}
> -
> -/* WaMPhyProgramming:hsw */
> -static void lpt_program_fdi_mphy(struct drm_i915_private *dev_priv)
> -{
> -	u32 tmp;
> -
> -	tmp = intel_sbi_read(dev_priv, 0x8008, SBI_MPHY);
> -	tmp &= ~(0xFF << 24);
> -	tmp |= (0x12 << 24);
> -	intel_sbi_write(dev_priv, 0x8008, tmp, SBI_MPHY);
> -
> -	tmp = intel_sbi_read(dev_priv, 0x2008, SBI_MPHY);
> -	tmp |= (1 << 11);
> -	intel_sbi_write(dev_priv, 0x2008, tmp, SBI_MPHY);
> -
> -	tmp = intel_sbi_read(dev_priv, 0x2108, SBI_MPHY);
> -	tmp |= (1 << 11);
> -	intel_sbi_write(dev_priv, 0x2108, tmp, SBI_MPHY);
> -
> -	tmp = intel_sbi_read(dev_priv, 0x206C, SBI_MPHY);
> -	tmp |= (1 << 24) | (1 << 21) | (1 << 18);
> -	intel_sbi_write(dev_priv, 0x206C, tmp, SBI_MPHY);
> -
> -	tmp = intel_sbi_read(dev_priv, 0x216C, SBI_MPHY);
> -	tmp |= (1 << 24) | (1 << 21) | (1 << 18);
> -	intel_sbi_write(dev_priv, 0x216C, tmp, SBI_MPHY);
> -
> -	tmp = intel_sbi_read(dev_priv, 0x2080, SBI_MPHY);
> -	tmp &= ~(7 << 13);
> -	tmp |= (5 << 13);
> -	intel_sbi_write(dev_priv, 0x2080, tmp, SBI_MPHY);
> -
> -	tmp = intel_sbi_read(dev_priv, 0x2180, SBI_MPHY);
> -	tmp &= ~(7 << 13);
> -	tmp |= (5 << 13);
> -	intel_sbi_write(dev_priv, 0x2180, tmp, SBI_MPHY);
> -
> -	tmp = intel_sbi_read(dev_priv, 0x208C, SBI_MPHY);
> -	tmp &= ~0xFF;
> -	tmp |= 0x1C;
> -	intel_sbi_write(dev_priv, 0x208C, tmp, SBI_MPHY);
> -
> -	tmp = intel_sbi_read(dev_priv, 0x218C, SBI_MPHY);
> -	tmp &= ~0xFF;
> -	tmp |= 0x1C;
> -	intel_sbi_write(dev_priv, 0x218C, tmp, SBI_MPHY);
> -
> -	tmp = intel_sbi_read(dev_priv, 0x2098, SBI_MPHY);
> -	tmp &= ~(0xFF << 16);
> -	tmp |= (0x1C << 16);
> -	intel_sbi_write(dev_priv, 0x2098, tmp, SBI_MPHY);
> -
> -	tmp = intel_sbi_read(dev_priv, 0x2198, SBI_MPHY);
> -	tmp &= ~(0xFF << 16);
> -	tmp |= (0x1C << 16);
> -	intel_sbi_write(dev_priv, 0x2198, tmp, SBI_MPHY);
> -
> -	tmp = intel_sbi_read(dev_priv, 0x20C4, SBI_MPHY);
> -	tmp |= (1 << 27);
> -	intel_sbi_write(dev_priv, 0x20C4, tmp, SBI_MPHY);
> -
> -	tmp = intel_sbi_read(dev_priv, 0x21C4, SBI_MPHY);
> -	tmp |= (1 << 27);
> -	intel_sbi_write(dev_priv, 0x21C4, tmp, SBI_MPHY);
> -
> -	tmp = intel_sbi_read(dev_priv, 0x20EC, SBI_MPHY);
> -	tmp &= ~(0xF << 28);
> -	tmp |= (4 << 28);
> -	intel_sbi_write(dev_priv, 0x20EC, tmp, SBI_MPHY);
> -
> -	tmp = intel_sbi_read(dev_priv, 0x21EC, SBI_MPHY);
> -	tmp &= ~(0xF << 28);
> -	tmp |= (4 << 28);
> -	intel_sbi_write(dev_priv, 0x21EC, tmp, SBI_MPHY);
> -}
> -
>  /* Implements 3 different sequences from BSpec chapter "Display iCLK
>   * Programming" based on the parameters passed:
>   * - Sequence to enable CLKOUT_DP
> @@ -5044,10 +4948,8 @@ static void lpt_enable_clkout_dp(struct drm_i915_private *dev_priv,
>  		tmp &= ~SBI_SSCCTL_PATHALT;
>  		intel_sbi_write(dev_priv, SBI_SSCCTL, tmp, SBI_ICLK);
>  
> -		if (with_fdi) {
> -			lpt_reset_fdi_mphy(dev_priv);
> -			lpt_program_fdi_mphy(dev_priv);
> -		}
> +		if (with_fdi)
> +			lpt_fdi_program_mphy(dev_priv);
>  	}
>  
>  	reg = HAS_PCH_LPT_LP(dev_priv) ? SBI_GEN0 : SBI_DBUFF0;
> diff --git a/drivers/gpu/drm/i915/display/intel_fdi.c b/drivers/gpu/drm/i915/display/intel_fdi.c
> index f5e42985084a..cc83a6532a71 100644
> --- a/drivers/gpu/drm/i915/display/intel_fdi.c
> +++ b/drivers/gpu/drm/i915/display/intel_fdi.c
> @@ -2,11 +2,13 @@
>  /*
>   * Copyright © 2020 Intel Corporation
>   */
> +
>  #include "intel_atomic.h"
>  #include "intel_ddi.h"
>  #include "intel_de.h"
>  #include "intel_display_types.h"
>  #include "intel_fdi.h"
> +#include "intel_sideband.h"
>  
>  /* units of 100MHz */
>  static int pipe_required_fdi_lanes(struct intel_crtc_state *crtc_state)
> @@ -904,6 +906,104 @@ void ilk_fdi_disable(struct intel_crtc *crtc)
>  	udelay(100);
>  }
>  
> +static void lpt_fdi_reset_mphy(struct drm_i915_private *dev_priv)
> +{
> +	u32 tmp;
> +
> +	tmp = intel_de_read(dev_priv, SOUTH_CHICKEN2);
> +	tmp |= FDI_MPHY_IOSFSB_RESET_CTL;
> +	intel_de_write(dev_priv, SOUTH_CHICKEN2, tmp);
> +
> +	if (wait_for_us(intel_de_read(dev_priv, SOUTH_CHICKEN2) &
> +			FDI_MPHY_IOSFSB_RESET_STATUS, 100))
> +		drm_err(&dev_priv->drm, "FDI mPHY reset assert timeout\n");
> +
> +	tmp = intel_de_read(dev_priv, SOUTH_CHICKEN2);
> +	tmp &= ~FDI_MPHY_IOSFSB_RESET_CTL;
> +	intel_de_write(dev_priv, SOUTH_CHICKEN2, tmp);
> +
> +	if (wait_for_us((intel_de_read(dev_priv, SOUTH_CHICKEN2) &
> +			 FDI_MPHY_IOSFSB_RESET_STATUS) == 0, 100))
> +		drm_err(&dev_priv->drm, "FDI mPHY reset de-assert timeout\n");
> +}
> +
> +/* WaMPhyProgramming:hsw */
> +void lpt_fdi_program_mphy(struct drm_i915_private *dev_priv)
> +{
> +	u32 tmp;
> +
> +	lpt_fdi_reset_mphy(dev_priv);
> +
> +	tmp = intel_sbi_read(dev_priv, 0x8008, SBI_MPHY);
> +	tmp &= ~(0xFF << 24);
> +	tmp |= (0x12 << 24);
> +	intel_sbi_write(dev_priv, 0x8008, tmp, SBI_MPHY);
> +
> +	tmp = intel_sbi_read(dev_priv, 0x2008, SBI_MPHY);
> +	tmp |= (1 << 11);
> +	intel_sbi_write(dev_priv, 0x2008, tmp, SBI_MPHY);
> +
> +	tmp = intel_sbi_read(dev_priv, 0x2108, SBI_MPHY);
> +	tmp |= (1 << 11);
> +	intel_sbi_write(dev_priv, 0x2108, tmp, SBI_MPHY);
> +
> +	tmp = intel_sbi_read(dev_priv, 0x206C, SBI_MPHY);
> +	tmp |= (1 << 24) | (1 << 21) | (1 << 18);
> +	intel_sbi_write(dev_priv, 0x206C, tmp, SBI_MPHY);
> +
> +	tmp = intel_sbi_read(dev_priv, 0x216C, SBI_MPHY);
> +	tmp |= (1 << 24) | (1 << 21) | (1 << 18);
> +	intel_sbi_write(dev_priv, 0x216C, tmp, SBI_MPHY);
> +
> +	tmp = intel_sbi_read(dev_priv, 0x2080, SBI_MPHY);
> +	tmp &= ~(7 << 13);
> +	tmp |= (5 << 13);
> +	intel_sbi_write(dev_priv, 0x2080, tmp, SBI_MPHY);
> +
> +	tmp = intel_sbi_read(dev_priv, 0x2180, SBI_MPHY);
> +	tmp &= ~(7 << 13);
> +	tmp |= (5 << 13);
> +	intel_sbi_write(dev_priv, 0x2180, tmp, SBI_MPHY);
> +
> +	tmp = intel_sbi_read(dev_priv, 0x208C, SBI_MPHY);
> +	tmp &= ~0xFF;
> +	tmp |= 0x1C;
> +	intel_sbi_write(dev_priv, 0x208C, tmp, SBI_MPHY);
> +
> +	tmp = intel_sbi_read(dev_priv, 0x218C, SBI_MPHY);
> +	tmp &= ~0xFF;
> +	tmp |= 0x1C;
> +	intel_sbi_write(dev_priv, 0x218C, tmp, SBI_MPHY);
> +
> +	tmp = intel_sbi_read(dev_priv, 0x2098, SBI_MPHY);
> +	tmp &= ~(0xFF << 16);
> +	tmp |= (0x1C << 16);
> +	intel_sbi_write(dev_priv, 0x2098, tmp, SBI_MPHY);
> +
> +	tmp = intel_sbi_read(dev_priv, 0x2198, SBI_MPHY);
> +	tmp &= ~(0xFF << 16);
> +	tmp |= (0x1C << 16);
> +	intel_sbi_write(dev_priv, 0x2198, tmp, SBI_MPHY);
> +
> +	tmp = intel_sbi_read(dev_priv, 0x20C4, SBI_MPHY);
> +	tmp |= (1 << 27);
> +	intel_sbi_write(dev_priv, 0x20C4, tmp, SBI_MPHY);
> +
> +	tmp = intel_sbi_read(dev_priv, 0x21C4, SBI_MPHY);
> +	tmp |= (1 << 27);
> +	intel_sbi_write(dev_priv, 0x21C4, tmp, SBI_MPHY);
> +
> +	tmp = intel_sbi_read(dev_priv, 0x20EC, SBI_MPHY);
> +	tmp &= ~(0xF << 28);
> +	tmp |= (4 << 28);
> +	intel_sbi_write(dev_priv, 0x20EC, tmp, SBI_MPHY);
> +
> +	tmp = intel_sbi_read(dev_priv, 0x21EC, SBI_MPHY);
> +	tmp &= ~(0xF << 28);
> +	tmp |= (4 << 28);
> +	intel_sbi_write(dev_priv, 0x21EC, tmp, SBI_MPHY);
> +}
> +
>  void
>  intel_fdi_init_hook(struct drm_i915_private *dev_priv)
>  {
> diff --git a/drivers/gpu/drm/i915/display/intel_fdi.h b/drivers/gpu/drm/i915/display/intel_fdi.h
> index cda9a32c25ba..60acf2133145 100644
> --- a/drivers/gpu/drm/i915/display/intel_fdi.h
> +++ b/drivers/gpu/drm/i915/display/intel_fdi.h
> @@ -24,5 +24,6 @@ void intel_fdi_init_hook(struct drm_i915_private *dev_priv);
>  void hsw_fdi_link_train(struct intel_encoder *encoder,
>  			const struct intel_crtc_state *crtc_state);
>  void intel_fdi_pll_freq_update(struct drm_i915_private *i915);
> +void lpt_fdi_program_mphy(struct drm_i915_private *i915);
>  
>  #endif
> -- 
> 2.20.1
> 

Re: [Intel-gfx] [PATCH 5/5] drm/i915/fdi: convert BUG()'s to MISSING_CASE()

[Rodrigo Vivi]

On Wed, Aug 25, 2021 at 06:47:52PM +0300, Jani Nikula wrote:
> These shouldn't happen, but in the off chance they do, we'll want a
> warning rather than panic.

looks better indeed:

Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>


> 
> Signed-off-by: Jani Nikula <jani.nikula@intel.com>
> ---
>  drivers/gpu/drm/i915/display/intel_fdi.c | 5 +++--
>  1 file changed, 3 insertions(+), 2 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_fdi.c b/drivers/gpu/drm/i915/display/intel_fdi.c
> index cc83a6532a71..fc09b781f15f 100644
> --- a/drivers/gpu/drm/i915/display/intel_fdi.c
> +++ b/drivers/gpu/drm/i915/display/intel_fdi.c
> @@ -93,7 +93,8 @@ static int ilk_check_fdi_lanes(struct drm_device *dev, enum pipe pipe,
>  		}
>  		return 0;
>  	default:
> -		BUG();
> +		MISSING_CASE(pipe);
> +		return 0;
>  	}
>  }
>  
> @@ -217,7 +218,7 @@ static void ivb_update_fdi_bc_bifurcation(const struct intel_crtc_state *crtc_st
>  
>  		break;
>  	default:
> -		BUG();
> +		MISSING_CASE(crtc->pipe);
>  	}
>  }
>  
> -- 
> 2.20.1
> 

Re: [Intel-gfx] [PATCH 1/5] drm/i915/fdi: move intel_update_fdi_pll_freq to intel_fdi.c

[Jani Nikula]

On Thu, 26 Aug 2021, Rodrigo Vivi <rodrigo.vivi@intel.com> wrote:
> On Wed, Aug 25, 2021 at 06:47:48PM +0300, Jani Nikula wrote:
>> Move FDI related functions to intel_fdi.c. Rename to have intel_fdi
>> prefix while at it.
>> 
>> Signed-off-by: Jani Nikula <jani.nikula@intel.com>
>
> Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>

Thanks, pushed the series.

BR,
Jani.

>
>> ---
>>  drivers/gpu/drm/i915/display/intel_display.c | 18 +-----------------
>>  drivers/gpu/drm/i915/display/intel_fdi.c     | 16 ++++++++++++++++
>>  drivers/gpu/drm/i915/display/intel_fdi.h     |  1 +
>>  3 files changed, 18 insertions(+), 17 deletions(-)
>> 
>> diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
>> index 794690c0dba5..3a9afe04ce0a 100644
>> --- a/drivers/gpu/drm/i915/display/intel_display.c
>> +++ b/drivers/gpu/drm/i915/display/intel_display.c
>> @@ -11564,22 +11564,6 @@ static void sanitize_watermarks(struct drm_i915_private *dev_priv)
>>  	drm_modeset_acquire_fini(&ctx);
>>  }
>>  
>> -static void intel_update_fdi_pll_freq(struct drm_i915_private *dev_priv)
>> -{
>> -	if (IS_IRONLAKE(dev_priv)) {
>> -		u32 fdi_pll_clk =
>> -			intel_de_read(dev_priv, FDI_PLL_BIOS_0) & FDI_PLL_FB_CLOCK_MASK;
>> -
>> -		dev_priv->fdi_pll_freq = (fdi_pll_clk + 2) * 10000;
>> -	} else if (IS_SANDYBRIDGE(dev_priv) || IS_IVYBRIDGE(dev_priv)) {
>> -		dev_priv->fdi_pll_freq = 270000;
>> -	} else {
>> -		return;
>> -	}
>> -
>> -	drm_dbg(&dev_priv->drm, "FDI PLL freq=%d\n", dev_priv->fdi_pll_freq);
>> -}
>> -
>>  static int intel_initial_commit(struct drm_device *dev)
>>  {
>>  	struct drm_atomic_state *state = NULL;
>> @@ -11833,7 +11817,7 @@ int intel_modeset_init_nogem(struct drm_i915_private *i915)
>>  
>>  	intel_plane_possible_crtcs_init(i915);
>>  	intel_shared_dpll_init(dev);
>> -	intel_update_fdi_pll_freq(i915);
>> +	intel_fdi_pll_freq_update(i915);
>>  
>>  	intel_update_czclk(i915);
>>  	intel_modeset_init_hw(i915);
>> diff --git a/drivers/gpu/drm/i915/display/intel_fdi.c b/drivers/gpu/drm/i915/display/intel_fdi.c
>> index 13f8ba4c9188..88a78dafd54d 100644
>> --- a/drivers/gpu/drm/i915/display/intel_fdi.c
>> +++ b/drivers/gpu/drm/i915/display/intel_fdi.c
>> @@ -95,6 +95,22 @@ static int ilk_check_fdi_lanes(struct drm_device *dev, enum pipe pipe,
>>  	}
>>  }
>>  
>> +void intel_fdi_pll_freq_update(struct drm_i915_private *i915)
>> +{
>> +	if (IS_IRONLAKE(i915)) {
>> +		u32 fdi_pll_clk =
>> +			intel_de_read(i915, FDI_PLL_BIOS_0) & FDI_PLL_FB_CLOCK_MASK;
>> +
>> +		i915->fdi_pll_freq = (fdi_pll_clk + 2) * 10000;
>> +	} else if (IS_SANDYBRIDGE(i915) || IS_IVYBRIDGE(i915)) {
>> +		i915->fdi_pll_freq = 270000;
>> +	} else {
>> +		return;
>> +	}
>> +
>> +	drm_dbg(&i915->drm, "FDI PLL freq=%d\n", i915->fdi_pll_freq);
>> +}
>> +
>>  int intel_fdi_link_freq(struct drm_i915_private *i915,
>>  			const struct intel_crtc_state *pipe_config)
>>  {
>> diff --git a/drivers/gpu/drm/i915/display/intel_fdi.h b/drivers/gpu/drm/i915/display/intel_fdi.h
>> index 2c8ffd9ceaed..cda9a32c25ba 100644
>> --- a/drivers/gpu/drm/i915/display/intel_fdi.h
>> +++ b/drivers/gpu/drm/i915/display/intel_fdi.h
>> @@ -23,5 +23,6 @@ void ilk_fdi_pll_enable(const struct intel_crtc_state *crtc_state);
>>  void intel_fdi_init_hook(struct drm_i915_private *dev_priv);
>>  void hsw_fdi_link_train(struct intel_encoder *encoder,
>>  			const struct intel_crtc_state *crtc_state);
>> +void intel_fdi_pll_freq_update(struct drm_i915_private *i915);
>>  
>>  #endif
>> -- 
>> 2.20.1
>> 

-- 
Jani Nikula, Intel Open Source Graphics Center