[Intel-gfx] [PATCH 00/13] drm/i915/tc: Fix TypeC connect/disconnect sequences

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* [Intel-gfx] [PATCH 00/13] drm/i915/tc: Fix TypeC connect/disconnect sequences
@ 2021-09-21  0:23 Imre Deak
  2021-09-21  0:23 ` [Intel-gfx] [PATCH 01/13] drm/i915/tc: Fix TypeC port init/resume time sanitization Imre Deak
                   ` (23 more replies)
  0 siblings, 24 replies; 72+ messages in thread
From: Imre Deak @ 2021-09-21  0:23 UTC (permalink / raw)
  To: intel-gfx; +Cc: José Roberto de Souza

This patchset fixes two issues on ADL-P related to the TypeC PHY
connect/disconnect sequences in patch 11 and 13 and a few other minor
TypeC issues I noticed on the way. The fix in patch 11 requires some
refactoring and it affects all TypeC platforms; this was the way that
made sense to me to keep things consistent across all platforms and
TypeC modes and also bring the connect/disconnect sequences closer to
the specification.

Tested on ICL, TGL, ADL-P, on all the 3 TypeC port types where
available.

Cc: José Roberto de Souza <jose.souza@intel.com>

Imre Deak (13):
  drm/i915/tc: Fix TypeC port init/resume time sanitization
  drm/i915/adlp/tc: Fix PHY connected check for Thunderbolt mode
  drm/i915/tc: Remove waiting for PHY complete during releasing
    ownership
  drm/i915/tc: Check for DP-alt,legacy sinks before taking PHY ownership
  drm/i915/tc: Add/use helpers to retrieve TypeC port properties
  drm/i915/tc: Don't keep legacy TypeC ports in connected state w/o a
    sink
  drm/i915/tc: Add a mode for the TypeC PHY's disconnected state
  drm/i915/tc: Refactor TC-cold block/unblock helpers
  drm/i915/tc: Avoid using legacy AUX PW in TBT mode
  drm/i915/icl/tc: Remove the ICL special casing during TC-cold blocking
  drm/i915/tc: Fix TypeC PHY connect/disconnect logic on ADL-P
  drm/i915/tc: Drop extra TC cold blocking from
    intel_tc_port_connected()
  drm/i915/tc: Fix system hang on ADL-P during TypeC PHY disconnect

 drivers/gpu/drm/i915/display/intel_ddi.c      |  46 +--
 drivers/gpu/drm/i915/display/intel_display.c  |  26 +-
 drivers/gpu/drm/i915/display/intel_display.h  |   1 +
 .../drm/i915/display/intel_display_power.c    |   4 +-
 .../drm/i915/display/intel_display_types.h    |   3 +
 drivers/gpu/drm/i915/display/intel_dp_aux.c   |   6 +-
 drivers/gpu/drm/i915/display/intel_dpll_mgr.c |   5 +-
 drivers/gpu/drm/i915/display/intel_tc.c       | 275 +++++++++++-------
 drivers/gpu/drm/i915/display/intel_tc.h       |   6 +-
 9 files changed, 218 insertions(+), 154 deletions(-)

-- 
2.27.0


^ permalink raw reply	[flat|nested] 72+ messages in thread

* [Intel-gfx] [PATCH 01/13] drm/i915/tc: Fix TypeC port init/resume time sanitization
  2021-09-21  0:23 [Intel-gfx] [PATCH 00/13] drm/i915/tc: Fix TypeC connect/disconnect sequences Imre Deak
@ 2021-09-21  0:23 ` Imre Deak
  2021-09-23 23:10   ` Souza, Jose
  2021-09-29 13:28   ` [Intel-gfx] [PATCH v2 " Imre Deak
  2021-09-21  0:23 ` [Intel-gfx] [PATCH 02/13] drm/i915/adlp/tc: Fix PHY connected check for Thunderbolt mode Imre Deak
                   ` (22 subsequent siblings)
  23 siblings, 2 replies; 72+ messages in thread
From: Imre Deak @ 2021-09-21  0:23 UTC (permalink / raw)
  To: intel-gfx; +Cc: José Roberto de Souza, Ville Syrjälä

Atm during driver loading and system resume TypeC ports are accessed
before their HW/SW state is synced. Move the TypeC port sanitization to
the encoder's sync_state hook to fix this.

Fixes: f9e76a6e68d3 ("drm/i915: Add an encoder hook to sanitize its state during init/resume")
Cc: José Roberto de Souza <jose.souza@intel.com>
Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Imre Deak <imre.deak@intel.com>
---
 drivers/gpu/drm/i915/display/intel_ddi.c     |  8 +++++++-
 drivers/gpu/drm/i915/display/intel_display.c | 20 +++++---------------
 2 files changed, 12 insertions(+), 16 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c b/drivers/gpu/drm/i915/display/intel_ddi.c
index bba0ab99836b1..c4ed4675f5791 100644
--- a/drivers/gpu/drm/i915/display/intel_ddi.c
+++ b/drivers/gpu/drm/i915/display/intel_ddi.c
@@ -3840,7 +3840,13 @@ void hsw_ddi_get_config(struct intel_encoder *encoder,
 static void intel_ddi_sync_state(struct intel_encoder *encoder,
 				 const struct intel_crtc_state *crtc_state)
 {
-	if (intel_crtc_has_dp_encoder(crtc_state))
+	struct drm_i915_private *i915 = to_i915(encoder->base.dev);
+	enum phy phy = intel_port_to_phy(i915, encoder->port);
+
+	if (intel_phy_is_tc(i915, phy))
+		intel_tc_port_sanitize(enc_to_dig_port(encoder));
+
+	if (crtc_state && intel_crtc_has_dp_encoder(crtc_state))
 		intel_dp_sync_state(encoder, crtc_state);
 }
 
diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
index f6c0c595f6313..8547842935389 100644
--- a/drivers/gpu/drm/i915/display/intel_display.c
+++ b/drivers/gpu/drm/i915/display/intel_display.c
@@ -12194,18 +12194,16 @@ static void intel_modeset_readout_hw_state(struct drm_device *dev)
 	readout_plane_state(dev_priv);
 
 	for_each_intel_encoder(dev, encoder) {
+		struct intel_crtc_state *crtc_state = NULL;
+
 		pipe = 0;
 
 		if (encoder->get_hw_state(encoder, &pipe)) {
-			struct intel_crtc_state *crtc_state;
-
 			crtc = intel_get_crtc_for_pipe(dev_priv, pipe);
 			crtc_state = to_intel_crtc_state(crtc->base.state);
 
 			encoder->base.crtc = &crtc->base;
 			intel_encoder_get_config(encoder, crtc_state);
-			if (encoder->sync_state)
-				encoder->sync_state(encoder, crtc_state);
 
 			/* read out to slave crtc as well for bigjoiner */
 			if (crtc_state->bigjoiner) {
@@ -12220,6 +12218,9 @@ static void intel_modeset_readout_hw_state(struct drm_device *dev)
 			encoder->base.crtc = NULL;
 		}
 
+		if (encoder->sync_state)
+			encoder->sync_state(encoder, crtc_state);
+
 		drm_dbg_kms(&dev_priv->drm,
 			    "[ENCODER:%d:%s] hw state readout: %s, pipe %c\n",
 			    encoder->base.base.id, encoder->base.name,
@@ -12502,17 +12503,6 @@ intel_modeset_setup_hw_state(struct drm_device *dev,
 	intel_modeset_readout_hw_state(dev);
 
 	/* HW state is read out, now we need to sanitize this mess. */
-
-	/* Sanitize the TypeC port mode upfront, encoders depend on this */
-	for_each_intel_encoder(dev, encoder) {
-		enum phy phy = intel_port_to_phy(dev_priv, encoder->port);
-
-		/* We need to sanitize only the MST primary port. */
-		if (encoder->type != INTEL_OUTPUT_DP_MST &&
-		    intel_phy_is_tc(dev_priv, phy))
-			intel_tc_port_sanitize(enc_to_dig_port(encoder));
-	}
-
 	get_encoder_power_domains(dev_priv);
 
 	if (HAS_PCH_IBX(dev_priv))
-- 
2.27.0


^ permalink raw reply related	[flat|nested] 72+ messages in thread

* [Intel-gfx] [PATCH 02/13] drm/i915/adlp/tc: Fix PHY connected check for Thunderbolt mode
  2021-09-21  0:23 [Intel-gfx] [PATCH 00/13] drm/i915/tc: Fix TypeC connect/disconnect sequences Imre Deak
  2021-09-21  0:23 ` [Intel-gfx] [PATCH 01/13] drm/i915/tc: Fix TypeC port init/resume time sanitization Imre Deak
@ 2021-09-21  0:23 ` Imre Deak
  2021-09-23 23:18   ` Souza, Jose
  2021-09-21  0:23 ` [Intel-gfx] [PATCH 03/13] drm/i915/tc: Remove waiting for PHY complete during releasing ownership Imre Deak
                   ` (21 subsequent siblings)
  23 siblings, 1 reply; 72+ messages in thread
From: Imre Deak @ 2021-09-21  0:23 UTC (permalink / raw)
  To: intel-gfx; +Cc: José Roberto de Souza

On ADL-P the PHY ready (aka status complete on other platforms) flag is
always set, besides when a DP-alt, legacy sink is connected also when a
TBT sink is connected or nothing is connected. So assume the PHY to be
connected when both the TBT live status and PHY ready flags are set.

Cc: José Roberto de Souza <jose.souza@intel.com>
Signed-off-by: Imre Deak <imre.deak@intel.com>
---
 drivers/gpu/drm/i915/display/intel_tc.c | 4 ++++
 1 file changed, 4 insertions(+)

diff --git a/drivers/gpu/drm/i915/display/intel_tc.c b/drivers/gpu/drm/i915/display/intel_tc.c
index 3ffece568ed98..7dc3696085c71 100644
--- a/drivers/gpu/drm/i915/display/intel_tc.c
+++ b/drivers/gpu/drm/i915/display/intel_tc.c
@@ -509,6 +509,10 @@ static bool icl_tc_phy_is_connected(struct intel_digital_port *dig_port)
 		return dig_port->tc_mode == TC_PORT_TBT_ALT;
 	}
 
+	/* On ADL-P the PHY complete flag is set in TBT mode as well. */
+	if (IS_ALDERLAKE_P(i915) && dig_port->tc_mode == TC_PORT_TBT_ALT)
+		return true;
+
 	if (!tc_phy_is_owned(dig_port)) {
 		drm_dbg_kms(&i915->drm, "Port %s: PHY not owned\n",
 			    dig_port->tc_port_name);
-- 
2.27.0


^ permalink raw reply related	[flat|nested] 72+ messages in thread

* [Intel-gfx] [PATCH 03/13] drm/i915/tc: Remove waiting for PHY complete during releasing ownership
  2021-09-21  0:23 [Intel-gfx] [PATCH 00/13] drm/i915/tc: Fix TypeC connect/disconnect sequences Imre Deak
  2021-09-21  0:23 ` [Intel-gfx] [PATCH 01/13] drm/i915/tc: Fix TypeC port init/resume time sanitization Imre Deak
  2021-09-21  0:23 ` [Intel-gfx] [PATCH 02/13] drm/i915/adlp/tc: Fix PHY connected check for Thunderbolt mode Imre Deak
@ 2021-09-21  0:23 ` Imre Deak
  2021-09-24  0:17   ` Souza, Jose
  2021-09-21  0:23 ` [Intel-gfx] [PATCH 04/13] drm/i915/tc: Check for DP-alt, legacy sinks before taking PHY ownership Imre Deak
                   ` (20 subsequent siblings)
  23 siblings, 1 reply; 72+ messages in thread
From: Imre Deak @ 2021-09-21  0:23 UTC (permalink / raw)
  To: intel-gfx; +Cc: José Roberto de Souza

Waiting for the PHY complete flag to clear when releasing the PHY
ownership was add in

commit ddec362724f9 ("drm/i915: Wait for TypeC PHY complete flag to clear in safe mode")

This isn't required by the spec, the vague idea was to make the
handshake with the firmware more robust, without actual evidence for
when it would be needed. Checking this again, the flag doesn't clear on
ICL until after the PHY's PLL is disabled and the flag is permanently
set on ADL-P. To avoid the spurious timeout messages in dmesg, just
remove this wait.

Cc: José Roberto de Souza <jose.souza@intel.com>
Signed-off-by: Imre Deak <imre.deak@intel.com>
---
 drivers/gpu/drm/i915/display/intel_tc.c | 5 -----
 1 file changed, 5 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_tc.c b/drivers/gpu/drm/i915/display/intel_tc.c
index 7dc3696085c71..0d3555437b0b1 100644
--- a/drivers/gpu/drm/i915/display/intel_tc.c
+++ b/drivers/gpu/drm/i915/display/intel_tc.c
@@ -339,11 +339,6 @@ static bool icl_tc_phy_take_ownership(struct intel_digital_port *dig_port,
 	intel_uncore_write(uncore,
 			   PORT_TX_DFLEXDPCSSS(dig_port->tc_phy_fia), val);
 
-	if (!take && wait_for(!tc_phy_status_complete(dig_port), 10))
-		drm_dbg_kms(&i915->drm,
-			    "Port %s: PHY complete clear timed out\n",
-			    dig_port->tc_port_name);
-
 	return true;
 }
 
-- 
2.27.0


^ permalink raw reply related	[flat|nested] 72+ messages in thread

* [Intel-gfx] [PATCH 04/13] drm/i915/tc: Check for DP-alt, legacy sinks before taking PHY ownership
  2021-09-21  0:23 [Intel-gfx] [PATCH 00/13] drm/i915/tc: Fix TypeC connect/disconnect sequences Imre Deak
                   ` (2 preceding siblings ...)
  2021-09-21  0:23 ` [Intel-gfx] [PATCH 03/13] drm/i915/tc: Remove waiting for PHY complete during releasing ownership Imre Deak
@ 2021-09-21  0:23 ` Imre Deak
  2021-09-24  0:30   ` Souza, Jose
  2021-09-29 13:28   ` [Intel-gfx] [PATCH v2 " Imre Deak
  2021-09-21  0:23 ` [Intel-gfx] [PATCH 05/13] drm/i915/tc: Add/use helpers to retrieve TypeC port properties Imre Deak
                   ` (19 subsequent siblings)
  23 siblings, 2 replies; 72+ messages in thread
From: Imre Deak @ 2021-09-21  0:23 UTC (permalink / raw)
  To: intel-gfx; +Cc: José Roberto de Souza

On ADL-P the PHY ready/complete flag is always set even in TBT-alt mode.
To avoid taking the PHY ownership and the following spurious "PHY sudden
disconnect" messages on this platform when connecting the PHY in TBT
mode, check if there is any DP-alt or legacy sink connected before
taking the ownership.

Cc: José Roberto de Souza <jose.souza@intel.com>
Signed-off-by: Imre Deak <imre.deak@intel.com>
---
 drivers/gpu/drm/i915/display/intel_tc.c | 7 +++++++
 1 file changed, 7 insertions(+)

diff --git a/drivers/gpu/drm/i915/display/intel_tc.c b/drivers/gpu/drm/i915/display/intel_tc.c
index 0d3555437b0b1..1f76c11d70834 100644
--- a/drivers/gpu/drm/i915/display/intel_tc.c
+++ b/drivers/gpu/drm/i915/display/intel_tc.c
@@ -432,6 +432,13 @@ static void icl_tc_phy_connect(struct intel_digital_port *dig_port,
 		goto out_set_tbt_alt_mode;
 	}
 
+	if (!(tc_port_live_status_mask(dig_port) &
+	      (BIT(TC_PORT_DP_ALT) | BIT(TC_PORT_LEGACY)))) {
+		drm_dbg_kms(&i915->drm, "Port %s: nothing is connected\n",
+			    dig_port->tc_port_name);
+		goto out_set_tbt_alt_mode;
+	}
+
 	if (!tc_phy_take_ownership(dig_port, true) &&
 	    !drm_WARN_ON(&i915->drm, dig_port->tc_legacy_port))
 		goto out_set_tbt_alt_mode;
-- 
2.27.0


^ permalink raw reply related	[flat|nested] 72+ messages in thread

* [Intel-gfx] [PATCH 05/13] drm/i915/tc: Add/use helpers to retrieve TypeC port properties
  2021-09-21  0:23 [Intel-gfx] [PATCH 00/13] drm/i915/tc: Fix TypeC connect/disconnect sequences Imre Deak
                   ` (3 preceding siblings ...)
  2021-09-21  0:23 ` [Intel-gfx] [PATCH 04/13] drm/i915/tc: Check for DP-alt, legacy sinks before taking PHY ownership Imre Deak
@ 2021-09-21  0:23 ` Imre Deak
  2021-09-24 19:54   ` Souza, Jose
  2021-09-21  0:23 ` [Intel-gfx] [PATCH 06/13] drm/i915/tc: Don't keep legacy TypeC ports in connected state w/o a sink Imre Deak
                   ` (18 subsequent siblings)
  23 siblings, 1 reply; 72+ messages in thread
From: Imre Deak @ 2021-09-21  0:23 UTC (permalink / raw)
  To: intel-gfx; +Cc: José Roberto de Souza

Instead of directly accessing the TypeC port internal struct members,
add/use helpers to retrieve the corresponding properties.

No functional change.

Cc: José Roberto de Souza <jose.souza@intel.com>
Signed-off-by: Imre Deak <imre.deak@intel.com>
---
 drivers/gpu/drm/i915/display/intel_ddi.c      | 31 +++++++------------
 drivers/gpu/drm/i915/display/intel_display.c  |  6 +---
 .../drm/i915/display/intel_display_power.c    |  4 +--
 drivers/gpu/drm/i915/display/intel_dp_aux.c   |  6 +---
 drivers/gpu/drm/i915/display/intel_dpll_mgr.c |  5 +--
 drivers/gpu/drm/i915/display/intel_tc.c       | 24 ++++++++++++++
 drivers/gpu/drm/i915/display/intel_tc.h       |  4 +++
 7 files changed, 46 insertions(+), 34 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c b/drivers/gpu/drm/i915/display/intel_ddi.c
index c4ed4675f5791..b9194d6a4dfe7 100644
--- a/drivers/gpu/drm/i915/display/intel_ddi.c
+++ b/drivers/gpu/drm/i915/display/intel_ddi.c
@@ -288,7 +288,7 @@ static void intel_ddi_init_dp_buf_reg(struct intel_encoder *encoder,
 
 	if (IS_ALDERLAKE_P(i915) && intel_phy_is_tc(i915, phy)) {
 		intel_dp->DP |= ddi_buf_phy_link_rate(crtc_state->port_clock);
-		if (dig_port->tc_mode != TC_PORT_TBT_ALT)
+		if (!intel_tc_port_in_tbt_alt_mode(dig_port))
 			intel_dp->DP |= DDI_BUF_CTL_TC_PHY_OWNERSHIP;
 	}
 }
@@ -885,8 +885,7 @@ static void intel_ddi_get_power_domains(struct intel_encoder *encoder,
 
 	dig_port = enc_to_dig_port(encoder);
 
-	if (!intel_phy_is_tc(dev_priv, phy) ||
-	    dig_port->tc_mode != TC_PORT_TBT_ALT) {
+	if (!intel_tc_port_in_tbt_alt_mode(dig_port)) {
 		drm_WARN_ON(&dev_priv->drm, dig_port->ddi_io_wakeref);
 		dig_port->ddi_io_wakeref = intel_display_power_get(dev_priv,
 								   dig_port->ddi_io_power_domain);
@@ -1180,7 +1179,7 @@ static void icl_mg_phy_ddi_vswing_sequence(struct intel_encoder *encoder,
 	int n_entries, ln;
 	u32 val;
 
-	if (enc_to_dig_port(encoder)->tc_mode == TC_PORT_TBT_ALT)
+	if (intel_tc_port_in_tbt_alt_mode(enc_to_dig_port(encoder)))
 		return;
 
 	ddi_translations = encoder->get_buf_trans(encoder, crtc_state, &n_entries);
@@ -1317,7 +1316,7 @@ tgl_dkl_phy_ddi_vswing_sequence(struct intel_encoder *encoder,
 	u32 val, dpcnt_mask, dpcnt_val;
 	int n_entries, ln;
 
-	if (enc_to_dig_port(encoder)->tc_mode == TC_PORT_TBT_ALT)
+	if (intel_tc_port_in_tbt_alt_mode(enc_to_dig_port(encoder)))
 		return;
 
 	ddi_translations = encoder->get_buf_trans(encoder, crtc_state, &n_entries);
@@ -2084,7 +2083,7 @@ icl_program_mg_dp_mode(struct intel_digital_port *dig_port,
 	u8 width;
 
 	if (!intel_phy_is_tc(dev_priv, phy) ||
-	    dig_port->tc_mode == TC_PORT_TBT_ALT)
+	    intel_tc_port_in_tbt_alt_mode(dig_port))
 		return;
 
 	if (DISPLAY_VER(dev_priv) >= 12) {
@@ -2109,7 +2108,7 @@ icl_program_mg_dp_mode(struct intel_digital_port *dig_port,
 	switch (pin_assignment) {
 	case 0x0:
 		drm_WARN_ON(&dev_priv->drm,
-			    dig_port->tc_mode != TC_PORT_LEGACY);
+			    !intel_tc_port_in_legacy_mode(dig_port));
 		if (width == 1) {
 			ln1 |= MG_DP_MODE_CFG_DP_X1_MODE;
 		} else {
@@ -2354,7 +2353,6 @@ static void dg2_ddi_pre_enable_dp(struct intel_atomic_state *state,
 {
 	struct intel_dp *intel_dp = enc_to_intel_dp(encoder);
 	struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
-	enum phy phy = intel_port_to_phy(dev_priv, encoder->port);
 	struct intel_digital_port *dig_port = enc_to_dig_port(encoder);
 	bool is_mst = intel_crtc_has_type(crtc_state, INTEL_OUTPUT_DP_MST);
 	int level = intel_ddi_dp_level(intel_dp, crtc_state);
@@ -2378,8 +2376,7 @@ static void dg2_ddi_pre_enable_dp(struct intel_atomic_state *state,
 	intel_ddi_enable_clock(encoder, crtc_state);
 
 	/* 4. Enable IO power */
-	if (!intel_phy_is_tc(dev_priv, phy) ||
-	    dig_port->tc_mode != TC_PORT_TBT_ALT)
+	if (!intel_tc_port_in_tbt_alt_mode(dig_port))
 		dig_port->ddi_io_wakeref = intel_display_power_get(dev_priv,
 								   dig_port->ddi_io_power_domain);
 
@@ -2468,7 +2465,6 @@ static void tgl_ddi_pre_enable_dp(struct intel_atomic_state *state,
 {
 	struct intel_dp *intel_dp = enc_to_intel_dp(encoder);
 	struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
-	enum phy phy = intel_port_to_phy(dev_priv, encoder->port);
 	struct intel_digital_port *dig_port = enc_to_dig_port(encoder);
 	bool is_mst = intel_crtc_has_type(crtc_state, INTEL_OUTPUT_DP_MST);
 	int level = intel_ddi_dp_level(intel_dp, crtc_state);
@@ -2505,8 +2501,7 @@ static void tgl_ddi_pre_enable_dp(struct intel_atomic_state *state,
 	intel_ddi_enable_clock(encoder, crtc_state);
 
 	/* 5. If IO power is controlled through PWR_WELL_CTL, Enable IO Power */
-	if (!intel_phy_is_tc(dev_priv, phy) ||
-	    dig_port->tc_mode != TC_PORT_TBT_ALT) {
+	if (!intel_tc_port_in_tbt_alt_mode(dig_port)) {
 		drm_WARN_ON(&dev_priv->drm, dig_port->ddi_io_wakeref);
 		dig_port->ddi_io_wakeref = intel_display_power_get(dev_priv,
 								   dig_port->ddi_io_power_domain);
@@ -2611,7 +2606,6 @@ static void hsw_ddi_pre_enable_dp(struct intel_atomic_state *state,
 	struct intel_dp *intel_dp = enc_to_intel_dp(encoder);
 	struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
 	enum port port = encoder->port;
-	enum phy phy = intel_port_to_phy(dev_priv, port);
 	struct intel_digital_port *dig_port = enc_to_dig_port(encoder);
 	bool is_mst = intel_crtc_has_type(crtc_state, INTEL_OUTPUT_DP_MST);
 	int level = intel_ddi_dp_level(intel_dp, crtc_state);
@@ -2630,8 +2624,7 @@ static void hsw_ddi_pre_enable_dp(struct intel_atomic_state *state,
 
 	intel_ddi_enable_clock(encoder, crtc_state);
 
-	if (!intel_phy_is_tc(dev_priv, phy) ||
-	    dig_port->tc_mode != TC_PORT_TBT_ALT) {
+	if (!intel_tc_port_in_tbt_alt_mode(dig_port)) {
 		drm_WARN_ON(&dev_priv->drm, dig_port->ddi_io_wakeref);
 		dig_port->ddi_io_wakeref = intel_display_power_get(dev_priv,
 								   dig_port->ddi_io_power_domain);
@@ -2801,7 +2794,6 @@ static void intel_ddi_post_disable_dp(struct intel_atomic_state *state,
 	struct intel_dp *intel_dp = &dig_port->dp;
 	bool is_mst = intel_crtc_has_type(old_crtc_state,
 					  INTEL_OUTPUT_DP_MST);
-	enum phy phy = intel_port_to_phy(dev_priv, encoder->port);
 
 	if (!is_mst)
 		intel_dp_set_infoframes(encoder, false,
@@ -2844,8 +2836,7 @@ static void intel_ddi_post_disable_dp(struct intel_atomic_state *state,
 	intel_pps_vdd_on(intel_dp);
 	intel_pps_off(intel_dp);
 
-	if (!intel_phy_is_tc(dev_priv, phy) ||
-	    dig_port->tc_mode != TC_PORT_TBT_ALT)
+	if (!intel_tc_port_in_tbt_alt_mode(dig_port))
 		intel_display_power_put(dev_priv,
 					dig_port->ddi_io_power_domain,
 					fetch_and_zero(&dig_port->ddi_io_wakeref));
@@ -3322,7 +3313,7 @@ intel_ddi_pre_pll_enable(struct intel_atomic_state *state,
 						intel_ddi_main_link_aux_domain(dig_port));
 	}
 
-	if (is_tc_port && dig_port->tc_mode != TC_PORT_TBT_ALT)
+	if (is_tc_port && !intel_tc_port_in_tbt_alt_mode(dig_port))
 		/*
 		 * Program the lane count for static/dynamic connections on
 		 * Type-C ports.  Skip this step for TBT.
diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
index 8547842935389..ddd8aa6560352 100644
--- a/drivers/gpu/drm/i915/display/intel_display.c
+++ b/drivers/gpu/drm/i915/display/intel_display.c
@@ -3361,11 +3361,7 @@ enum intel_display_power_domain intel_port_to_power_domain(enum port port)
 enum intel_display_power_domain
 intel_aux_power_domain(struct intel_digital_port *dig_port)
 {
-	struct drm_i915_private *dev_priv = to_i915(dig_port->base.base.dev);
-	enum phy phy = intel_port_to_phy(dev_priv, dig_port->base.port);
-
-	if (intel_phy_is_tc(dev_priv, phy) &&
-	    dig_port->tc_mode == TC_PORT_TBT_ALT) {
+	if (intel_tc_port_in_tbt_alt_mode(dig_port)) {
 		switch (dig_port->aux_ch) {
 		case AUX_CH_C:
 			return POWER_DOMAIN_AUX_C_TBT;
diff --git a/drivers/gpu/drm/i915/display/intel_display_power.c b/drivers/gpu/drm/i915/display/intel_display_power.c
index cce1a926fcc10..ee03483047632 100644
--- a/drivers/gpu/drm/i915/display/intel_display_power.c
+++ b/drivers/gpu/drm/i915/display/intel_display_power.c
@@ -560,7 +560,7 @@ static void icl_tc_port_assert_ref_held(struct drm_i915_private *dev_priv,
 	if (drm_WARN_ON(&dev_priv->drm, !dig_port))
 		return;
 
-	if (DISPLAY_VER(dev_priv) == 11 && dig_port->tc_legacy_port)
+	if (DISPLAY_VER(dev_priv) == 11 && intel_tc_cold_requires_aux_pw(dig_port))
 		return;
 
 	drm_WARN_ON(&dev_priv->drm, !intel_tc_port_ref_held(dig_port));
@@ -629,7 +629,7 @@ icl_tc_phy_aux_power_well_enable(struct drm_i915_private *dev_priv,
 	 * exit sequence.
 	 */
 	timeout_expected = is_tbt || intel_tc_cold_requires_aux_pw(dig_port);
-	if (DISPLAY_VER(dev_priv) == 11 && dig_port->tc_legacy_port)
+	if (DISPLAY_VER(dev_priv) == 11 && intel_tc_cold_requires_aux_pw(dig_port))
 		icl_tc_cold_exit(dev_priv);
 
 	hsw_wait_for_power_well_enable(dev_priv, power_well, timeout_expected);
diff --git a/drivers/gpu/drm/i915/display/intel_dp_aux.c b/drivers/gpu/drm/i915/display/intel_dp_aux.c
index d9b2a783101d0..fbe1166bc5a64 100644
--- a/drivers/gpu/drm/i915/display/intel_dp_aux.c
+++ b/drivers/gpu/drm/i915/display/intel_dp_aux.c
@@ -150,9 +150,6 @@ static u32 skl_get_aux_send_ctl(struct intel_dp *intel_dp,
 				u32 unused)
 {
 	struct intel_digital_port *dig_port = dp_to_dig_port(intel_dp);
-	struct drm_i915_private *i915 =
-			to_i915(dig_port->base.base.dev);
-	enum phy phy = intel_port_to_phy(i915, dig_port->base.port);
 	u32 ret;
 
 	/*
@@ -170,8 +167,7 @@ static u32 skl_get_aux_send_ctl(struct intel_dp *intel_dp,
 	      DP_AUX_CH_CTL_FW_SYNC_PULSE_SKL(32) |
 	      DP_AUX_CH_CTL_SYNC_PULSE_SKL(32);
 
-	if (intel_phy_is_tc(i915, phy) &&
-	    dig_port->tc_mode == TC_PORT_TBT_ALT)
+	if (intel_tc_port_in_tbt_alt_mode(dig_port))
 		ret |= DP_AUX_CH_CTL_TBT_IO;
 
 	return ret;
diff --git a/drivers/gpu/drm/i915/display/intel_dpll_mgr.c b/drivers/gpu/drm/i915/display/intel_dpll_mgr.c
index 055992d099c7c..0a7e04db04be4 100644
--- a/drivers/gpu/drm/i915/display/intel_dpll_mgr.c
+++ b/drivers/gpu/drm/i915/display/intel_dpll_mgr.c
@@ -26,6 +26,7 @@
 #include "intel_dpio_phy.h"
 #include "intel_dpll.h"
 #include "intel_dpll_mgr.h"
+#include "intel_tc.h"
 
 /**
  * DOC: Display PLLs
@@ -3101,8 +3102,8 @@ static void icl_update_active_dpll(struct intel_atomic_state *state,
 		enc_to_dig_port(encoder);
 
 	if (primary_port &&
-	    (primary_port->tc_mode == TC_PORT_DP_ALT ||
-	     primary_port->tc_mode == TC_PORT_LEGACY))
+	    (intel_tc_port_in_dp_alt_mode(primary_port) ||
+	     intel_tc_port_in_legacy_mode(primary_port)))
 		port_dpll_id = ICL_PORT_DPLL_MG_PHY;
 
 	icl_set_active_port_dpll(crtc_state, port_dpll_id);
diff --git a/drivers/gpu/drm/i915/display/intel_tc.c b/drivers/gpu/drm/i915/display/intel_tc.c
index 1f76c11d70834..511c46e36e237 100644
--- a/drivers/gpu/drm/i915/display/intel_tc.c
+++ b/drivers/gpu/drm/i915/display/intel_tc.c
@@ -23,6 +23,30 @@ static const char *tc_port_mode_name(enum tc_port_mode mode)
 	return names[mode];
 }
 
+static bool intel_tc_port_in_mode(struct intel_digital_port *dig_port,
+				  enum tc_port_mode mode)
+{
+	struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev);
+	enum phy phy = intel_port_to_phy(i915, dig_port->base.port);
+
+	return intel_phy_is_tc(i915, phy) && dig_port->tc_mode == mode;
+}
+
+bool intel_tc_port_in_tbt_alt_mode(struct intel_digital_port *dig_port)
+{
+	return intel_tc_port_in_mode(dig_port, TC_PORT_TBT_ALT);
+}
+
+bool intel_tc_port_in_dp_alt_mode(struct intel_digital_port *dig_port)
+{
+	return intel_tc_port_in_mode(dig_port, TC_PORT_DP_ALT);
+}
+
+bool intel_tc_port_in_legacy_mode(struct intel_digital_port *dig_port)
+{
+	return intel_tc_port_in_mode(dig_port, TC_PORT_LEGACY);
+}
+
 static enum intel_display_power_domain
 tc_cold_get_power_domain(struct intel_digital_port *dig_port)
 {
diff --git a/drivers/gpu/drm/i915/display/intel_tc.h b/drivers/gpu/drm/i915/display/intel_tc.h
index 0c881f645e279..0fdcddb4fc870 100644
--- a/drivers/gpu/drm/i915/display/intel_tc.h
+++ b/drivers/gpu/drm/i915/display/intel_tc.h
@@ -12,6 +12,10 @@
 struct intel_digital_port;
 struct intel_encoder;
 
+bool intel_tc_port_in_tbt_alt_mode(struct intel_digital_port *dig_port);
+bool intel_tc_port_in_dp_alt_mode(struct intel_digital_port *dig_port);
+bool intel_tc_port_in_legacy_mode(struct intel_digital_port *dig_port);
+
 bool intel_tc_port_connected(struct intel_encoder *encoder);
 void intel_tc_port_disconnect_phy(struct intel_digital_port *dig_port);
 
-- 
2.27.0


^ permalink raw reply related	[flat|nested] 72+ messages in thread

* [Intel-gfx] [PATCH 06/13] drm/i915/tc: Don't keep legacy TypeC ports in connected state w/o a sink
  2021-09-21  0:23 [Intel-gfx] [PATCH 00/13] drm/i915/tc: Fix TypeC connect/disconnect sequences Imre Deak
                   ` (4 preceding siblings ...)
  2021-09-21  0:23 ` [Intel-gfx] [PATCH 05/13] drm/i915/tc: Add/use helpers to retrieve TypeC port properties Imre Deak
@ 2021-09-21  0:23 ` Imre Deak
  2021-09-24 19:57   ` Souza, Jose
  2021-09-21  0:23 ` [Intel-gfx] [PATCH 07/13] drm/i915/tc: Add a mode for the TypeC PHY's disconnected state Imre Deak
                   ` (17 subsequent siblings)
  23 siblings, 1 reply; 72+ messages in thread
From: Imre Deak @ 2021-09-21  0:23 UTC (permalink / raw)
  To: intel-gfx; +Cc: José Roberto de Souza

A follow-up patch will disconnect/reconnect PHYs around AUX transfers
and modeset enable/disables. To prepare for that and make things
consistent for all TypeC modes stop connecting the PHY in legacy mode
without a sink being connected. This was done before since in legacy
mode the PHY is dedicated to display usage, so there was no point in
disconnecting it. However after the follow-up changes the TC-cold
blocking power domains will be held as long as the PHY is in the
connected state, so we'll need to disconnect/re-connect the PHY in all
TypeC modes to allow for power saving.

Cc: José Roberto de Souza <jose.souza@intel.com>
Signed-off-by: Imre Deak <imre.deak@intel.com>
---
 drivers/gpu/drm/i915/display/intel_tc.c | 12 +-----------
 1 file changed, 1 insertion(+), 11 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_tc.c b/drivers/gpu/drm/i915/display/intel_tc.c
index 511c46e36e237..aa4c1e5e0c002 100644
--- a/drivers/gpu/drm/i915/display/intel_tc.c
+++ b/drivers/gpu/drm/i915/display/intel_tc.c
@@ -511,8 +511,6 @@ static void icl_tc_phy_disconnect(struct intel_digital_port *dig_port)
 {
 	switch (dig_port->tc_mode) {
 	case TC_PORT_LEGACY:
-		/* Nothing to do, we never disconnect from legacy mode */
-		break;
 	case TC_PORT_DP_ALT:
 		tc_phy_take_ownership(dig_port, false);
 		dig_port->tc_mode = TC_PORT_TBT_ALT;
@@ -580,9 +578,7 @@ intel_tc_port_get_target_mode(struct intel_digital_port *dig_port)
 	if (live_status_mask)
 		return fls(live_status_mask) - 1;
 
-	return tc_phy_status_complete(dig_port) &&
-	       dig_port->tc_legacy_port ? TC_PORT_LEGACY :
-					  TC_PORT_TBT_ALT;
+	return TC_PORT_TBT_ALT;
 }
 
 static void intel_tc_port_reset_mode(struct intel_digital_port *dig_port,
@@ -643,14 +639,8 @@ void intel_tc_port_sanitize(struct intel_digital_port *dig_port)
 				    "Port %s: PHY disconnected with %d active link(s)\n",
 				    dig_port->tc_port_name, active_links);
 		intel_tc_port_link_init_refcount(dig_port, active_links);
-
-		goto out;
 	}
 
-	if (dig_port->tc_legacy_port)
-		icl_tc_phy_connect(dig_port, 1);
-
-out:
 	drm_dbg_kms(&i915->drm, "Port %s: sanitize mode (%s)\n",
 		    dig_port->tc_port_name,
 		    tc_port_mode_name(dig_port->tc_mode));
-- 
2.27.0


^ permalink raw reply related	[flat|nested] 72+ messages in thread

* [Intel-gfx] [PATCH 07/13] drm/i915/tc: Add a mode for the TypeC PHY's disconnected state
  2021-09-21  0:23 [Intel-gfx] [PATCH 00/13] drm/i915/tc: Fix TypeC connect/disconnect sequences Imre Deak
                   ` (5 preceding siblings ...)
  2021-09-21  0:23 ` [Intel-gfx] [PATCH 06/13] drm/i915/tc: Don't keep legacy TypeC ports in connected state w/o a sink Imre Deak
@ 2021-09-21  0:23 ` Imre Deak
  2021-09-27 21:16   ` Souza, Jose
  2021-09-29 13:28   ` [Intel-gfx] [PATCH v2 " Imre Deak
  2021-09-21  0:23 ` [Intel-gfx] [PATCH 08/13] drm/i915/tc: Refactor TC-cold block/unblock helpers Imre Deak
                   ` (16 subsequent siblings)
  23 siblings, 2 replies; 72+ messages in thread
From: Imre Deak @ 2021-09-21  0:23 UTC (permalink / raw)
  To: intel-gfx; +Cc: José Roberto de Souza

A follow-up change will start to disconnect/re-connect PHYs around AUX
transfers and modeset enable/disables. To prepare for that add a new
TypeC PHY disconnected mode, to help tracking the TC-cold blocking power
domain status (no power domain in disconnected state, mode dependent
power domain in connected state).

Cc: José Roberto de Souza <jose.souza@intel.com>
Signed-off-by: Imre Deak <imre.deak@intel.com>
---
 drivers/gpu/drm/i915/display/intel_display.h |  1 +
 drivers/gpu/drm/i915/display/intel_tc.c      | 26 ++++++++++++++------
 2 files changed, 19 insertions(+), 8 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_display.h b/drivers/gpu/drm/i915/display/intel_display.h
index d425ee77aad71..87b96fed5e0ba 100644
--- a/drivers/gpu/drm/i915/display/intel_display.h
+++ b/drivers/gpu/drm/i915/display/intel_display.h
@@ -270,6 +270,7 @@ enum tc_port {
 };
 
 enum tc_port_mode {
+	TC_PORT_DISCONNECTED,
 	TC_PORT_TBT_ALT,
 	TC_PORT_DP_ALT,
 	TC_PORT_LEGACY,
diff --git a/drivers/gpu/drm/i915/display/intel_tc.c b/drivers/gpu/drm/i915/display/intel_tc.c
index aa4c1e5e0c002..77b16a7c43466 100644
--- a/drivers/gpu/drm/i915/display/intel_tc.c
+++ b/drivers/gpu/drm/i915/display/intel_tc.c
@@ -12,13 +12,14 @@
 static const char *tc_port_mode_name(enum tc_port_mode mode)
 {
 	static const char * const names[] = {
+		[TC_PORT_DISCONNECTED] = "disconnected",
 		[TC_PORT_TBT_ALT] = "tbt-alt",
 		[TC_PORT_DP_ALT] = "dp-alt",
 		[TC_PORT_LEGACY] = "legacy",
 	};
 
 	if (WARN_ON(mode >= ARRAY_SIZE(names)))
-		mode = TC_PORT_TBT_ALT;
+		mode = TC_PORT_DISCONNECTED;
 
 	return names[mode];
 }
@@ -513,10 +514,11 @@ static void icl_tc_phy_disconnect(struct intel_digital_port *dig_port)
 	case TC_PORT_LEGACY:
 	case TC_PORT_DP_ALT:
 		tc_phy_take_ownership(dig_port, false);
-		dig_port->tc_mode = TC_PORT_TBT_ALT;
-		break;
+		fallthrough;
 	case TC_PORT_TBT_ALT:
-		/* Nothing to do, we stay in TBT-alt mode */
+		dig_port->tc_mode = TC_PORT_DISCONNECTED;
+		fallthrough;
+	case TC_PORT_DISCONNECTED:
 		break;
 	default:
 		MISSING_CASE(dig_port->tc_mode);
@@ -621,31 +623,34 @@ void intel_tc_port_sanitize(struct intel_digital_port *dig_port)
 {
 	struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev);
 	struct intel_encoder *encoder = &dig_port->base;
-	intel_wakeref_t tc_cold_wref;
 	int active_links = 0;
 
 	mutex_lock(&dig_port->tc_lock);
-	tc_cold_wref = tc_cold_block(dig_port);
 
-	dig_port->tc_mode = intel_tc_port_get_current_mode(dig_port);
 	if (dig_port->dp.is_mst)
 		active_links = intel_dp_mst_encoder_active_links(dig_port);
 	else if (encoder->base.crtc)
 		active_links = to_intel_crtc(encoder->base.crtc)->active;
 
+	drm_WARN_ON(&i915->drm, dig_port->tc_mode != TC_PORT_DISCONNECTED);
 	if (active_links) {
+		intel_wakeref_t tc_cold_wref = tc_cold_block(dig_port);
+
+		dig_port->tc_mode = intel_tc_port_get_current_mode(dig_port);
+
 		if (!icl_tc_phy_is_connected(dig_port))
 			drm_dbg_kms(&i915->drm,
 				    "Port %s: PHY disconnected with %d active link(s)\n",
 				    dig_port->tc_port_name, active_links);
 		intel_tc_port_link_init_refcount(dig_port, active_links);
+
+		tc_cold_unblock(dig_port, tc_cold_wref);
 	}
 
 	drm_dbg_kms(&i915->drm, "Port %s: sanitize mode (%s)\n",
 		    dig_port->tc_port_name,
 		    tc_port_mode_name(dig_port->tc_mode));
 
-	tc_cold_unblock(dig_port, tc_cold_wref);
 	mutex_unlock(&dig_port->tc_lock);
 }
 
@@ -704,6 +709,10 @@ static void __intel_tc_port_lock(struct intel_digital_port *dig_port,
 		tc_cold_unblock(dig_port, tc_cold_wref);
 	}
 
+	drm_WARN_ON(&i915->drm, dig_port->tc_mode == TC_PORT_DISCONNECTED);
+	drm_WARN_ON(&i915->drm, dig_port->tc_mode != TC_PORT_TBT_ALT &&
+				!tc_phy_is_owned(dig_port));
+
 	drm_WARN_ON(&i915->drm, dig_port->tc_lock_wakeref);
 	dig_port->tc_lock_wakeref = wakeref;
 }
@@ -816,6 +825,7 @@ void intel_tc_port_init(struct intel_digital_port *dig_port, bool is_legacy)
 
 	mutex_init(&dig_port->tc_lock);
 	dig_port->tc_legacy_port = is_legacy;
+	dig_port->tc_mode = TC_PORT_DISCONNECTED;
 	dig_port->tc_link_refcount = 0;
 	tc_port_load_fia_params(i915, dig_port);
 }
-- 
2.27.0


^ permalink raw reply related	[flat|nested] 72+ messages in thread

* [Intel-gfx] [PATCH 08/13] drm/i915/tc: Refactor TC-cold block/unblock helpers
  2021-09-21  0:23 [Intel-gfx] [PATCH 00/13] drm/i915/tc: Fix TypeC connect/disconnect sequences Imre Deak
                   ` (6 preceding siblings ...)
  2021-09-21  0:23 ` [Intel-gfx] [PATCH 07/13] drm/i915/tc: Add a mode for the TypeC PHY's disconnected state Imre Deak
@ 2021-09-21  0:23 ` Imre Deak
  2021-09-27 21:56   ` Souza, Jose
  2021-09-29 13:28   ` [Intel-gfx] [PATCH v2 " Imre Deak
  2021-09-21  0:23 ` [Intel-gfx] [PATCH 09/13] drm/i915/tc: Avoid using legacy AUX PW in TBT mode Imre Deak
                   ` (15 subsequent siblings)
  23 siblings, 2 replies; 72+ messages in thread
From: Imre Deak @ 2021-09-21  0:23 UTC (permalink / raw)
  To: intel-gfx; +Cc: José Roberto de Souza

A follow-up change will select the TC-cold blocking power domain based
on the TypeC mode, prepare for that here.

Also bring intel_tc_cold_requires_aux_pw() earlier to its logical place
for readability.

No functional change.

Cc: José Roberto de Souza <jose.souza@intel.com>
Signed-off-by: Imre Deak <imre.deak@intel.com>
---
 .../drm/i915/display/intel_display_types.h    |  2 +
 drivers/gpu/drm/i915/display/intel_tc.c       | 63 +++++++++++--------
 2 files changed, 39 insertions(+), 26 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_display_types.h b/drivers/gpu/drm/i915/display/intel_display_types.h
index e9e806d90eec4..08a73ffded957 100644
--- a/drivers/gpu/drm/i915/display/intel_display_types.h
+++ b/drivers/gpu/drm/i915/display/intel_display_types.h
@@ -1663,8 +1663,10 @@ struct intel_digital_port {
 	enum intel_display_power_domain ddi_io_power_domain;
 	intel_wakeref_t ddi_io_wakeref;
 	intel_wakeref_t aux_wakeref;
+
 	struct mutex tc_lock;	/* protects the TypeC port mode */
 	intel_wakeref_t tc_lock_wakeref;
+	enum intel_display_power_domain tc_lock_power_domain;
 	int tc_link_refcount;
 	bool tc_legacy_port:1;
 	char tc_port_name[8];
diff --git a/drivers/gpu/drm/i915/display/intel_tc.c b/drivers/gpu/drm/i915/display/intel_tc.c
index 77b16a7c43466..24d2dc2e19a7d 100644
--- a/drivers/gpu/drm/i915/display/intel_tc.c
+++ b/drivers/gpu/drm/i915/display/intel_tc.c
@@ -48,8 +48,16 @@ bool intel_tc_port_in_legacy_mode(struct intel_digital_port *dig_port)
 	return intel_tc_port_in_mode(dig_port, TC_PORT_LEGACY);
 }
 
+bool intel_tc_cold_requires_aux_pw(struct intel_digital_port *dig_port)
+{
+	struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev);
+
+	return (DISPLAY_VER(i915) == 11 && dig_port->tc_legacy_port) ||
+		IS_ALDERLAKE_P(i915);
+}
+
 static enum intel_display_power_domain
-tc_cold_get_power_domain(struct intel_digital_port *dig_port)
+tc_cold_get_power_domain(struct intel_digital_port *dig_port, enum tc_port_mode mode)
 {
 	if (intel_tc_cold_requires_aux_pw(dig_port))
 		return intel_legacy_aux_to_power_domain(dig_port->aux_ch);
@@ -58,23 +66,30 @@ tc_cold_get_power_domain(struct intel_digital_port *dig_port)
 }
 
 static intel_wakeref_t
-tc_cold_block(struct intel_digital_port *dig_port)
+tc_cold_block_in_mode(struct intel_digital_port *dig_port, enum tc_port_mode mode,
+		      enum intel_display_power_domain *domain)
 {
 	struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev);
-	enum intel_display_power_domain domain;
 
 	if (DISPLAY_VER(i915) == 11 && !dig_port->tc_legacy_port)
 		return 0;
 
-	domain = tc_cold_get_power_domain(dig_port);
-	return intel_display_power_get(i915, domain);
+	*domain = tc_cold_get_power_domain(dig_port, mode);
+
+	return intel_display_power_get(i915, *domain);
+}
+
+static intel_wakeref_t
+tc_cold_block(struct intel_digital_port *dig_port, enum intel_display_power_domain *domain)
+{
+	return tc_cold_block_in_mode(dig_port, dig_port->tc_mode, domain);
 }
 
 static void
-tc_cold_unblock(struct intel_digital_port *dig_port, intel_wakeref_t wakeref)
+tc_cold_unblock(struct intel_digital_port *dig_port, enum intel_display_power_domain domain,
+		intel_wakeref_t wakeref)
 {
 	struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev);
-	enum intel_display_power_domain domain;
 
 	/*
 	 * wakeref == -1, means some error happened saving save_depot_stack but
@@ -84,8 +99,7 @@ tc_cold_unblock(struct intel_digital_port *dig_port, intel_wakeref_t wakeref)
 	if (wakeref == 0)
 		return;
 
-	domain = tc_cold_get_power_domain(dig_port);
-	intel_display_power_put_async(i915, domain, wakeref);
+	intel_display_power_put(i915, domain, wakeref);
 }
 
 static void
@@ -98,7 +112,8 @@ assert_tc_cold_blocked(struct intel_digital_port *dig_port)
 		return;
 
 	enabled = intel_display_power_is_enabled(i915,
-						 tc_cold_get_power_domain(dig_port));
+						 tc_cold_get_power_domain(dig_port,
+									  dig_port->tc_mode));
 	drm_WARN_ON(&i915->drm, !enabled);
 }
 
@@ -634,7 +649,8 @@ void intel_tc_port_sanitize(struct intel_digital_port *dig_port)
 
 	drm_WARN_ON(&i915->drm, dig_port->tc_mode != TC_PORT_DISCONNECTED);
 	if (active_links) {
-		intel_wakeref_t tc_cold_wref = tc_cold_block(dig_port);
+		enum intel_display_power_domain domain;
+		intel_wakeref_t tc_cold_wref = tc_cold_block(dig_port, &domain);
 
 		dig_port->tc_mode = intel_tc_port_get_current_mode(dig_port);
 
@@ -644,7 +660,7 @@ void intel_tc_port_sanitize(struct intel_digital_port *dig_port)
 				    dig_port->tc_port_name, active_links);
 		intel_tc_port_link_init_refcount(dig_port, active_links);
 
-		tc_cold_unblock(dig_port, tc_cold_wref);
+		tc_cold_unblock(dig_port, domain, tc_cold_wref);
 	}
 
 	drm_dbg_kms(&i915->drm, "Port %s: sanitize mode (%s)\n",
@@ -673,15 +689,16 @@ bool intel_tc_port_connected(struct intel_encoder *encoder)
 {
 	struct intel_digital_port *dig_port = enc_to_dig_port(encoder);
 	bool is_connected;
+	enum intel_display_power_domain domain;
 	intel_wakeref_t tc_cold_wref;
 
 	intel_tc_port_lock(dig_port);
-	tc_cold_wref = tc_cold_block(dig_port);
+	tc_cold_wref = tc_cold_block(dig_port, &domain);
 
 	is_connected = tc_port_live_status_mask(dig_port) &
 		       BIT(dig_port->tc_mode);
 
-	tc_cold_unblock(dig_port, tc_cold_wref);
+	tc_cold_unblock(dig_port, domain, tc_cold_wref);
 	intel_tc_port_unlock(dig_port);
 
 	return is_connected;
@@ -698,15 +715,16 @@ static void __intel_tc_port_lock(struct intel_digital_port *dig_port,
 	mutex_lock(&dig_port->tc_lock);
 
 	if (!dig_port->tc_link_refcount) {
+		enum intel_display_power_domain domain;
 		intel_wakeref_t tc_cold_wref;
 
-		tc_cold_wref = tc_cold_block(dig_port);
+		tc_cold_wref = tc_cold_block(dig_port, &domain);
 
 		if (force_disconnect || intel_tc_port_needs_reset(dig_port))
 			intel_tc_port_reset_mode(dig_port, required_lanes,
 						 force_disconnect);
 
-		tc_cold_unblock(dig_port, tc_cold_wref);
+		tc_cold_unblock(dig_port, domain, tc_cold_wref);
 	}
 
 	drm_WARN_ON(&i915->drm, dig_port->tc_mode == TC_PORT_DISCONNECTED);
@@ -775,6 +793,7 @@ void intel_tc_port_put_link(struct intel_digital_port *dig_port)
 static bool
 tc_has_modular_fia(struct drm_i915_private *i915, struct intel_digital_port *dig_port)
 {
+	enum intel_display_power_domain domain;
 	intel_wakeref_t wakeref;
 	u32 val;
 
@@ -782,9 +801,9 @@ tc_has_modular_fia(struct drm_i915_private *i915, struct intel_digital_port *dig
 		return false;
 
 	mutex_lock(&dig_port->tc_lock);
-	wakeref = tc_cold_block(dig_port);
+	wakeref = tc_cold_block(dig_port, &domain);
 	val = intel_uncore_read(&i915->uncore, PORT_TX_DFLEXDPSP(FIA1));
-	tc_cold_unblock(dig_port, wakeref);
+	tc_cold_unblock(dig_port, domain, wakeref);
 	mutex_unlock(&dig_port->tc_lock);
 
 	drm_WARN_ON(&i915->drm, val == 0xffffffff);
@@ -829,11 +848,3 @@ void intel_tc_port_init(struct intel_digital_port *dig_port, bool is_legacy)
 	dig_port->tc_link_refcount = 0;
 	tc_port_load_fia_params(i915, dig_port);
 }
-
-bool intel_tc_cold_requires_aux_pw(struct intel_digital_port *dig_port)
-{
-	struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev);
-
-	return (DISPLAY_VER(i915) == 11 && dig_port->tc_legacy_port) ||
-		IS_ALDERLAKE_P(i915);
-}
-- 
2.27.0


^ permalink raw reply related	[flat|nested] 72+ messages in thread

* [Intel-gfx] [PATCH 09/13] drm/i915/tc: Avoid using legacy AUX PW in TBT mode
  2021-09-21  0:23 [Intel-gfx] [PATCH 00/13] drm/i915/tc: Fix TypeC connect/disconnect sequences Imre Deak
                   ` (7 preceding siblings ...)
  2021-09-21  0:23 ` [Intel-gfx] [PATCH 08/13] drm/i915/tc: Refactor TC-cold block/unblock helpers Imre Deak
@ 2021-09-21  0:23 ` Imre Deak
  2021-09-28 20:31   ` Souza, Jose
  2021-09-29 13:28   ` [Intel-gfx] [PATCH v2 " Imre Deak
  2021-09-21  0:23 ` [Intel-gfx] [PATCH 10/13] drm/i915/icl/tc: Remove the ICL special casing during TC-cold blocking Imre Deak
                   ` (14 subsequent siblings)
  23 siblings, 2 replies; 72+ messages in thread
From: Imre Deak @ 2021-09-21  0:23 UTC (permalink / raw)
  To: intel-gfx; +Cc: José Roberto de Souza

For the ADL-P TBT mode the spec doesn't require blocking TC-cold by
using the legacy AUX power domain. To avoid the timeouts that this would
cause during PHY disconnect/reconnect sequences (which will be more
frequent after a follow-up change) use the TC_COLD_OFF power domain in
TBT mode on all platforms. On TGL this power domain blocks TC-cold via a
PUNIT command, while on other platforms the domain just takes a runtime
PM reference.

If the HPD live status indicates that the port mode needs to be reset
- for instance after switching from TBT to a DP-alt sink - still take
the AUX domain, since the IOM firmware handshake requires this.

Cc: José Roberto de Souza <jose.souza@intel.com>
Signed-off-by: Imre Deak <imre.deak@intel.com>
---
 drivers/gpu/drm/i915/display/intel_tc.c | 55 ++++++++++++++++---------
 1 file changed, 36 insertions(+), 19 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_tc.c b/drivers/gpu/drm/i915/display/intel_tc.c
index 24d2dc2e19a7d..b2a3d297bfc19 100644
--- a/drivers/gpu/drm/i915/display/intel_tc.c
+++ b/drivers/gpu/drm/i915/display/intel_tc.c
@@ -59,10 +59,10 @@ bool intel_tc_cold_requires_aux_pw(struct intel_digital_port *dig_port)
 static enum intel_display_power_domain
 tc_cold_get_power_domain(struct intel_digital_port *dig_port, enum tc_port_mode mode)
 {
-	if (intel_tc_cold_requires_aux_pw(dig_port))
-		return intel_legacy_aux_to_power_domain(dig_port->aux_ch);
-	else
+	if (mode == TC_PORT_TBT_ALT || !intel_tc_cold_requires_aux_pw(dig_port))
 		return POWER_DOMAIN_TC_COLD_OFF;
+
+	return intel_legacy_aux_to_power_domain(dig_port->aux_ch);
 }
 
 static intel_wakeref_t
@@ -624,6 +624,36 @@ static void intel_tc_port_reset_mode(struct intel_digital_port *dig_port,
 		    tc_port_mode_name(dig_port->tc_mode));
 }
 
+static bool intel_tc_port_needs_reset(struct intel_digital_port *dig_port)
+{
+	return intel_tc_port_get_target_mode(dig_port) != dig_port->tc_mode;
+}
+
+static void intel_tc_port_update_mode(struct intel_digital_port *dig_port,
+				      int required_lanes, bool force_disconnect)
+{
+	enum intel_display_power_domain domain;
+	intel_wakeref_t wref;
+	bool needs_reset = force_disconnect;
+
+	if (!needs_reset) {
+		/* Get power domain required to check the hotplug live status. */
+		wref = tc_cold_block(dig_port, &domain);
+		needs_reset = intel_tc_port_needs_reset(dig_port);
+		tc_cold_unblock(dig_port, domain, wref);
+	}
+
+	if (!needs_reset)
+		return;
+
+	/* Get power domain required for resetting the mode. */
+	wref = tc_cold_block_in_mode(dig_port, TC_PORT_DISCONNECTED, &domain);
+
+	intel_tc_port_reset_mode(dig_port, required_lanes, force_disconnect);
+
+	tc_cold_unblock(dig_port, domain, wref);
+}
+
 static void
 intel_tc_port_link_init_refcount(struct intel_digital_port *dig_port,
 				 int refcount)
@@ -670,11 +700,6 @@ void intel_tc_port_sanitize(struct intel_digital_port *dig_port)
 	mutex_unlock(&dig_port->tc_lock);
 }
 
-static bool intel_tc_port_needs_reset(struct intel_digital_port *dig_port)
-{
-	return intel_tc_port_get_target_mode(dig_port) != dig_port->tc_mode;
-}
-
 /*
  * The type-C ports are different because even when they are connected, they may
  * not be available/usable by the graphics driver: see the comment on
@@ -714,18 +739,10 @@ static void __intel_tc_port_lock(struct intel_digital_port *dig_port,
 
 	mutex_lock(&dig_port->tc_lock);
 
-	if (!dig_port->tc_link_refcount) {
-		enum intel_display_power_domain domain;
-		intel_wakeref_t tc_cold_wref;
 
-		tc_cold_wref = tc_cold_block(dig_port, &domain);
-
-		if (force_disconnect || intel_tc_port_needs_reset(dig_port))
-			intel_tc_port_reset_mode(dig_port, required_lanes,
-						 force_disconnect);
-
-		tc_cold_unblock(dig_port, domain, tc_cold_wref);
-	}
+	if (!dig_port->tc_link_refcount)
+		intel_tc_port_update_mode(dig_port, required_lanes,
+					  force_disconnect);
 
 	drm_WARN_ON(&i915->drm, dig_port->tc_mode == TC_PORT_DISCONNECTED);
 	drm_WARN_ON(&i915->drm, dig_port->tc_mode != TC_PORT_TBT_ALT &&
-- 
2.27.0


^ permalink raw reply related	[flat|nested] 72+ messages in thread

* [Intel-gfx] [PATCH 10/13] drm/i915/icl/tc: Remove the ICL special casing during TC-cold blocking
  2021-09-21  0:23 [Intel-gfx] [PATCH 00/13] drm/i915/tc: Fix TypeC connect/disconnect sequences Imre Deak
                   ` (8 preceding siblings ...)
  2021-09-21  0:23 ` [Intel-gfx] [PATCH 09/13] drm/i915/tc: Avoid using legacy AUX PW in TBT mode Imre Deak
@ 2021-09-21  0:23 ` Imre Deak
  2021-09-27 22:02   ` Souza, Jose
  2021-09-21  0:23 ` [Intel-gfx] [PATCH 11/13] drm/i915/tc: Fix TypeC PHY connect/disconnect logic on ADL-P Imre Deak
                   ` (13 subsequent siblings)
  23 siblings, 1 reply; 72+ messages in thread
From: Imre Deak @ 2021-09-21  0:23 UTC (permalink / raw)
  To: intel-gfx; +Cc: José Roberto de Souza

While a TypeC port mode is locked a DISPLAY_CORE power domain reference
is held, which implies a runtime PM ref. By removing the ICL !legacy
port special casing, a TC_COLD_OFF power domain reference will be taken
for such ports, which also translates to a runtime PM ref on that
platform. A follow-up change will stop holding the DISPLAY_CORE power
domain while the port is locked.

Cc: José Roberto de Souza <jose.souza@intel.com>
Signed-off-by: Imre Deak <imre.deak@intel.com>
---
 drivers/gpu/drm/i915/display/intel_tc.c | 6 ------
 1 file changed, 6 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_tc.c b/drivers/gpu/drm/i915/display/intel_tc.c
index b2a3d297bfc19..8d799cf7ccefd 100644
--- a/drivers/gpu/drm/i915/display/intel_tc.c
+++ b/drivers/gpu/drm/i915/display/intel_tc.c
@@ -71,9 +71,6 @@ tc_cold_block_in_mode(struct intel_digital_port *dig_port, enum tc_port_mode mod
 {
 	struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev);
 
-	if (DISPLAY_VER(i915) == 11 && !dig_port->tc_legacy_port)
-		return 0;
-
 	*domain = tc_cold_get_power_domain(dig_port, mode);
 
 	return intel_display_power_get(i915, *domain);
@@ -108,9 +105,6 @@ assert_tc_cold_blocked(struct intel_digital_port *dig_port)
 	struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev);
 	bool enabled;
 
-	if (DISPLAY_VER(i915) == 11 && !dig_port->tc_legacy_port)
-		return;
-
 	enabled = intel_display_power_is_enabled(i915,
 						 tc_cold_get_power_domain(dig_port,
 									  dig_port->tc_mode));
-- 
2.27.0


^ permalink raw reply related	[flat|nested] 72+ messages in thread

* [Intel-gfx] [PATCH 11/13] drm/i915/tc: Fix TypeC PHY connect/disconnect logic on ADL-P
  2021-09-21  0:23 [Intel-gfx] [PATCH 00/13] drm/i915/tc: Fix TypeC connect/disconnect sequences Imre Deak
                   ` (9 preceding siblings ...)
  2021-09-21  0:23 ` [Intel-gfx] [PATCH 10/13] drm/i915/icl/tc: Remove the ICL special casing during TC-cold blocking Imre Deak
@ 2021-09-21  0:23 ` Imre Deak
  2021-09-28 20:51   ` Souza, Jose
  2021-09-29 13:28   ` [Intel-gfx] [PATCH v2 " Imre Deak
  2021-09-21  0:23 ` [Intel-gfx] [PATCH 12/13] drm/i915/tc: Drop extra TC cold blocking from intel_tc_port_connected() Imre Deak
                   ` (12 subsequent siblings)
  23 siblings, 2 replies; 72+ messages in thread
From: Imre Deak @ 2021-09-21  0:23 UTC (permalink / raw)
  To: intel-gfx; +Cc: José Roberto de Souza

So far TC-cold was blocked only for the duration of TypeC mode resets.
The DP-alt and legacy modes require TC-cold to be blocked also whenever
the port is in use (AUX transfers, enable modeset), and this was ensured
by the held PHY ownership flag. On ADL-P this doesn't work, since the
PHY ownership flag is in a register backed by the PW#2 power well.
Whenever this power well is disabled the ownership flag is cleared by
the HW under the driver.

The only way to cleanly release and re-acquire the PHY ownership flag
and also allow for power saving (by disabling the display power wells
and reaching DC5/6 states) is to hold the TC-cold blocking power domains
while the PHY is connected and disconnect/reconnect the PHY on-demand
around AUX transfers and modeset enable/disables. Let's do that,
disconnecting a PHY with a 1 sec delay after it becomes idle. For
consistency do this on all platforms and TypeC modes.

Cc: José Roberto de Souza <jose.souza@intel.com>
Signed-off-by: Imre Deak <imre.deak@intel.com>
---
 drivers/gpu/drm/i915/display/intel_ddi.c      |  7 +-
 .../drm/i915/display/intel_display_types.h    |  1 +
 drivers/gpu/drm/i915/display/intel_tc.c       | 87 +++++++++++--------
 drivers/gpu/drm/i915/display/intel_tc.h       |  2 +-
 4 files changed, 60 insertions(+), 37 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c b/drivers/gpu/drm/i915/display/intel_ddi.c
index b9194d6a4dfe7..b509d5f2d5f0e 100644
--- a/drivers/gpu/drm/i915/display/intel_ddi.c
+++ b/drivers/gpu/drm/i915/display/intel_ddi.c
@@ -4019,8 +4019,11 @@ static void intel_ddi_encoder_destroy(struct drm_encoder *encoder)
 {
 	struct drm_i915_private *i915 = to_i915(encoder->dev);
 	struct intel_digital_port *dig_port = enc_to_dig_port(to_intel_encoder(encoder));
+	enum phy phy = intel_port_to_phy(i915, dig_port->base.port);
 
 	intel_dp_encoder_flush_work(encoder);
+	if (intel_phy_is_tc(i915, phy))
+		intel_tc_port_flush_work(dig_port);
 	intel_display_power_flush_work(i915);
 
 	drm_encoder_cleanup(encoder);
@@ -4445,7 +4448,7 @@ static void intel_ddi_encoder_suspend(struct intel_encoder *encoder)
 	if (!intel_phy_is_tc(i915, phy))
 		return;
 
-	intel_tc_port_disconnect_phy(dig_port);
+	intel_tc_port_flush_work(dig_port);
 }
 
 static void intel_ddi_encoder_shutdown(struct intel_encoder *encoder)
@@ -4460,7 +4463,7 @@ static void intel_ddi_encoder_shutdown(struct intel_encoder *encoder)
 	if (!intel_phy_is_tc(i915, phy))
 		return;
 
-	intel_tc_port_disconnect_phy(dig_port);
+	intel_tc_port_flush_work(dig_port);
 }
 
 #define port_tc_name(port) ((port) - PORT_TC1 + '1')
diff --git a/drivers/gpu/drm/i915/display/intel_display_types.h b/drivers/gpu/drm/i915/display/intel_display_types.h
index 08a73ffded957..53509f6ae3d10 100644
--- a/drivers/gpu/drm/i915/display/intel_display_types.h
+++ b/drivers/gpu/drm/i915/display/intel_display_types.h
@@ -1667,6 +1667,7 @@ struct intel_digital_port {
 	struct mutex tc_lock;	/* protects the TypeC port mode */
 	intel_wakeref_t tc_lock_wakeref;
 	enum intel_display_power_domain tc_lock_power_domain;
+	struct delayed_work tc_disconnect_phy_work;
 	int tc_link_refcount;
 	bool tc_legacy_port:1;
 	char tc_port_name[8];
diff --git a/drivers/gpu/drm/i915/display/intel_tc.c b/drivers/gpu/drm/i915/display/intel_tc.c
index 8d799cf7ccefd..3fefd00e04685 100644
--- a/drivers/gpu/drm/i915/display/intel_tc.c
+++ b/drivers/gpu/drm/i915/display/intel_tc.c
@@ -645,6 +645,13 @@ static void intel_tc_port_update_mode(struct intel_digital_port *dig_port,
 
 	intel_tc_port_reset_mode(dig_port, required_lanes, force_disconnect);
 
+	/* Get power domain matching the new mode after reset. */
+	tc_cold_unblock(dig_port, dig_port->tc_lock_power_domain,
+			fetch_and_zero(&dig_port->tc_lock_wakeref));
+	if (dig_port->tc_mode != TC_PORT_DISCONNECTED)
+		dig_port->tc_lock_wakeref = tc_cold_block(dig_port,
+							  &dig_port->tc_lock_power_domain);
+
 	tc_cold_unblock(dig_port, domain, wref);
 }
 
@@ -672,6 +679,7 @@ void intel_tc_port_sanitize(struct intel_digital_port *dig_port)
 		active_links = to_intel_crtc(encoder->base.crtc)->active;
 
 	drm_WARN_ON(&i915->drm, dig_port->tc_mode != TC_PORT_DISCONNECTED);
+	drm_WARN_ON(&i915->drm, dig_port->tc_lock_wakeref);
 	if (active_links) {
 		enum intel_display_power_domain domain;
 		intel_wakeref_t tc_cold_wref = tc_cold_block(dig_port, &domain);
@@ -684,6 +692,9 @@ void intel_tc_port_sanitize(struct intel_digital_port *dig_port)
 				    dig_port->tc_port_name, active_links);
 		intel_tc_port_link_init_refcount(dig_port, active_links);
 
+		dig_port->tc_lock_wakeref = tc_cold_block(dig_port,
+							  &dig_port->tc_lock_power_domain);
+
 		tc_cold_unblock(dig_port, domain, tc_cold_wref);
 	}
 
@@ -724,60 +735,67 @@ bool intel_tc_port_connected(struct intel_encoder *encoder)
 }
 
 static void __intel_tc_port_lock(struct intel_digital_port *dig_port,
-				 int required_lanes, bool force_disconnect)
+				 int required_lanes)
 {
 	struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev);
-	intel_wakeref_t wakeref;
-
-	wakeref = intel_display_power_get(i915, POWER_DOMAIN_DISPLAY_CORE);
 
 	mutex_lock(&dig_port->tc_lock);
 
+	cancel_delayed_work(&dig_port->tc_disconnect_phy_work);
 
 	if (!dig_port->tc_link_refcount)
 		intel_tc_port_update_mode(dig_port, required_lanes,
-					  force_disconnect);
+					  false);
 
 	drm_WARN_ON(&i915->drm, dig_port->tc_mode == TC_PORT_DISCONNECTED);
 	drm_WARN_ON(&i915->drm, dig_port->tc_mode != TC_PORT_TBT_ALT &&
 				!tc_phy_is_owned(dig_port));
-
-	drm_WARN_ON(&i915->drm, dig_port->tc_lock_wakeref);
-	dig_port->tc_lock_wakeref = wakeref;
 }
 
 void intel_tc_port_lock(struct intel_digital_port *dig_port)
 {
-	__intel_tc_port_lock(dig_port, 1, false);
-}
-
-void intel_tc_port_unlock(struct intel_digital_port *dig_port)
-{
-	struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev);
-	intel_wakeref_t wakeref = fetch_and_zero(&dig_port->tc_lock_wakeref);
-
-	mutex_unlock(&dig_port->tc_lock);
-
-	intel_display_power_put_async(i915, POWER_DOMAIN_DISPLAY_CORE,
-				      wakeref);
+	__intel_tc_port_lock(dig_port, 1);
 }
 
 /**
- * intel_tc_port_disconnect_phy: disconnect TypeC PHY from display port
+ * intel_tc_port_disconnect_phy_work: disconnect TypeC PHY from display port
  * @dig_port: digital port
  *
  * Disconnect the given digital port from its TypeC PHY (handing back the
- * control of the PHY to the TypeC subsystem). The only purpose of this
- * function is to force the disconnect even with a TypeC display output still
- * plugged to the TypeC connector, which is required by the TypeC firmwares
- * during system suspend and shutdown. Otherwise - during the unplug event
- * handling - the PHY ownership is released automatically by
- * intel_tc_port_reset_mode(), when calling this function is not required.
+ * control of the PHY to the TypeC subsystem). This will happen in a delayed
+ * manner after each aux transactions and modeset disables.
  */
-void intel_tc_port_disconnect_phy(struct intel_digital_port *dig_port)
+static void intel_tc_port_disconnect_phy_work(struct work_struct *work)
 {
-	__intel_tc_port_lock(dig_port, 1, true);
-	intel_tc_port_unlock(dig_port);
+	struct intel_digital_port *dig_port =
+		container_of(work, struct intel_digital_port, tc_disconnect_phy_work.work);
+
+	mutex_lock(&dig_port->tc_lock);
+
+	if (!dig_port->tc_link_refcount)
+		intel_tc_port_update_mode(dig_port, 1, true);
+
+	mutex_unlock(&dig_port->tc_lock);
+}
+
+/**
+ * intel_tc_port_flush_work: flush the work disconnecting the PHY
+ * @dig_port: digital port
+ *
+ * Flush the delayed work disconnecting an idle PHY.
+ */
+void intel_tc_port_flush_work(struct intel_digital_port *dig_port)
+{
+	flush_delayed_work(&dig_port->tc_disconnect_phy_work);
+}
+
+void intel_tc_port_unlock(struct intel_digital_port *dig_port)
+{
+	if (!dig_port->tc_link_refcount && dig_port->tc_mode != TC_PORT_DISCONNECTED)
+		queue_delayed_work(system_unbound_wq, &dig_port->tc_disconnect_phy_work,
+				   msecs_to_jiffies(1000));
+
+	mutex_unlock(&dig_port->tc_lock);
 }
 
 bool intel_tc_port_ref_held(struct intel_digital_port *dig_port)
@@ -789,16 +807,16 @@ bool intel_tc_port_ref_held(struct intel_digital_port *dig_port)
 void intel_tc_port_get_link(struct intel_digital_port *dig_port,
 			    int required_lanes)
 {
-	__intel_tc_port_lock(dig_port, required_lanes, false);
+	__intel_tc_port_lock(dig_port, required_lanes);
 	dig_port->tc_link_refcount++;
 	intel_tc_port_unlock(dig_port);
 }
 
 void intel_tc_port_put_link(struct intel_digital_port *dig_port)
 {
-	mutex_lock(&dig_port->tc_lock);
-	dig_port->tc_link_refcount--;
-	mutex_unlock(&dig_port->tc_lock);
+	intel_tc_port_lock(dig_port);
+	--dig_port->tc_link_refcount;
+	intel_tc_port_unlock(dig_port);
 }
 
 static bool
@@ -854,6 +872,7 @@ void intel_tc_port_init(struct intel_digital_port *dig_port, bool is_legacy)
 		 "%c/TC#%d", port_name(port), tc_port + 1);
 
 	mutex_init(&dig_port->tc_lock);
+	INIT_DELAYED_WORK(&dig_port->tc_disconnect_phy_work, intel_tc_port_disconnect_phy_work);
 	dig_port->tc_legacy_port = is_legacy;
 	dig_port->tc_mode = TC_PORT_DISCONNECTED;
 	dig_port->tc_link_refcount = 0;
diff --git a/drivers/gpu/drm/i915/display/intel_tc.h b/drivers/gpu/drm/i915/display/intel_tc.h
index 0fdcddb4fc870..6b47b29f551c9 100644
--- a/drivers/gpu/drm/i915/display/intel_tc.h
+++ b/drivers/gpu/drm/i915/display/intel_tc.h
@@ -17,7 +17,6 @@ bool intel_tc_port_in_dp_alt_mode(struct intel_digital_port *dig_port);
 bool intel_tc_port_in_legacy_mode(struct intel_digital_port *dig_port);
 
 bool intel_tc_port_connected(struct intel_encoder *encoder);
-void intel_tc_port_disconnect_phy(struct intel_digital_port *dig_port);
 
 u32 intel_tc_port_get_lane_mask(struct intel_digital_port *dig_port);
 u32 intel_tc_port_get_pin_assignment_mask(struct intel_digital_port *dig_port);
@@ -28,6 +27,7 @@ void intel_tc_port_set_fia_lane_count(struct intel_digital_port *dig_port,
 void intel_tc_port_sanitize(struct intel_digital_port *dig_port);
 void intel_tc_port_lock(struct intel_digital_port *dig_port);
 void intel_tc_port_unlock(struct intel_digital_port *dig_port);
+void intel_tc_port_flush_work(struct intel_digital_port *dig_port);
 void intel_tc_port_get_link(struct intel_digital_port *dig_port,
 			    int required_lanes);
 void intel_tc_port_put_link(struct intel_digital_port *dig_port);
-- 
2.27.0


^ permalink raw reply related	[flat|nested] 72+ messages in thread

* [Intel-gfx] [PATCH 12/13] drm/i915/tc: Drop extra TC cold blocking from intel_tc_port_connected()
  2021-09-21  0:23 [Intel-gfx] [PATCH 00/13] drm/i915/tc: Fix TypeC connect/disconnect sequences Imre Deak
                   ` (10 preceding siblings ...)
  2021-09-21  0:23 ` [Intel-gfx] [PATCH 11/13] drm/i915/tc: Fix TypeC PHY connect/disconnect logic on ADL-P Imre Deak
@ 2021-09-21  0:23 ` Imre Deak
  2021-09-28 20:51   ` Souza, Jose
  2021-09-21  0:23 ` [Intel-gfx] [PATCH 13/13] drm/i915/tc: Fix system hang on ADL-P during TypeC PHY disconnect Imre Deak
                   ` (11 subsequent siblings)
  23 siblings, 1 reply; 72+ messages in thread
From: Imre Deak @ 2021-09-21  0:23 UTC (permalink / raw)
  To: intel-gfx; +Cc: José Roberto de Souza

After the previous patch the driver holds a power domain blocking
TC-cold whenever the port is locked, so we can remove the extra blocking
around the lock/unlock sequence.

Cc: José Roberto de Souza <jose.souza@intel.com>
Signed-off-by: Imre Deak <imre.deak@intel.com>
---
 drivers/gpu/drm/i915/display/intel_tc.c | 4 ----
 1 file changed, 4 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_tc.c b/drivers/gpu/drm/i915/display/intel_tc.c
index 3fefd00e04685..99b66c2852e53 100644
--- a/drivers/gpu/drm/i915/display/intel_tc.c
+++ b/drivers/gpu/drm/i915/display/intel_tc.c
@@ -719,16 +719,12 @@ bool intel_tc_port_connected(struct intel_encoder *encoder)
 {
 	struct intel_digital_port *dig_port = enc_to_dig_port(encoder);
 	bool is_connected;
-	enum intel_display_power_domain domain;
-	intel_wakeref_t tc_cold_wref;
 
 	intel_tc_port_lock(dig_port);
-	tc_cold_wref = tc_cold_block(dig_port, &domain);
 
 	is_connected = tc_port_live_status_mask(dig_port) &
 		       BIT(dig_port->tc_mode);
 
-	tc_cold_unblock(dig_port, domain, tc_cold_wref);
 	intel_tc_port_unlock(dig_port);
 
 	return is_connected;
-- 
2.27.0


^ permalink raw reply related	[flat|nested] 72+ messages in thread

* [Intel-gfx] [PATCH 13/13] drm/i915/tc: Fix system hang on ADL-P during TypeC PHY disconnect
  2021-09-21  0:23 [Intel-gfx] [PATCH 00/13] drm/i915/tc: Fix TypeC connect/disconnect sequences Imre Deak
                   ` (11 preceding siblings ...)
  2021-09-21  0:23 ` [Intel-gfx] [PATCH 12/13] drm/i915/tc: Drop extra TC cold blocking from intel_tc_port_connected() Imre Deak
@ 2021-09-21  0:23 ` Imre Deak
  2021-09-28 20:55   ` Souza, Jose
  2021-09-29 13:28   ` [Intel-gfx] [PATCH v2 " Imre Deak
  2021-09-21  0:30 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915/tc: Fix TypeC connect/disconnect sequences Patchwork
                   ` (10 subsequent siblings)
  23 siblings, 2 replies; 72+ messages in thread
From: Imre Deak @ 2021-09-21  0:23 UTC (permalink / raw)
  To: intel-gfx; +Cc: José Roberto de Souza

The PHY ownership release->AUX PW disable steps during a modeset
disable->PHY disconnect sequence can hang the system if the PHY
disconnect happens after disabling the PHY's PLL. The spec doesn't
require a specific order for these two steps, so this issue is still
being root caused by HW/FW teams. Until that is found, let's make
sure the disconnect happens before the PLL is disabled, and do this on
all platforms for consistency.

Cc: José Roberto de Souza <jose.souza@intel.com>
Signed-off-by: Imre Deak <imre.deak@intel.com>
---
 drivers/gpu/drm/i915/display/intel_tc.c | 6 ++++++
 1 file changed, 6 insertions(+)

diff --git a/drivers/gpu/drm/i915/display/intel_tc.c b/drivers/gpu/drm/i915/display/intel_tc.c
index 99b66c2852e53..dc52b76bd57e2 100644
--- a/drivers/gpu/drm/i915/display/intel_tc.c
+++ b/drivers/gpu/drm/i915/display/intel_tc.c
@@ -813,6 +813,12 @@ void intel_tc_port_put_link(struct intel_digital_port *dig_port)
 	intel_tc_port_lock(dig_port);
 	--dig_port->tc_link_refcount;
 	intel_tc_port_unlock(dig_port);
+
+	/*
+	 * Disconnecting the PHY after the PHY's PLL gets disabled may
+	 * hang the system on ADL-P, so disconnect the PHY here synchronously.
+	 */
+	intel_tc_port_flush_work(dig_port);
 }
 
 static bool
-- 
2.27.0


^ permalink raw reply related	[flat|nested] 72+ messages in thread

* [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915/tc: Fix TypeC connect/disconnect sequences
  2021-09-21  0:23 [Intel-gfx] [PATCH 00/13] drm/i915/tc: Fix TypeC connect/disconnect sequences Imre Deak
                   ` (12 preceding siblings ...)
  2021-09-21  0:23 ` [Intel-gfx] [PATCH 13/13] drm/i915/tc: Fix system hang on ADL-P during TypeC PHY disconnect Imre Deak
@ 2021-09-21  0:30 ` Patchwork
  2021-09-21  0:32 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork
                   ` (9 subsequent siblings)
  23 siblings, 0 replies; 72+ messages in thread
From: Patchwork @ 2021-09-21  0:30 UTC (permalink / raw)
  To: Imre Deak; +Cc: intel-gfx

== Series Details ==

Series: drm/i915/tc: Fix TypeC connect/disconnect sequences
URL   : https://patchwork.freedesktop.org/series/94878/
State : warning

== Summary ==

$ dim checkpatch origin/drm-tip
9d2a21b4286f drm/i915/tc: Fix TypeC port init/resume time sanitization
8cf6d77baac7 drm/i915/adlp/tc: Fix PHY connected check for Thunderbolt mode
3a96d2e03bbf drm/i915/tc: Remove waiting for PHY complete during releasing ownership
-:13: WARNING:COMMIT_LOG_LONG_LINE: Possible unwrapped commit description (prefer a maximum 75 chars per line)
#13: 
commit ddec362724f9 ("drm/i915: Wait for TypeC PHY complete flag to clear in safe mode")

total: 0 errors, 1 warnings, 0 checks, 11 lines checked
4e8751ecf807 drm/i915/tc: Check for DP-alt, legacy sinks before taking PHY ownership
cc76a5af71d5 drm/i915/tc: Add/use helpers to retrieve TypeC port properties
344a4da141dd drm/i915/tc: Don't keep legacy TypeC ports in connected state w/o a sink
dc6bbabc3efa drm/i915/tc: Add a mode for the TypeC PHY's disconnected state
-:111: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis
#111: FILE: drivers/gpu/drm/i915/display/intel_tc.c:714:
+	drm_WARN_ON(&i915->drm, dig_port->tc_mode != TC_PORT_TBT_ALT &&
+				!tc_phy_is_owned(dig_port));

total: 0 errors, 0 warnings, 1 checks, 91 lines checked
1a6d3f2220ba drm/i915/tc: Refactor TC-cold block/unblock helpers
d163824eae60 drm/i915/tc: Avoid using legacy AUX PW in TBT mode
24944d022b80 drm/i915/icl/tc: Remove the ICL special casing during TC-cold blocking
d9687de8553d drm/i915/tc: Fix TypeC PHY connect/disconnect logic on ADL-P
14a2cb6aae07 drm/i915/tc: Drop extra TC cold blocking from intel_tc_port_connected()
1890abf291df drm/i915/tc: Fix system hang on ADL-P during TypeC PHY disconnect



^ permalink raw reply	[flat|nested] 72+ messages in thread

* [Intel-gfx] ✗ Fi.CI.SPARSE: warning for drm/i915/tc: Fix TypeC connect/disconnect sequences
  2021-09-21  0:23 [Intel-gfx] [PATCH 00/13] drm/i915/tc: Fix TypeC connect/disconnect sequences Imre Deak
                   ` (13 preceding siblings ...)
  2021-09-21  0:30 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915/tc: Fix TypeC connect/disconnect sequences Patchwork
@ 2021-09-21  0:32 ` Patchwork
  2021-09-21  1:01 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
                   ` (8 subsequent siblings)
  23 siblings, 0 replies; 72+ messages in thread
From: Patchwork @ 2021-09-21  0:32 UTC (permalink / raw)
  To: Imre Deak; +Cc: intel-gfx

== Series Details ==

Series: drm/i915/tc: Fix TypeC connect/disconnect sequences
URL   : https://patchwork.freedesktop.org/series/94878/
State : warning

== Summary ==

$ dim sparse --fast origin/drm-tip
Sparse version: v0.6.2
Fast mode used, each commit won't be checked separately.
-
+drivers/gpu/drm/i915/gt/intel_engine_stats.h:27:9: warning: trying to copy expression type 31
+drivers/gpu/drm/i915/gt/intel_engine_stats.h:27:9: warning: trying to copy expression type 31
+drivers/gpu/drm/i915/gt/intel_engine_stats.h:27:9: warning: trying to copy expression type 31
+drivers/gpu/drm/i915/gt/intel_engine_stats.h:32:9: warning: trying to copy expression type 31
+drivers/gpu/drm/i915/gt/intel_engine_stats.h:32:9: warning: trying to copy expression type 31
+drivers/gpu/drm/i915/gt/intel_engine_stats.h:49:9: warning: trying to copy expression type 31
+drivers/gpu/drm/i915/gt/intel_engine_stats.h:49:9: warning: trying to copy expression type 31
+drivers/gpu/drm/i915/gt/intel_engine_stats.h:49:9: warning: trying to copy expression type 31
+drivers/gpu/drm/i915/gt/intel_engine_stats.h:56:9: warning: trying to copy expression type 31
+drivers/gpu/drm/i915/gt/intel_engine_stats.h:56:9: warning: trying to copy expression type 31
+drivers/gpu/drm/i915/gt/intel_reset.c:1392:5: warning: context imbalance in 'intel_gt_reset_trylock' - different lock contexts for basic block
+drivers/gpu/drm/i915/i915_perf.c:1442:15: warning: memset with byte count of 16777216
+drivers/gpu/drm/i915/i915_perf.c:1496:15: warning: memset with byte count of 16777216
+./include/asm-generic/bitops/find.h:112:45: warning: shift count is negative (-262080)
+./include/asm-generic/bitops/find.h:32:31: warning: shift count is negative (-262080)
+./include/linux/spinlock.h:418:9: warning: context imbalance in 'fwtable_read16' - different lock contexts for basic block
+./include/linux/spinlock.h:418:9: warning: context imbalance in 'fwtable_read32' - different lock contexts for basic block
+./include/linux/spinlock.h:418:9: warning: context imbalance in 'fwtable_read64' - different lock contexts for basic block
+./include/linux/spinlock.h:418:9: warning: context imbalance in 'fwtable_read8' - different lock contexts for basic block
+./include/linux/spinlock.h:418:9: warning: context imbalance in 'fwtable_write16' - different lock contexts for basic block
+./include/linux/spinlock.h:418:9: warning: context imbalance in 'fwtable_write32' - different lock contexts for basic block
+./include/linux/spinlock.h:418:9: warning: context imbalance in 'fwtable_write8' - different lock contexts for basic block
+./include/linux/spinlock.h:418:9: warning: context imbalance in 'gen11_fwtable_read16' - different lock contexts for basic block
+./include/linux/spinlock.h:418:9: warning: context imbalance in 'gen11_fwtable_read32' - different lock contexts for basic block
+./include/linux/spinlock.h:418:9: warning: context imbalance in 'gen11_fwtable_read64' - different lock contexts for basic block
+./include/linux/spinlock.h:418:9: warning: context imbalance in 'gen11_fwtable_read8' - different lock contexts for basic block
+./include/linux/spinlock.h:418:9: warning: context imbalance in 'gen11_fwtable_write16' - different lock contexts for basic block
+./include/linux/spinlock.h:418:9: warning: context imbalance in 'gen11_fwtable_write32' - different lock contexts for basic block
+./include/linux/spinlock.h:418:9: warning: context imbalance in 'gen11_fwtable_write8' - different lock contexts for basic block
+./include/linux/spinlock.h:418:9: warning: context imbalance in 'gen12_fwtable_write16' - different lock contexts for basic block
+./include/linux/spinlock.h:418:9: warning: context imbalance in 'gen12_fwtable_write32' - different lock contexts for basic block
+./include/linux/spinlock.h:418:9: warning: context imbalance in 'gen12_fwtable_write8' - different lock contexts for basic block
+./include/linux/spinlock.h:418:9: warning: context imbalance in 'gen6_read16' - different lock contexts for basic block
+./include/linux/spinlock.h:418:9: warning: context imbalance in 'gen6_read32' - different lock contexts for basic block
+./include/linux/spinlock.h:418:9: warning: context imbalance in 'gen6_read64' - different lock contexts for basic block
+./include/linux/spinlock.h:418:9: warning: context imbalance in 'gen6_read8' - different lock contexts for basic block
+./include/linux/spinlock.h:418:9: warning: context imbalance in 'gen6_write16' - different lock contexts for basic block
+./include/linux/spinlock.h:418:9: warning: context imbalance in 'gen6_write32' - different lock contexts for basic block
+./include/linux/spinlock.h:418:9: warning: context imbalance in 'gen6_write8' - different lock contexts for basic block
+./include/linux/spinlock.h:418:9: warning: context imbalance in 'gen8_write16' - different lock contexts for basic block
+./include/linux/spinlock.h:418:9: warning: context imbalance in 'gen8_write32' - different lock contexts for basic block
+./include/linux/spinlock.h:418:9: warning: context imbalance in 'gen8_write8' - different lock contexts for basic block



^ permalink raw reply	[flat|nested] 72+ messages in thread

* [Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/tc: Fix TypeC connect/disconnect sequences
  2021-09-21  0:23 [Intel-gfx] [PATCH 00/13] drm/i915/tc: Fix TypeC connect/disconnect sequences Imre Deak
                   ` (14 preceding siblings ...)
  2021-09-21  0:32 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork
@ 2021-09-21  1:01 ` Patchwork
  2021-09-21  3:01 ` [Intel-gfx] ✓ Fi.CI.IGT: " Patchwork
                   ` (7 subsequent siblings)
  23 siblings, 0 replies; 72+ messages in thread
From: Patchwork @ 2021-09-21  1:01 UTC (permalink / raw)
  To: Imre Deak; +Cc: intel-gfx

[-- Attachment #1: Type: text/plain, Size: 9967 bytes --]

== Series Details ==

Series: drm/i915/tc: Fix TypeC connect/disconnect sequences
URL   : https://patchwork.freedesktop.org/series/94878/
State : success

== Summary ==

CI Bug Log - changes from CI_DRM_10615 -> Patchwork_21102
====================================================

Summary
-------

  **SUCCESS**

  No regressions found.

  External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21102/index.html

Known issues
------------

  Here are the changes found in Patchwork_21102 that come from known issues:

### IGT changes ###

#### Issues hit ####

  * igt@amdgpu/amd_basic@cs-compute:
    - fi-cfl-guc:         NOTRUN -> [SKIP][1] ([fdo#109271]) +17 similar issues
   [1]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21102/fi-cfl-guc/igt@amdgpu/amd_basic@cs-compute.html

  * igt@amdgpu/amd_basic@cs-sdma:
    - fi-kbl-7500u:       NOTRUN -> [SKIP][2] ([fdo#109271]) +17 similar issues
   [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21102/fi-kbl-7500u/igt@amdgpu/amd_basic@cs-sdma.html

  * igt@amdgpu/amd_basic@semaphore:
    - fi-bdw-5557u:       NOTRUN -> [SKIP][3] ([fdo#109271]) +27 similar issues
   [3]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21102/fi-bdw-5557u/igt@amdgpu/amd_basic@semaphore.html

  * igt@amdgpu/amd_cs_nop@sync-fork-gfx0:
    - fi-skl-6600u:       NOTRUN -> [SKIP][4] ([fdo#109271]) +17 similar issues
   [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21102/fi-skl-6600u/igt@amdgpu/amd_cs_nop@sync-fork-gfx0.html

  * igt@amdgpu/amd_cs_nop@sync-gfx0:
    - fi-kbl-7567u:       NOTRUN -> [SKIP][5] ([fdo#109271]) +17 similar issues
   [5]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21102/fi-kbl-7567u/igt@amdgpu/amd_cs_nop@sync-gfx0.html

  * igt@amdgpu/amd_prime@i915-to-amd:
    - fi-snb-2520m:       NOTRUN -> [SKIP][6] ([fdo#109271]) +18 similar issues
   [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21102/fi-snb-2520m/igt@amdgpu/amd_prime@i915-to-amd.html

  * igt@core_hotunplug@unbind-rebind:
    - fi-rkl-11600:       [PASS][7] -> [INCOMPLETE][8] ([i915#4130])
   [7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10615/fi-rkl-11600/igt@core_hotunplug@unbind-rebind.html
   [8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21102/fi-rkl-11600/igt@core_hotunplug@unbind-rebind.html
    - fi-bdw-5557u:       NOTRUN -> [WARN][9] ([i915#3718])
   [9]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21102/fi-bdw-5557u/igt@core_hotunplug@unbind-rebind.html

  * igt@i915_module_load@reload:
    - fi-icl-u2:          NOTRUN -> [INCOMPLETE][10] ([i915#4130] / [i915#4179])
   [10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21102/fi-icl-u2/igt@i915_module_load@reload.html
    - fi-glk-dsi:         [PASS][11] -> [INCOMPLETE][12] ([i915#4130])
   [11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10615/fi-glk-dsi/igt@i915_module_load@reload.html
   [12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21102/fi-glk-dsi/igt@i915_module_load@reload.html
    - fi-cfl-8109u:       NOTRUN -> [INCOMPLETE][13] ([i915#4130] / [i915#4179])
   [13]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21102/fi-cfl-8109u/igt@i915_module_load@reload.html

  * igt@i915_pm_rpm@basic-pci-d3-state:
    - fi-rkl-guc:         [PASS][14] -> [SKIP][15] ([fdo#109308])
   [14]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10615/fi-rkl-guc/igt@i915_pm_rpm@basic-pci-d3-state.html
   [15]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21102/fi-rkl-guc/igt@i915_pm_rpm@basic-pci-d3-state.html

  * igt@i915_selftest@live@gtt:
    - fi-bdw-5557u:       NOTRUN -> [DMESG-FAIL][16] ([i915#3674])
   [16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21102/fi-bdw-5557u/igt@i915_selftest@live@gtt.html

  * igt@kms_chamelium@dp-crc-fast:
    - fi-bdw-5557u:       NOTRUN -> [SKIP][17] ([fdo#109271] / [fdo#111827]) +8 similar issues
   [17]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21102/fi-bdw-5557u/igt@kms_chamelium@dp-crc-fast.html

  * igt@runner@aborted:
    - fi-cfl-8109u:       NOTRUN -> [FAIL][18] ([i915#2426] / [i915#3363])
   [18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21102/fi-cfl-8109u/igt@runner@aborted.html
    - fi-icl-u2:          NOTRUN -> [FAIL][19] ([i915#2426] / [i915#3363] / [i915#3690] / [i915#4136])
   [19]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21102/fi-icl-u2/igt@runner@aborted.html

  
#### Possible fixes ####

  * igt@core_hotunplug@unbind-rebind:
    - fi-cfl-guc:         [INCOMPLETE][20] ([i915#4130]) -> [PASS][21]
   [20]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10615/fi-cfl-guc/igt@core_hotunplug@unbind-rebind.html
   [21]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21102/fi-cfl-guc/igt@core_hotunplug@unbind-rebind.html
    - fi-icl-u2:          [INCOMPLETE][22] ([i915#4130]) -> [PASS][23]
   [22]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10615/fi-icl-u2/igt@core_hotunplug@unbind-rebind.html
   [23]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21102/fi-icl-u2/igt@core_hotunplug@unbind-rebind.html
    - fi-kbl-7500u:       [INCOMPLETE][24] ([i915#4130]) -> [PASS][25]
   [24]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10615/fi-kbl-7500u/igt@core_hotunplug@unbind-rebind.html
   [25]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21102/fi-kbl-7500u/igt@core_hotunplug@unbind-rebind.html
    - fi-cfl-8109u:       [INCOMPLETE][26] ([i915#4130]) -> [PASS][27]
   [26]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10615/fi-cfl-8109u/igt@core_hotunplug@unbind-rebind.html
   [27]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21102/fi-cfl-8109u/igt@core_hotunplug@unbind-rebind.html
    - fi-kbl-7567u:       [INCOMPLETE][28] ([i915#4130]) -> [PASS][29]
   [28]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10615/fi-kbl-7567u/igt@core_hotunplug@unbind-rebind.html
   [29]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21102/fi-kbl-7567u/igt@core_hotunplug@unbind-rebind.html

  * igt@i915_module_load@reload:
    - fi-kbl-r:           [TIMEOUT][30] ([i915#4136]) -> [PASS][31]
   [30]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10615/fi-kbl-r/igt@i915_module_load@reload.html
   [31]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21102/fi-kbl-r/igt@i915_module_load@reload.html
    - fi-snb-2520m:       [INCOMPLETE][32] ([i915#4179]) -> [PASS][33]
   [32]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10615/fi-snb-2520m/igt@i915_module_load@reload.html
   [33]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21102/fi-snb-2520m/igt@i915_module_load@reload.html
    - fi-skl-6600u:       [INCOMPLETE][34] ([i915#4130]) -> [PASS][35]
   [34]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10615/fi-skl-6600u/igt@i915_module_load@reload.html
   [35]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21102/fi-skl-6600u/igt@i915_module_load@reload.html

  * igt@kms_pipe_crc_basic@nonblocking-crc-pipe-a:
    - fi-rkl-guc:         [SKIP][36] ([i915#3919]) -> [PASS][37] +1 similar issue
   [36]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10615/fi-rkl-guc/igt@kms_pipe_crc_basic@nonblocking-crc-pipe-a.html
   [37]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21102/fi-rkl-guc/igt@kms_pipe_crc_basic@nonblocking-crc-pipe-a.html

  
  {name}: This element is suppressed. This means it is ignored when computing
          the status of the difference (SUCCESS, WARNING, or FAILURE).

  [fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
  [fdo#109308]: https://bugs.freedesktop.org/show_bug.cgi?id=109308
  [fdo#111827]: https://bugs.freedesktop.org/show_bug.cgi?id=111827
  [i915#2426]: https://gitlab.freedesktop.org/drm/intel/issues/2426
  [i915#3363]: https://gitlab.freedesktop.org/drm/intel/issues/3363
  [i915#3674]: https://gitlab.freedesktop.org/drm/intel/issues/3674
  [i915#3690]: https://gitlab.freedesktop.org/drm/intel/issues/3690
  [i915#3718]: https://gitlab.freedesktop.org/drm/intel/issues/3718
  [i915#3919]: https://gitlab.freedesktop.org/drm/intel/issues/3919
  [i915#4130]: https://gitlab.freedesktop.org/drm/intel/issues/4130
  [i915#4136]: https://gitlab.freedesktop.org/drm/intel/issues/4136
  [i915#4179]: https://gitlab.freedesktop.org/drm/intel/issues/4179
  [i915#456]: https://gitlab.freedesktop.org/drm/intel/issues/456


Participating hosts (37 -> 32)
------------------------------

  Missing    (5): bat-dg1-6 fi-bsw-cyan fi-ctg-p8600 bat-jsl-1 fi-bdw-samus 


Build changes
-------------

  * Linux: CI_DRM_10615 -> Patchwork_21102

  CI-20190529: 20190529
  CI_DRM_10615: 4aedbb89fd6dc4f0b3c5e9213059b0e84e054d19 @ git://anongit.freedesktop.org/gfx-ci/linux
  IGT_6213: e9ae59cb8b4f1e7bc61a9261f33fc7e52ae06c65 @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
  Patchwork_21102: 1890abf291df38a057b485e6e860751975a197dc @ git://anongit.freedesktop.org/gfx-ci/linux


== Linux commits ==

1890abf291df drm/i915/tc: Fix system hang on ADL-P during TypeC PHY disconnect
14a2cb6aae07 drm/i915/tc: Drop extra TC cold blocking from intel_tc_port_connected()
d9687de8553d drm/i915/tc: Fix TypeC PHY connect/disconnect logic on ADL-P
24944d022b80 drm/i915/icl/tc: Remove the ICL special casing during TC-cold blocking
d163824eae60 drm/i915/tc: Avoid using legacy AUX PW in TBT mode
1a6d3f2220ba drm/i915/tc: Refactor TC-cold block/unblock helpers
dc6bbabc3efa drm/i915/tc: Add a mode for the TypeC PHY's disconnected state
344a4da141dd drm/i915/tc: Don't keep legacy TypeC ports in connected state w/o a sink
cc76a5af71d5 drm/i915/tc: Add/use helpers to retrieve TypeC port properties
4e8751ecf807 drm/i915/tc: Check for DP-alt, legacy sinks before taking PHY ownership
3a96d2e03bbf drm/i915/tc: Remove waiting for PHY complete during releasing ownership
8cf6d77baac7 drm/i915/adlp/tc: Fix PHY connected check for Thunderbolt mode
9d2a21b4286f drm/i915/tc: Fix TypeC port init/resume time sanitization

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21102/index.html

[-- Attachment #2: Type: text/html, Size: 12442 bytes --]

^ permalink raw reply	[flat|nested] 72+ messages in thread

* [Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915/tc: Fix TypeC connect/disconnect sequences
  2021-09-21  0:23 [Intel-gfx] [PATCH 00/13] drm/i915/tc: Fix TypeC connect/disconnect sequences Imre Deak
                   ` (15 preceding siblings ...)
  2021-09-21  1:01 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
@ 2021-09-21  3:01 ` Patchwork
  2021-09-29 13:42 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915/tc: Fix TypeC connect/disconnect sequences (rev8) Patchwork
                   ` (6 subsequent siblings)
  23 siblings, 0 replies; 72+ messages in thread
From: Patchwork @ 2021-09-21  3:01 UTC (permalink / raw)
  To: Imre Deak; +Cc: intel-gfx

[-- Attachment #1: Type: text/plain, Size: 30274 bytes --]

== Series Details ==

Series: drm/i915/tc: Fix TypeC connect/disconnect sequences
URL   : https://patchwork.freedesktop.org/series/94878/
State : success

== Summary ==

CI Bug Log - changes from CI_DRM_10615_full -> Patchwork_21102_full
====================================================

Summary
-------

  **WARNING**

  Minor unknown changes coming with Patchwork_21102_full need to be verified
  manually.
  
  If you think the reported changes have nothing to do with the changes
  introduced in Patchwork_21102_full, please notify your bug team to allow them
  to document this new failure mode, which will reduce false positives in CI.

  

Possible new issues
-------------------

  Here are the unknown changes that may have been introduced in Patchwork_21102_full:

### IGT changes ###

#### Warnings ####

  * igt@device_reset@unbind-reset-rebind:
    - shard-glk:          [INCOMPLETE][1] ([i915#4130]) -> [INCOMPLETE][2]
   [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10615/shard-glk6/igt@device_reset@unbind-reset-rebind.html
   [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21102/shard-glk4/igt@device_reset@unbind-reset-rebind.html

  * igt@i915_module_load@reload:
    - shard-iclb:         [INCOMPLETE][3] ([i915#4130]) -> [INCOMPLETE][4]
   [3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10615/shard-iclb8/igt@i915_module_load@reload.html
   [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21102/shard-iclb1/igt@i915_module_load@reload.html

  
Known issues
------------

  Here are the changes found in Patchwork_21102_full that come from known issues:

### IGT changes ###

#### Issues hit ####

  * igt@gem_create@create-massive:
    - shard-snb:          NOTRUN -> [DMESG-WARN][5] ([i915#3002])
   [5]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21102/shard-snb7/igt@gem_create@create-massive.html

  * igt@gem_ctx_isolation@preservation-s3@bcs0:
    - shard-tglb:         [PASS][6] -> [INCOMPLETE][7] ([i915#456]) +1 similar issue
   [6]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10615/shard-tglb3/igt@gem_ctx_isolation@preservation-s3@bcs0.html
   [7]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21102/shard-tglb7/igt@gem_ctx_isolation@preservation-s3@bcs0.html

  * igt@gem_ctx_persistence@engines-hostile-preempt:
    - shard-snb:          NOTRUN -> [SKIP][8] ([fdo#109271] / [i915#1099]) +3 similar issues
   [8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21102/shard-snb7/igt@gem_ctx_persistence@engines-hostile-preempt.html

  * igt@gem_eio@unwedge-stress:
    - shard-tglb:         [PASS][9] -> [TIMEOUT][10] ([i915#2369] / [i915#3063] / [i915#3648])
   [9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10615/shard-tglb1/igt@gem_eio@unwedge-stress.html
   [10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21102/shard-tglb2/igt@gem_eio@unwedge-stress.html

  * igt@gem_exec_fair@basic-deadline:
    - shard-glk:          [PASS][11] -> [FAIL][12] ([i915#2846])
   [11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10615/shard-glk8/igt@gem_exec_fair@basic-deadline.html
   [12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21102/shard-glk5/igt@gem_exec_fair@basic-deadline.html

  * igt@gem_exec_fair@basic-flow@rcs0:
    - shard-tglb:         [PASS][13] -> [FAIL][14] ([i915#2842])
   [13]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10615/shard-tglb3/igt@gem_exec_fair@basic-flow@rcs0.html
   [14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21102/shard-tglb6/igt@gem_exec_fair@basic-flow@rcs0.html

  * igt@gem_exec_fair@basic-none-share@rcs0:
    - shard-iclb:         [PASS][15] -> [FAIL][16] ([i915#2842])
   [15]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10615/shard-iclb7/igt@gem_exec_fair@basic-none-share@rcs0.html
   [16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21102/shard-iclb8/igt@gem_exec_fair@basic-none-share@rcs0.html

  * igt@gem_exec_fair@basic-pace-share@rcs0:
    - shard-glk:          [PASS][17] -> [FAIL][18] ([i915#2842]) +1 similar issue
   [17]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10615/shard-glk6/igt@gem_exec_fair@basic-pace-share@rcs0.html
   [18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21102/shard-glk4/igt@gem_exec_fair@basic-pace-share@rcs0.html

  * igt@gem_exec_flush@basic-uc-ro-default:
    - shard-skl:          [PASS][19] -> [DMESG-WARN][20] ([i915#1982]) +2 similar issues
   [19]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10615/shard-skl1/igt@gem_exec_flush@basic-uc-ro-default.html
   [20]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21102/shard-skl4/igt@gem_exec_flush@basic-uc-ro-default.html

  * igt@gem_huc_copy@huc-copy:
    - shard-kbl:          NOTRUN -> [SKIP][21] ([fdo#109271] / [i915#2190])
   [21]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21102/shard-kbl6/igt@gem_huc_copy@huc-copy.html

  * igt@gem_pwrite@basic-exhaustion:
    - shard-apl:          NOTRUN -> [WARN][22] ([i915#2658])
   [22]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21102/shard-apl8/igt@gem_pwrite@basic-exhaustion.html

  * igt@gem_userptr_blits@dmabuf-sync:
    - shard-apl:          NOTRUN -> [SKIP][23] ([fdo#109271] / [i915#3323])
   [23]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21102/shard-apl1/igt@gem_userptr_blits@dmabuf-sync.html

  * igt@gem_userptr_blits@input-checking:
    - shard-apl:          NOTRUN -> [DMESG-WARN][24] ([i915#3002])
   [24]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21102/shard-apl2/igt@gem_userptr_blits@input-checking.html

  * igt@gen9_exec_parse@allowed-single:
    - shard-skl:          [PASS][25] -> [DMESG-WARN][26] ([i915#1436] / [i915#716])
   [25]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10615/shard-skl1/igt@gen9_exec_parse@allowed-single.html
   [26]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21102/shard-skl1/igt@gen9_exec_parse@allowed-single.html

  * igt@gen9_exec_parse@shadow-peek:
    - shard-tglb:         NOTRUN -> [SKIP][27] ([i915#2856])
   [27]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21102/shard-tglb3/igt@gen9_exec_parse@shadow-peek.html

  * igt@i915_pm_rpm@pc8-residency:
    - shard-tglb:         NOTRUN -> [SKIP][28] ([fdo#109506] / [i915#2411])
   [28]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21102/shard-tglb2/igt@i915_pm_rpm@pc8-residency.html

  * igt@i915_suspend@fence-restore-tiled2untiled:
    - shard-apl:          [PASS][29] -> [DMESG-WARN][30] ([i915#180])
   [29]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10615/shard-apl6/igt@i915_suspend@fence-restore-tiled2untiled.html
   [30]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21102/shard-apl1/igt@i915_suspend@fence-restore-tiled2untiled.html

  * igt@i915_suspend@forcewake:
    - shard-tglb:         [PASS][31] -> [INCOMPLETE][32] ([i915#2411] / [i915#456])
   [31]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10615/shard-tglb2/igt@i915_suspend@forcewake.html
   [32]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21102/shard-tglb7/igt@i915_suspend@forcewake.html

  * igt@kms_big_fb@linear-16bpp-rotate-90:
    - shard-tglb:         NOTRUN -> [SKIP][33] ([fdo#111614])
   [33]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21102/shard-tglb3/igt@kms_big_fb@linear-16bpp-rotate-90.html

  * igt@kms_big_fb@y-tiled-max-hw-stride-32bpp-rotate-180-hflip:
    - shard-apl:          NOTRUN -> [SKIP][34] ([fdo#109271] / [i915#3777]) +2 similar issues
   [34]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21102/shard-apl8/igt@kms_big_fb@y-tiled-max-hw-stride-32bpp-rotate-180-hflip.html

  * igt@kms_big_fb@yf-tiled-max-hw-stride-32bpp-rotate-0-hflip-async-flip:
    - shard-kbl:          NOTRUN -> [SKIP][35] ([fdo#109271]) +123 similar issues
   [35]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21102/shard-kbl3/igt@kms_big_fb@yf-tiled-max-hw-stride-32bpp-rotate-0-hflip-async-flip.html

  * igt@kms_big_fb@yf-tiled-max-hw-stride-64bpp-rotate-0:
    - shard-apl:          NOTRUN -> [SKIP][36] ([fdo#109271]) +144 similar issues
   [36]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21102/shard-apl1/igt@kms_big_fb@yf-tiled-max-hw-stride-64bpp-rotate-0.html

  * igt@kms_big_fb@yf-tiled-max-hw-stride-64bpp-rotate-0-async-flip:
    - shard-tglb:         NOTRUN -> [SKIP][37] ([fdo#111615])
   [37]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21102/shard-tglb3/igt@kms_big_fb@yf-tiled-max-hw-stride-64bpp-rotate-0-async-flip.html

  * igt@kms_big_joiner@2x-modeset:
    - shard-iclb:         NOTRUN -> [SKIP][38] ([i915#2705])
   [38]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21102/shard-iclb3/igt@kms_big_joiner@2x-modeset.html

  * igt@kms_ccs@pipe-a-bad-aux-stride-y_tiled_gen12_rc_ccs:
    - shard-skl:          NOTRUN -> [SKIP][39] ([fdo#109271]) +3 similar issues
   [39]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21102/shard-skl2/igt@kms_ccs@pipe-a-bad-aux-stride-y_tiled_gen12_rc_ccs.html

  * igt@kms_ccs@pipe-a-crc-primary-rotation-180-y_tiled_gen12_rc_ccs_cc:
    - shard-kbl:          NOTRUN -> [SKIP][40] ([fdo#109271] / [i915#3886]) +7 similar issues
   [40]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21102/shard-kbl2/igt@kms_ccs@pipe-a-crc-primary-rotation-180-y_tiled_gen12_rc_ccs_cc.html

  * igt@kms_ccs@pipe-a-crc-sprite-planes-basic-y_tiled_gen12_mc_ccs:
    - shard-iclb:         NOTRUN -> [SKIP][41] ([fdo#109278] / [i915#3886])
   [41]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21102/shard-iclb3/igt@kms_ccs@pipe-a-crc-sprite-planes-basic-y_tiled_gen12_mc_ccs.html

  * igt@kms_ccs@pipe-b-bad-pixel-format-y_tiled_gen12_mc_ccs:
    - shard-apl:          NOTRUN -> [SKIP][42] ([fdo#109271] / [i915#3886]) +3 similar issues
   [42]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21102/shard-apl8/igt@kms_ccs@pipe-b-bad-pixel-format-y_tiled_gen12_mc_ccs.html

  * igt@kms_ccs@pipe-b-ccs-on-another-bo-y_tiled_ccs:
    - shard-tglb:         NOTRUN -> [SKIP][43] ([i915#3689])
   [43]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21102/shard-tglb3/igt@kms_ccs@pipe-b-ccs-on-another-bo-y_tiled_ccs.html

  * igt@kms_chamelium@hdmi-audio-edid:
    - shard-tglb:         NOTRUN -> [SKIP][44] ([fdo#109284] / [fdo#111827])
   [44]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21102/shard-tglb8/igt@kms_chamelium@hdmi-audio-edid.html

  * igt@kms_chamelium@hdmi-crc-multiple:
    - shard-snb:          NOTRUN -> [SKIP][45] ([fdo#109271] / [fdo#111827]) +21 similar issues
   [45]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21102/shard-snb7/igt@kms_chamelium@hdmi-crc-multiple.html

  * igt@kms_color_chamelium@pipe-a-ctm-limited-range:
    - shard-apl:          NOTRUN -> [SKIP][46] ([fdo#109271] / [fdo#111827]) +13 similar issues
   [46]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21102/shard-apl7/igt@kms_color_chamelium@pipe-a-ctm-limited-range.html

  * igt@kms_color_chamelium@pipe-a-degamma:
    - shard-kbl:          NOTRUN -> [SKIP][47] ([fdo#109271] / [fdo#111827]) +13 similar issues
   [47]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21102/shard-kbl2/igt@kms_color_chamelium@pipe-a-degamma.html

  * igt@kms_content_protection@atomic:
    - shard-kbl:          NOTRUN -> [TIMEOUT][48] ([i915#1319]) +1 similar issue
   [48]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21102/shard-kbl2/igt@kms_content_protection@atomic.html
    - shard-tglb:         NOTRUN -> [SKIP][49] ([fdo#111828])
   [49]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21102/shard-tglb2/igt@kms_content_protection@atomic.html

  * igt@kms_content_protection@lic:
    - shard-apl:          NOTRUN -> [TIMEOUT][50] ([i915#1319])
   [50]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21102/shard-apl7/igt@kms_content_protection@lic.html

  * igt@kms_cursor_crc@pipe-d-cursor-512x512-onscreen:
    - shard-iclb:         NOTRUN -> [SKIP][51] ([fdo#109278]) +2 similar issues
   [51]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21102/shard-iclb3/igt@kms_cursor_crc@pipe-d-cursor-512x512-onscreen.html

  * igt@kms_dp_tiled_display@basic-test-pattern-with-chamelium:
    - shard-iclb:         NOTRUN -> [SKIP][52] ([i915#3528])
   [52]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21102/shard-iclb3/igt@kms_dp_tiled_display@basic-test-pattern-with-chamelium.html

  * igt@kms_flip@2x-flip-vs-blocking-wf-vblank@ab-hdmi-a1-hdmi-a2:
    - shard-glk:          [PASS][53] -> [FAIL][54] ([i915#2122])
   [53]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10615/shard-glk1/igt@kms_flip@2x-flip-vs-blocking-wf-vblank@ab-hdmi-a1-hdmi-a2.html
   [54]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21102/shard-glk7/igt@kms_flip@2x-flip-vs-blocking-wf-vblank@ab-hdmi-a1-hdmi-a2.html

  * igt@kms_flip@2x-nonexisting-fb:
    - shard-iclb:         NOTRUN -> [SKIP][55] ([fdo#109274])
   [55]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21102/shard-iclb3/igt@kms_flip@2x-nonexisting-fb.html

  * igt@kms_flip@flip-vs-suspend-interruptible@a-edp1:
    - shard-tglb:         [PASS][56] -> [INCOMPLETE][57] ([i915#2411] / [i915#4173] / [i915#456])
   [56]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10615/shard-tglb2/igt@kms_flip@flip-vs-suspend-interruptible@a-edp1.html
   [57]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21102/shard-tglb7/igt@kms_flip@flip-vs-suspend-interruptible@a-edp1.html

  * igt@kms_flip@flip-vs-suspend-interruptible@c-edp1:
    - shard-skl:          [PASS][58] -> [INCOMPLETE][59] ([i915#198])
   [58]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10615/shard-skl8/igt@kms_flip@flip-vs-suspend-interruptible@c-edp1.html
   [59]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21102/shard-skl6/igt@kms_flip@flip-vs-suspend-interruptible@c-edp1.html

  * igt@kms_flip@plain-flip-fb-recreate@a-edp1:
    - shard-skl:          [PASS][60] -> [FAIL][61] ([i915#2122])
   [60]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10615/shard-skl7/igt@kms_flip@plain-flip-fb-recreate@a-edp1.html
   [61]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21102/shard-skl8/igt@kms_flip@plain-flip-fb-recreate@a-edp1.html

  * igt@kms_flip_scaled_crc@flip-32bpp-ytile-to-32bpp-ytileccs:
    - shard-tglb:         NOTRUN -> [SKIP][62] ([i915#2587])
   [62]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21102/shard-tglb8/igt@kms_flip_scaled_crc@flip-32bpp-ytile-to-32bpp-ytileccs.html

  * igt@kms_flip_scaled_crc@flip-64bpp-ytile-to-16bpp-ytile:
    - shard-iclb:         [PASS][63] -> [SKIP][64] ([i915#3701])
   [63]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10615/shard-iclb3/igt@kms_flip_scaled_crc@flip-64bpp-ytile-to-16bpp-ytile.html
   [64]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21102/shard-iclb2/igt@kms_flip_scaled_crc@flip-64bpp-ytile-to-16bpp-ytile.html

  * igt@kms_flip_scaled_crc@flip-64bpp-ytile-to-32bpp-ytilercccs:
    - shard-apl:          NOTRUN -> [SKIP][65] ([fdo#109271] / [i915#2672])
   [65]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21102/shard-apl7/igt@kms_flip_scaled_crc@flip-64bpp-ytile-to-32bpp-ytilercccs.html

  * igt@kms_frontbuffer_tracking@fbc-2p-primscrn-shrfb-pgflip-blt:
    - shard-iclb:         NOTRUN -> [SKIP][66] ([fdo#109280])
   [66]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21102/shard-iclb3/igt@kms_frontbuffer_tracking@fbc-2p-primscrn-shrfb-pgflip-blt.html

  * igt@kms_frontbuffer_tracking@fbc-suspend:
    - shard-kbl:          [PASS][67] -> [DMESG-WARN][68] ([i915#180]) +5 similar issues
   [67]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10615/shard-kbl2/igt@kms_frontbuffer_tracking@fbc-suspend.html
   [68]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21102/shard-kbl3/igt@kms_frontbuffer_tracking@fbc-suspend.html

  * igt@kms_frontbuffer_tracking@psr-2p-scndscrn-pri-indfb-draw-blt:
    - shard-tglb:         NOTRUN -> [SKIP][69] ([fdo#111825]) +5 similar issues
   [69]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21102/shard-tglb2/igt@kms_frontbuffer_tracking@psr-2p-scndscrn-pri-indfb-draw-blt.html

  * igt@kms_hdr@bpc-switch-dpms:
    - shard-skl:          [PASS][70] -> [FAIL][71] ([i915#1188])
   [70]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10615/shard-skl2/igt@kms_hdr@bpc-switch-dpms.html
   [71]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21102/shard-skl9/igt@kms_hdr@bpc-switch-dpms.html

  * igt@kms_pipe_crc_basic@compare-crc-sanitycheck-pipe-d:
    - shard-apl:          NOTRUN -> [SKIP][72] ([fdo#109271] / [i915#533]) +2 similar issues
   [72]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21102/shard-apl7/igt@kms_pipe_crc_basic@compare-crc-sanitycheck-pipe-d.html

  * igt@kms_pipe_crc_basic@disable-crc-after-crtc-pipe-d:
    - shard-kbl:          NOTRUN -> [SKIP][73] ([fdo#109271] / [i915#533])
   [73]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21102/shard-kbl3/igt@kms_pipe_crc_basic@disable-crc-after-crtc-pipe-d.html

  * igt@kms_plane_alpha_blend@pipe-a-alpha-basic:
    - shard-apl:          NOTRUN -> [FAIL][74] ([fdo#108145] / [i915#265]) +2 similar issues
   [74]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21102/shard-apl8/igt@kms_plane_alpha_blend@pipe-a-alpha-basic.html

  * igt@kms_plane_alpha_blend@pipe-a-alpha-transparent-fb:
    - shard-apl:          NOTRUN -> [FAIL][75] ([i915#265])
   [75]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21102/shard-apl2/igt@kms_plane_alpha_blend@pipe-a-alpha-transparent-fb.html

  * igt@kms_plane_alpha_blend@pipe-c-alpha-opaque-fb:
    - shard-kbl:          NOTRUN -> [FAIL][76] ([fdo#108145] / [i915#265]) +1 similar issue
   [76]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21102/shard-kbl6/igt@kms_plane_alpha_blend@pipe-c-alpha-opaque-fb.html

  * igt@kms_prime@basic-crc@first-to-second:
    - shard-tglb:         NOTRUN -> [SKIP][77] ([i915#1836])
   [77]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21102/shard-tglb3/igt@kms_prime@basic-crc@first-to-second.html

  * igt@kms_psr2_sf@overlay-plane-update-sf-dmg-area-2:
    - shard-apl:          NOTRUN -> [SKIP][78] ([fdo#109271] / [i915#658]) +2 similar issues
   [78]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21102/shard-apl8/igt@kms_psr2_sf@overlay-plane-update-sf-dmg-area-2.html

  * igt@kms_psr2_sf@overlay-primary-update-sf-dmg-area-5:
    - shard-kbl:          NOTRUN -> [SKIP][79] ([fdo#109271] / [i915#658]) +3 similar issues
   [79]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21102/shard-kbl2/igt@kms_psr2_sf@overlay-primary-update-sf-dmg-area-5.html

  * igt@kms_psr@psr2_cursor_render:
    - shard-iclb:         NOTRUN -> [SKIP][80] ([fdo#109441])
   [80]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21102/shard-iclb3/igt@kms_psr@psr2_cursor_render.html

  * igt@kms_vblank@pipe-d-query-forked-hang:
    - shard-snb:          NOTRUN -> [SKIP][81] ([fdo#109271]) +417 similar issues
   [81]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21102/shard-snb7/igt@kms_vblank@pipe-d-query-forked-hang.html

  * igt@kms_writeback@writeback-check-output:
    - shard-kbl:          NOTRUN -> [SKIP][82] ([fdo#109271] / [i915#2437])
   [82]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21102/shard-kbl3/igt@kms_writeback@writeback-check-output.html

  * igt@prime_nv_test@nv_write_i915_gtt_mmap_read:
    - shard-tglb:         NOTRUN -> [SKIP][83] ([fdo#109291]) +2 similar issues
   [83]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21102/shard-tglb3/igt@prime_nv_test@nv_write_i915_gtt_mmap_read.html

  * igt@sysfs_clients@create:
    - shard-kbl:          NOTRUN -> [SKIP][84] ([fdo#109271] / [i915#2994]) +1 similar issue
   [84]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21102/shard-kbl6/igt@sysfs_clients@create.html

  * igt@sysfs_clients@split-10:
    - shard-apl:          NOTRUN -> [SKIP][85] ([fdo#109271] / [i915#2994]) +1 similar issue
   [85]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21102/shard-apl7/igt@sysfs_clients@split-10.html

  
#### Possible fixes ####

  * igt@gem_eio@in-flight-contexts-10ms:
    - shard-skl:          [TIMEOUT][86] ([i915#3063]) -> [PASS][87]
   [86]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10615/shard-skl8/igt@gem_eio@in-flight-contexts-10ms.html
   [87]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21102/shard-skl8/igt@gem_eio@in-flight-contexts-10ms.html

  * igt@gem_exec_fair@basic-none-rrul@rcs0:
    - shard-glk:          [FAIL][88] ([i915#2842]) -> [PASS][89]
   [88]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10615/shard-glk7/igt@gem_exec_fair@basic-none-rrul@rcs0.html
   [89]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21102/shard-glk5/igt@gem_exec_fair@basic-none-rrul@rcs0.html

  * igt@kms_cursor_crc@pipe-a-cursor-suspend:
    - shard-kbl:          [DMESG-WARN][90] ([i915#180]) -> [PASS][91] +3 similar issues
   [90]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10615/shard-kbl4/igt@kms_cursor_crc@pipe-a-cursor-suspend.html
   [91]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21102/shard-kbl2/igt@kms_cursor_crc@pipe-a-cursor-suspend.html

  * igt@kms_cursor_crc@pipe-b-cursor-128x128-rapid-movement:
    - shard-snb:          [SKIP][92] ([fdo#109271]) -> [PASS][93] +2 similar issues
   [92]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10615/shard-snb2/igt@kms_cursor_crc@pipe-b-cursor-128x128-rapid-movement.html
   [93]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21102/shard-snb6/igt@kms_cursor_crc@pipe-b-cursor-128x128-rapid-movement.html

  * igt@kms_cursor_crc@pipe-c-cursor-128x42-onscreen:
    - shard-glk:          [FAIL][94] ([i915#1888] / [i915#3444]) -> [PASS][95]
   [94]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10615/shard-glk2/igt@kms_cursor_crc@pipe-c-cursor-128x42-onscreen.html
   [95]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21102/shard-glk6/igt@kms_cursor_crc@pipe-c-cursor-128x42-onscreen.html

  * igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions:
    - shard-skl:          [FAIL][96] ([i915#2346]) -> [PASS][97]
   [96]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10615/shard-skl1/igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions.html
   [97]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21102/shard-skl4/igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions.html

  * igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions-varying-size:
    - shard-skl:          [FAIL][98] ([i915#2346] / [i915#533]) -> [PASS][99]
   [98]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10615/shard-skl3/igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions-varying-size.html
   [99]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21102/shard-skl10/igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions-varying-size.html

  * igt@kms_fbcon_fbt@psr-suspend:
    - shard-tglb:         [INCOMPLETE][100] ([i915#2411] / [i915#4173] / [i915#456]) -> [PASS][101]
   [100]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10615/shard-tglb7/igt@kms_fbcon_fbt@psr-suspend.html
   [101]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21102/shard-tglb3/igt@kms_fbcon_fbt@psr-suspend.html

  * igt@kms_flip@flip-vs-expired-vblank-interruptible@a-hdmi-a2:
    - shard-glk:          [FAIL][102] ([i915#79]) -> [PASS][103]
   [102]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10615/shard-glk5/igt@kms_flip@flip-vs-expired-vblank-interruptible@a-hdmi-a2.html
   [103]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21102/shard-glk6/igt@kms_flip@flip-vs-expired-vblank-interruptible@a-hdmi-a2.html

  * igt@kms_flip@plain-flip-fb-recreate-interruptible@c-edp1:
    - shard-skl:          [FAIL][104] ([i915#2122]) -> [PASS][105]
   [104]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10615/shard-skl2/igt@kms_flip@plain-flip-fb-recreate-interruptible@c-edp1.html
   [105]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21102/shard-skl9/igt@kms_flip@plain-flip-fb-recreate-interruptible@c-edp1.html

  * igt@kms_frontbuffer_tracking@fbc-1p-offscren-pri-indfb-draw-mmap-wc:
    - shard-glk:          [FAIL][106] ([i915#1888] / [i915#2546]) -> [PASS][107]
   [106]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10615/shard-glk2/igt@kms_frontbuffer_tracking@fbc-1p-offscren-pri-indfb-draw-mmap-wc.html
   [107]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21102/shard-glk6/igt@kms_frontbuffer_tracking@fbc-1p-offscren-pri-indfb-draw-mmap-wc.html

  * igt@kms_plane_alpha_blend@pipe-a-constant-alpha-min:
    - shard-skl:          [FAIL][108] ([fdo#108145] / [i915#265]) -> [PASS][109]
   [108]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10615/shard-skl10/igt@kms_plane_alpha_blend@pipe-a-constant-alpha-min.html
   [109]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21102/shard-skl5/igt@kms_plane_alpha_blend@pipe-a-constant-alpha-min.html

  * igt@kms_plane_alpha_blend@pipe-b-alpha-7efc:
    - shard-glk:          [FAIL][110] ([fdo#108145] / [i915#265]) -> [PASS][111]
   [110]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10615/shard-glk2/igt@kms_plane_alpha_blend@pipe-b-alpha-7efc.html
   [111]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21102/shard-glk6/igt@kms_plane_alpha_blend@pipe-b-alpha-7efc.html

  * igt@kms_plane_cursor@pipe-b-primary-size-64:
    - shard-glk:          [FAIL][112] -> [PASS][113]
   [112]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10615/shard-glk2/igt@kms_plane_cursor@pipe-b-primary-size-64.html
   [113]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21102/shard-glk6/igt@kms_plane_cursor@pipe-b-primary-size-64.html

  * igt@kms_psr@psr2_basic:
    - shard-iclb:         [SKIP][114] ([fdo#109441]) -> [PASS][115]
   [114]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10615/shard-iclb6/igt@kms_psr@psr2_basic.html
   [115]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21102/shard-iclb2/igt@kms_psr@psr2_basic.html

  * igt@perf@stress-open-close:
    - shard-tglb:         [INCOMPLETE][116] ([i915#2369]) -> [PASS][117]
   [116]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10615/shard-tglb8/igt@perf@stress-open-close.html
   [117]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21102/shard-tglb2/igt@perf@stress-open-close.html

  
#### Warnings ####

  * igt@i915_pm_rc6_residency@rc6-fence:
    - shard-iclb:         [WARN][118] ([i915#1804] / [i915#2684]) -> [WARN][119] ([i915#2684])
   [118]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10615/shard-iclb4/igt@i915_pm_rc6_residency@rc6-fence.html
   [119]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21102/shard-iclb8/igt@i915_pm_rc6_residency@rc6-fence.html

  * igt@kms_psr2_sf@primary-plane-update-sf-dmg-area-1:
    - shard-iclb:         [SKIP][120] ([i915#658]) -> [SKIP][121] ([i915#2920]) +2 similar issues
   [120]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10615/shard-iclb3/igt@kms_psr2_sf@primary-plane-update-sf-dmg-area-1.html
   [121]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21102/shard-iclb2/igt@kms_psr2_sf@primary-plane-update-sf-dmg-area-1.html

  * igt@runner@aborted:
    - shard-kbl:          ([FAIL][122], [FAIL][123], [FAIL][124], [FAIL][125], [FAIL][126], [FAIL][127], [FAIL][128], [FAIL][129], [FAIL][130], [FAIL][131], [FAIL][132]) ([i915#1436] / [i915#180] / [i915#1814] / [i915#3002] / [i915#3363] / [i915#602]) -> ([FAIL][133], [FAIL][134], [FAIL][135], [FAIL][136], [FAIL][137], [FAIL][138], [FAIL][139], [FAIL][140], [FAIL][141], [FAIL][142]) ([fdo#109271] / [i915#1436] / [i915#180] / [i915#1814] / [i915#3002] / [i915#3363] / [i915#602])
   [122]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10615/shard-kbl6/igt@runner@aborted.html
   [123]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10615/shard-kbl3/igt@runner@aborted.html
   [124]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10615/shard-kbl4/igt@runner@aborted.html
   [125]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10615/shard-kbl7/igt@runner@aborted.html
   [126]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10615/shard-kbl1/igt@runner@aborted.html
   [127]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10615/shard-kbl6/igt@runner@aborted.html
   [128]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10615/shard-kbl1/igt@runner@aborted.html
   [129]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10615/shard-kbl1/igt@runner@aborted.html
   [130]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10615/shard-kbl7/igt@runner@aborted.html
   [131]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10615/shard-kbl3/igt@runner@aborted.html
   [132]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10615/shard-kbl1/igt@runner@aborted.html
   [133]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21102/shard-kbl6/igt@runner@aborted.html
   [134]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21102/shard-kbl4/igt@runner@aborted.html
   [135]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21102/shard-kbl3/igt@runner@aborted.html
   [136]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21102/shard-kbl4/igt@runner@aborted.html
   [137]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21102/shard-kbl4/igt@runner@aborted.html
   [138]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21102/shard-kbl6/igt@runner@aborted.html
   [139]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21102/shard-kbl6/igt@runner@aborted.html
   [140]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21102/shard-kbl1/igt@runner@aborted.html
   [141]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21102/shard-kbl1/igt@runner@aborted.html
   [142]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21102/shard-kbl1/igt@runner@aborted.html
    - shard-apl:          ([FAIL][143], [FAIL][144], [FAIL][145], [FAIL][146]) ([i915#180] / [i915#2426] / [i915#3002] / [i915#3363]) -> ([FAIL][147], [FAIL][148], [FAIL][149]) ([i915#180] / [i915#3002] / [i915#3363])
   [143]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10615/shard-apl6/igt@runner@aborted.html
   [144]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10615/shard-apl1/igt@runner@aborted.html
   [145]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10615/shard-apl6/igt@runner@aborted.html
   [146]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10615/shard-apl1/igt@runner@aborted.html
   [147]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21102/sh

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21102/index.html

[-- Attachment #2: Type: text/html, Size: 33755 bytes --]

^ permalink raw reply	[flat|nested] 72+ messages in thread

* Re: [Intel-gfx] [PATCH 01/13] drm/i915/tc: Fix TypeC port init/resume time sanitization
  2021-09-21  0:23 ` [Intel-gfx] [PATCH 01/13] drm/i915/tc: Fix TypeC port init/resume time sanitization Imre Deak
@ 2021-09-23 23:10   ` Souza, Jose
  2021-09-24 10:59     ` Jani Nikula
  2021-09-29 13:28   ` [Intel-gfx] [PATCH v2 " Imre Deak
  1 sibling, 1 reply; 72+ messages in thread
From: Souza, Jose @ 2021-09-23 23:10 UTC (permalink / raw)
  To: intel-gfx, Deak, Imre; +Cc: ville.syrjala

On Tue, 2021-09-21 at 03:23 +0300, Imre Deak wrote:
> Atm during driver loading and system resume TypeC ports are accessed
> before their HW/SW state is synced. Move the TypeC port sanitization to
> the encoder's sync_state hook to fix this.
> 
> Fixes: f9e76a6e68d3 ("drm/i915: Add an encoder hook to sanitize its state during init/resume")
> Cc: José Roberto de Souza <jose.souza@intel.com>
> Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
> Signed-off-by: Imre Deak <imre.deak@intel.com>
> ---
>  drivers/gpu/drm/i915/display/intel_ddi.c     |  8 +++++++-
>  drivers/gpu/drm/i915/display/intel_display.c | 20 +++++---------------
>  2 files changed, 12 insertions(+), 16 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c b/drivers/gpu/drm/i915/display/intel_ddi.c
> index bba0ab99836b1..c4ed4675f5791 100644
> --- a/drivers/gpu/drm/i915/display/intel_ddi.c
> +++ b/drivers/gpu/drm/i915/display/intel_ddi.c
> @@ -3840,7 +3840,13 @@ void hsw_ddi_get_config(struct intel_encoder *encoder,
>  static void intel_ddi_sync_state(struct intel_encoder *encoder,
>  				 const struct intel_crtc_state *crtc_state)
>  {
> -	if (intel_crtc_has_dp_encoder(crtc_state))
> +	struct drm_i915_private *i915 = to_i915(encoder->base.dev);
> +	enum phy phy = intel_port_to_phy(i915, encoder->port);
> +
> +	if (intel_phy_is_tc(i915, phy))
> +		intel_tc_port_sanitize(enc_to_dig_port(encoder));

Okay at this point we will not have any mst encoder, so the check is not needed.

> +
> +	if (crtc_state && intel_crtc_has_dp_encoder(crtc_state))
>  		intel_dp_sync_state(encoder, crtc_state);
>  }
>  
> diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
> index f6c0c595f6313..8547842935389 100644
> --- a/drivers/gpu/drm/i915/display/intel_display.c
> +++ b/drivers/gpu/drm/i915/display/intel_display.c
> @@ -12194,18 +12194,16 @@ static void intel_modeset_readout_hw_state(struct drm_device *dev)
>  	readout_plane_state(dev_priv);
>  
>  	for_each_intel_encoder(dev, encoder) {
> +		struct intel_crtc_state *crtc_state = NULL;
> +
>  		pipe = 0;
>  
>  		if (encoder->get_hw_state(encoder, &pipe)) {
> -			struct intel_crtc_state *crtc_state;
> -
>  			crtc = intel_get_crtc_for_pipe(dev_priv, pipe);
>  			crtc_state = to_intel_crtc_state(crtc->base.state);
>  
>  			encoder->base.crtc = &crtc->base;
>  			intel_encoder_get_config(encoder, crtc_state);
> -			if (encoder->sync_state)
> -				encoder->sync_state(encoder, crtc_state);
>  
>  			/* read out to slave crtc as well for bigjoiner */
>  			if (crtc_state->bigjoiner) {
> @@ -12220,6 +12218,9 @@ static void intel_modeset_readout_hw_state(struct drm_device *dev)
>  			encoder->base.crtc = NULL;
>  		}
>  
> +		if (encoder->sync_state)
> +			encoder->sync_state(encoder, crtc_state);

Call sync_state() with a null crtc_state will cause a crash in gen11_dsi_sync_state().

gen11_dsi_sync_state() is the only user of crtc_state but it only wants to know what is the pipe, maybe to be safer change the argument to enum pipe?

> +
>  		drm_dbg_kms(&dev_priv->drm,
>  			    "[ENCODER:%d:%s] hw state readout: %s, pipe %c\n",
>  			    encoder->base.base.id, encoder->base.name,
> @@ -12502,17 +12503,6 @@ intel_modeset_setup_hw_state(struct drm_device *dev,
>  	intel_modeset_readout_hw_state(dev);
>  
>  	/* HW state is read out, now we need to sanitize this mess. */
> -
> -	/* Sanitize the TypeC port mode upfront, encoders depend on this */
> -	for_each_intel_encoder(dev, encoder) {
> -		enum phy phy = intel_port_to_phy(dev_priv, encoder->port);
> -
> -		/* We need to sanitize only the MST primary port. */
> -		if (encoder->type != INTEL_OUTPUT_DP_MST &&
> -		    intel_phy_is_tc(dev_priv, phy))
> -			intel_tc_port_sanitize(enc_to_dig_port(encoder));
> -	}
> -
>  	get_encoder_power_domains(dev_priv);
>  
>  	if (HAS_PCH_IBX(dev_priv))


^ permalink raw reply	[flat|nested] 72+ messages in thread

* Re: [Intel-gfx] [PATCH 02/13] drm/i915/adlp/tc: Fix PHY connected check for Thunderbolt mode
  2021-09-21  0:23 ` [Intel-gfx] [PATCH 02/13] drm/i915/adlp/tc: Fix PHY connected check for Thunderbolt mode Imre Deak
@ 2021-09-23 23:18   ` Souza, Jose
  2021-09-24 15:24     ` Imre Deak
  0 siblings, 1 reply; 72+ messages in thread
From: Souza, Jose @ 2021-09-23 23:18 UTC (permalink / raw)
  To: intel-gfx, Deak, Imre

On Tue, 2021-09-21 at 03:23 +0300, Imre Deak wrote:
> On ADL-P the PHY ready (aka status complete on other platforms) flag is
> always set, besides when a DP-alt, legacy sink is connected also when a
> TBT sink is connected or nothing is connected. So assume the PHY to be
> connected when both the TBT live status and PHY ready flags are set.
> 
> Cc: José Roberto de Souza <jose.souza@intel.com>
> Signed-off-by: Imre Deak <imre.deak@intel.com>
> ---
>  drivers/gpu/drm/i915/display/intel_tc.c | 4 ++++
>  1 file changed, 4 insertions(+)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_tc.c b/drivers/gpu/drm/i915/display/intel_tc.c
> index 3ffece568ed98..7dc3696085c71 100644
> --- a/drivers/gpu/drm/i915/display/intel_tc.c
> +++ b/drivers/gpu/drm/i915/display/intel_tc.c
> @@ -509,6 +509,10 @@ static bool icl_tc_phy_is_connected(struct intel_digital_port *dig_port)
>  		return dig_port->tc_mode == TC_PORT_TBT_ALT;
>  	}
>  
> +	/* On ADL-P the PHY complete flag is set in TBT mode as well. */
> +	if (IS_ALDERLAKE_P(i915) && dig_port->tc_mode == TC_PORT_TBT_ALT)
> +		return true;

I don't have hardware to test(My adl-p do not have TC ports enabled) but if phy complete/ready is set in TBT mode, this change makes sense.

Reviewed-by: José Roberto de Souza <jose.souza@intel.com>

> +
>  	if (!tc_phy_is_owned(dig_port)) {
>  		drm_dbg_kms(&i915->drm, "Port %s: PHY not owned\n",
>  			    dig_port->tc_port_name);


^ permalink raw reply	[flat|nested] 72+ messages in thread

* Re: [Intel-gfx] [PATCH 03/13] drm/i915/tc: Remove waiting for PHY complete during releasing ownership
  2021-09-21  0:23 ` [Intel-gfx] [PATCH 03/13] drm/i915/tc: Remove waiting for PHY complete during releasing ownership Imre Deak
@ 2021-09-24  0:17   ` Souza, Jose
  0 siblings, 0 replies; 72+ messages in thread
From: Souza, Jose @ 2021-09-24  0:17 UTC (permalink / raw)
  To: intel-gfx, Deak, Imre

On Tue, 2021-09-21 at 03:23 +0300, Imre Deak wrote:
> Waiting for the PHY complete flag to clear when releasing the PHY
> ownership was add in
> 
> commit ddec362724f9 ("drm/i915: Wait for TypeC PHY complete flag to clear in safe mode")
> 
> This isn't required by the spec, the vague idea was to make the
> handshake with the firmware more robust, without actual evidence for
> when it would be needed. Checking this again, the flag doesn't clear on
> ICL until after the PHY's PLL is disabled and the flag is permanently
> set on ADL-P. To avoid the spurious timeout messages in dmesg, just
> remove this wait.

Reviewed-by: José Roberto de Souza <jose.souza@intel.com>

> 
> Cc: José Roberto de Souza <jose.souza@intel.com>
> Signed-off-by: Imre Deak <imre.deak@intel.com>
> ---
>  drivers/gpu/drm/i915/display/intel_tc.c | 5 -----
>  1 file changed, 5 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_tc.c b/drivers/gpu/drm/i915/display/intel_tc.c
> index 7dc3696085c71..0d3555437b0b1 100644
> --- a/drivers/gpu/drm/i915/display/intel_tc.c
> +++ b/drivers/gpu/drm/i915/display/intel_tc.c
> @@ -339,11 +339,6 @@ static bool icl_tc_phy_take_ownership(struct intel_digital_port *dig_port,
>  	intel_uncore_write(uncore,
>  			   PORT_TX_DFLEXDPCSSS(dig_port->tc_phy_fia), val);
>  
> -	if (!take && wait_for(!tc_phy_status_complete(dig_port), 10))
> -		drm_dbg_kms(&i915->drm,
> -			    "Port %s: PHY complete clear timed out\n",
> -			    dig_port->tc_port_name);
> -
>  	return true;
>  }
>  


^ permalink raw reply	[flat|nested] 72+ messages in thread

* Re: [Intel-gfx] [PATCH 04/13] drm/i915/tc: Check for DP-alt, legacy sinks before taking PHY ownership
  2021-09-21  0:23 ` [Intel-gfx] [PATCH 04/13] drm/i915/tc: Check for DP-alt, legacy sinks before taking PHY ownership Imre Deak
@ 2021-09-24  0:30   ` Souza, Jose
  2021-09-24 15:31     ` Imre Deak
  2021-09-29 13:28   ` [Intel-gfx] [PATCH v2 " Imre Deak
  1 sibling, 1 reply; 72+ messages in thread
From: Souza, Jose @ 2021-09-24  0:30 UTC (permalink / raw)
  To: intel-gfx, Deak, Imre

On Tue, 2021-09-21 at 03:23 +0300, Imre Deak wrote:
> On ADL-P the PHY ready/complete flag is always set even in TBT-alt mode.
> To avoid taking the PHY ownership and the following spurious "PHY sudden
> disconnect" messages on this platform when connecting the PHY in TBT
> mode, check if there is any DP-alt or legacy sink connected before
> taking the ownership.
> 
> Cc: José Roberto de Souza <jose.souza@intel.com>
> Signed-off-by: Imre Deak <imre.deak@intel.com>
> ---
>  drivers/gpu/drm/i915/display/intel_tc.c | 7 +++++++
>  1 file changed, 7 insertions(+)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_tc.c b/drivers/gpu/drm/i915/display/intel_tc.c
> index 0d3555437b0b1..1f76c11d70834 100644
> --- a/drivers/gpu/drm/i915/display/intel_tc.c
> +++ b/drivers/gpu/drm/i915/display/intel_tc.c
> @@ -432,6 +432,13 @@ static void icl_tc_phy_connect(struct intel_digital_port *dig_port,
>  		goto out_set_tbt_alt_mode;
>  	}
>  
> +	if (!(tc_port_live_status_mask(dig_port) &
> +	      (BIT(TC_PORT_DP_ALT) | BIT(TC_PORT_LEGACY)))) {
> +		drm_dbg_kms(&i915->drm, "Port %s: nothing is connected\n",
> +			    dig_port->tc_port_name);

Misleading log, it could have actual TBT connected and it would print nothing is connected.

Could you also add a comment in tc_phy_status_complete() about the TBT behavior on adl-p?

Fixing the above:
Reviewed-by: José Roberto de Souza <jose.souza@intel.com>

> +		goto out_set_tbt_alt_mode;
> +	}
> +
>  	if (!tc_phy_take_ownership(dig_port, true) &&
>  	    !drm_WARN_ON(&i915->drm, dig_port->tc_legacy_port))
>  		goto out_set_tbt_alt_mode;


^ permalink raw reply	[flat|nested] 72+ messages in thread

* Re: [Intel-gfx] [PATCH 01/13] drm/i915/tc: Fix TypeC port init/resume time sanitization
  2021-09-23 23:10   ` Souza, Jose
@ 2021-09-24 10:59     ` Jani Nikula
  2021-09-24 11:06       ` Imre Deak
  0 siblings, 1 reply; 72+ messages in thread
From: Jani Nikula @ 2021-09-24 10:59 UTC (permalink / raw)
  To: Souza, Jose, intel-gfx, Deak, Imre; +Cc: ville.syrjala

On Thu, 23 Sep 2021, "Souza, Jose" <jose.souza@intel.com> wrote:
> On Tue, 2021-09-21 at 03:23 +0300, Imre Deak wrote:
>> Atm during driver loading and system resume TypeC ports are accessed
>> before their HW/SW state is synced. Move the TypeC port sanitization to
>> the encoder's sync_state hook to fix this.
>> 
>> Fixes: f9e76a6e68d3 ("drm/i915: Add an encoder hook to sanitize its state during init/resume")
>> Cc: José Roberto de Souza <jose.souza@intel.com>
>> Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
>> Signed-off-by: Imre Deak <imre.deak@intel.com>
>> ---
>>  drivers/gpu/drm/i915/display/intel_ddi.c     |  8 +++++++-
>>  drivers/gpu/drm/i915/display/intel_display.c | 20 +++++---------------
>>  2 files changed, 12 insertions(+), 16 deletions(-)
>> 
>> diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c b/drivers/gpu/drm/i915/display/intel_ddi.c
>> index bba0ab99836b1..c4ed4675f5791 100644
>> --- a/drivers/gpu/drm/i915/display/intel_ddi.c
>> +++ b/drivers/gpu/drm/i915/display/intel_ddi.c
>> @@ -3840,7 +3840,13 @@ void hsw_ddi_get_config(struct intel_encoder *encoder,
>>  static void intel_ddi_sync_state(struct intel_encoder *encoder,
>>  				 const struct intel_crtc_state *crtc_state)
>>  {
>> -	if (intel_crtc_has_dp_encoder(crtc_state))
>> +	struct drm_i915_private *i915 = to_i915(encoder->base.dev);
>> +	enum phy phy = intel_port_to_phy(i915, encoder->port);
>> +
>> +	if (intel_phy_is_tc(i915, phy))
>> +		intel_tc_port_sanitize(enc_to_dig_port(encoder));
>
> Okay at this point we will not have any mst encoder, so the check is not needed.
>
>> +
>> +	if (crtc_state && intel_crtc_has_dp_encoder(crtc_state))
>>  		intel_dp_sync_state(encoder, crtc_state);
>>  }
>>  
>> diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
>> index f6c0c595f6313..8547842935389 100644
>> --- a/drivers/gpu/drm/i915/display/intel_display.c
>> +++ b/drivers/gpu/drm/i915/display/intel_display.c
>> @@ -12194,18 +12194,16 @@ static void intel_modeset_readout_hw_state(struct drm_device *dev)
>>  	readout_plane_state(dev_priv);
>>  
>>  	for_each_intel_encoder(dev, encoder) {
>> +		struct intel_crtc_state *crtc_state = NULL;
>> +
>>  		pipe = 0;
>>  
>>  		if (encoder->get_hw_state(encoder, &pipe)) {
>> -			struct intel_crtc_state *crtc_state;
>> -
>>  			crtc = intel_get_crtc_for_pipe(dev_priv, pipe);
>>  			crtc_state = to_intel_crtc_state(crtc->base.state);
>>  
>>  			encoder->base.crtc = &crtc->base;
>>  			intel_encoder_get_config(encoder, crtc_state);
>> -			if (encoder->sync_state)
>> -				encoder->sync_state(encoder, crtc_state);
>>  
>>  			/* read out to slave crtc as well for bigjoiner */
>>  			if (crtc_state->bigjoiner) {
>> @@ -12220,6 +12218,9 @@ static void intel_modeset_readout_hw_state(struct drm_device *dev)
>>  			encoder->base.crtc = NULL;
>>  		}
>>  
>> +		if (encoder->sync_state)
>> +			encoder->sync_state(encoder, crtc_state);
>
> Call sync_state() with a null crtc_state will cause a crash in gen11_dsi_sync_state().
>
> gen11_dsi_sync_state() is the only user of crtc_state but it only wants to know what is the pipe, maybe to be safer change the argument to enum pipe?

How would intel_ddi_sync_state() know when to call and not call
intel_dp_sync_state() then? If the encoder's disabled, you shouldn't do
that. That's the distinction NULL crtc_state gives (and obviously needs
to be taken into account).

BR,
Jani.


>
>> +
>>  		drm_dbg_kms(&dev_priv->drm,
>>  			    "[ENCODER:%d:%s] hw state readout: %s, pipe %c\n",
>>  			    encoder->base.base.id, encoder->base.name,
>> @@ -12502,17 +12503,6 @@ intel_modeset_setup_hw_state(struct drm_device *dev,
>>  	intel_modeset_readout_hw_state(dev);
>>  
>>  	/* HW state is read out, now we need to sanitize this mess. */
>> -
>> -	/* Sanitize the TypeC port mode upfront, encoders depend on this */
>> -	for_each_intel_encoder(dev, encoder) {
>> -		enum phy phy = intel_port_to_phy(dev_priv, encoder->port);
>> -
>> -		/* We need to sanitize only the MST primary port. */
>> -		if (encoder->type != INTEL_OUTPUT_DP_MST &&
>> -		    intel_phy_is_tc(dev_priv, phy))
>> -			intel_tc_port_sanitize(enc_to_dig_port(encoder));
>> -	}
>> -
>>  	get_encoder_power_domains(dev_priv);
>>  
>>  	if (HAS_PCH_IBX(dev_priv))
>

-- 
Jani Nikula, Intel Open Source Graphics Center

^ permalink raw reply	[flat|nested] 72+ messages in thread

* Re: [Intel-gfx] [PATCH 01/13] drm/i915/tc: Fix TypeC port init/resume time sanitization
  2021-09-24 10:59     ` Jani Nikula
@ 2021-09-24 11:06       ` Imre Deak
  0 siblings, 0 replies; 72+ messages in thread
From: Imre Deak @ 2021-09-24 11:06 UTC (permalink / raw)
  To: Jani Nikula, Jose Souza; +Cc: intel-gfx, ville.syrjala

On Fri, Sep 24, 2021 at 01:59:35PM +0300, Jani Nikula wrote:
> On Thu, 23 Sep 2021, "Souza, Jose" <jose.souza@intel.com> wrote:
> > On Tue, 2021-09-21 at 03:23 +0300, Imre Deak wrote:
> >> Atm during driver loading and system resume TypeC ports are accessed
> >> before their HW/SW state is synced. Move the TypeC port sanitization to
> >> the encoder's sync_state hook to fix this.
> >> 
> >> Fixes: f9e76a6e68d3 ("drm/i915: Add an encoder hook to sanitize its state during init/resume")
> >> Cc: José Roberto de Souza <jose.souza@intel.com>
> >> Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
> >> Signed-off-by: Imre Deak <imre.deak@intel.com>
> >> ---
> >>  drivers/gpu/drm/i915/display/intel_ddi.c     |  8 +++++++-
> >>  drivers/gpu/drm/i915/display/intel_display.c | 20 +++++---------------
> >>  2 files changed, 12 insertions(+), 16 deletions(-)
> >> 
> >> diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c b/drivers/gpu/drm/i915/display/intel_ddi.c
> >> index bba0ab99836b1..c4ed4675f5791 100644
> >> --- a/drivers/gpu/drm/i915/display/intel_ddi.c
> >> +++ b/drivers/gpu/drm/i915/display/intel_ddi.c
> >> @@ -3840,7 +3840,13 @@ void hsw_ddi_get_config(struct intel_encoder *encoder,
> >>  static void intel_ddi_sync_state(struct intel_encoder *encoder,
> >>  				 const struct intel_crtc_state *crtc_state)
> >>  {
> >> -	if (intel_crtc_has_dp_encoder(crtc_state))
> >> +	struct drm_i915_private *i915 = to_i915(encoder->base.dev);
> >> +	enum phy phy = intel_port_to_phy(i915, encoder->port);
> >> +
> >> +	if (intel_phy_is_tc(i915, phy))
> >> +		intel_tc_port_sanitize(enc_to_dig_port(encoder));
> >
> > Okay at this point we will not have any mst encoder, so the check is not needed.
> >
> >> +
> >> +	if (crtc_state && intel_crtc_has_dp_encoder(crtc_state))
> >>  		intel_dp_sync_state(encoder, crtc_state);
> >>  }
> >>  
> >> diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
> >> index f6c0c595f6313..8547842935389 100644
> >> --- a/drivers/gpu/drm/i915/display/intel_display.c
> >> +++ b/drivers/gpu/drm/i915/display/intel_display.c
> >> @@ -12194,18 +12194,16 @@ static void intel_modeset_readout_hw_state(struct drm_device *dev)
> >>  	readout_plane_state(dev_priv);
> >>  
> >>  	for_each_intel_encoder(dev, encoder) {
> >> +		struct intel_crtc_state *crtc_state = NULL;
> >> +
> >>  		pipe = 0;
> >>  
> >>  		if (encoder->get_hw_state(encoder, &pipe)) {
> >> -			struct intel_crtc_state *crtc_state;
> >> -
> >>  			crtc = intel_get_crtc_for_pipe(dev_priv, pipe);
> >>  			crtc_state = to_intel_crtc_state(crtc->base.state);
> >>  
> >>  			encoder->base.crtc = &crtc->base;
> >>  			intel_encoder_get_config(encoder, crtc_state);
> >> -			if (encoder->sync_state)
> >> -				encoder->sync_state(encoder, crtc_state);
> >>  
> >>  			/* read out to slave crtc as well for bigjoiner */
> >>  			if (crtc_state->bigjoiner) {
> >> @@ -12220,6 +12218,9 @@ static void intel_modeset_readout_hw_state(struct drm_device *dev)
> >>  			encoder->base.crtc = NULL;
> >>  		}
> >>  
> >> +		if (encoder->sync_state)
> >> +			encoder->sync_state(encoder, crtc_state);
> >
> > Call sync_state() with a null crtc_state will cause a crash in gen11_dsi_sync_state().

Yes, thanks for catching that.

> >
> > gen11_dsi_sync_state() is the only user of crtc_state but it only wants to know what is the pipe, maybe to be safer change the argument to enum pipe?
> 
> How would intel_ddi_sync_state() know when to call and not call
> intel_dp_sync_state() then? If the encoder's disabled, you shouldn't do
> that. That's the distinction NULL crtc_state gives (and obviously needs
> to be taken into account).

Yes, missed gen11_dsi_sync_state(), it should have the crtc_state != NULL check I added to
intel_ddi_sync_state().

> BR,
> Jani.
> 
> 
> >
> >> +
> >>  		drm_dbg_kms(&dev_priv->drm,
> >>  			    "[ENCODER:%d:%s] hw state readout: %s, pipe %c\n",
> >>  			    encoder->base.base.id, encoder->base.name,
> >> @@ -12502,17 +12503,6 @@ intel_modeset_setup_hw_state(struct drm_device *dev,
> >>  	intel_modeset_readout_hw_state(dev);
> >>  
> >>  	/* HW state is read out, now we need to sanitize this mess. */
> >> -
> >> -	/* Sanitize the TypeC port mode upfront, encoders depend on this */
> >> -	for_each_intel_encoder(dev, encoder) {
> >> -		enum phy phy = intel_port_to_phy(dev_priv, encoder->port);
> >> -
> >> -		/* We need to sanitize only the MST primary port. */
> >> -		if (encoder->type != INTEL_OUTPUT_DP_MST &&
> >> -		    intel_phy_is_tc(dev_priv, phy))
> >> -			intel_tc_port_sanitize(enc_to_dig_port(encoder));
> >> -	}
> >> -
> >>  	get_encoder_power_domains(dev_priv);
> >>  
> >>  	if (HAS_PCH_IBX(dev_priv))
> >
> 
> -- 
> Jani Nikula, Intel Open Source Graphics Center

^ permalink raw reply	[flat|nested] 72+ messages in thread

* Re: [Intel-gfx] [PATCH 02/13] drm/i915/adlp/tc: Fix PHY connected check for Thunderbolt mode
  2021-09-23 23:18   ` Souza, Jose
@ 2021-09-24 15:24     ` Imre Deak
  0 siblings, 0 replies; 72+ messages in thread
From: Imre Deak @ 2021-09-24 15:24 UTC (permalink / raw)
  To: Souza, Jose; +Cc: intel-gfx

On Fri, Sep 24, 2021 at 02:18:30AM +0300, Souza, Jose wrote:
> On Tue, 2021-09-21 at 03:23 +0300, Imre Deak wrote:
> > On ADL-P the PHY ready (aka status complete on other platforms) flag is
> > always set, besides when a DP-alt, legacy sink is connected also when a
> > TBT sink is connected or nothing is connected. So assume the PHY to be
> > connected when both the TBT live status and PHY ready flags are set.
> > 
> > Cc: José Roberto de Souza <jose.souza@intel.com>
> > Signed-off-by: Imre Deak <imre.deak@intel.com>
> > ---
> >  drivers/gpu/drm/i915/display/intel_tc.c | 4 ++++
> >  1 file changed, 4 insertions(+)
> > 
> > diff --git a/drivers/gpu/drm/i915/display/intel_tc.c b/drivers/gpu/drm/i915/display/intel_tc.c
> > index 3ffece568ed98..7dc3696085c71 100644
> > --- a/drivers/gpu/drm/i915/display/intel_tc.c
> > +++ b/drivers/gpu/drm/i915/display/intel_tc.c
> > @@ -509,6 +509,10 @@ static bool icl_tc_phy_is_connected(struct intel_digital_port *dig_port)
> >  		return dig_port->tc_mode == TC_PORT_TBT_ALT;
> >  	}
> >  
> > +	/* On ADL-P the PHY complete flag is set in TBT mode as well. */
> > +	if (IS_ALDERLAKE_P(i915) && dig_port->tc_mode == TC_PORT_TBT_ALT)
> > +		return true;
> 
> I don't have hardware to test(My adl-p do not have TC ports enabled)
> but if phy complete/ready is set in TBT mode, this change makes sense.

The reg description has been updated now, it's a bit clearer. But yes,
that's what I see it's set regardless of something being connected or
not and regardless of what is connected.

> Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
> 
> > +
> >  	if (!tc_phy_is_owned(dig_port)) {
> >  		drm_dbg_kms(&i915->drm, "Port %s: PHY not owned\n",
> >  			    dig_port->tc_port_name);
> 

^ permalink raw reply	[flat|nested] 72+ messages in thread

* Re: [Intel-gfx] [PATCH 04/13] drm/i915/tc: Check for DP-alt, legacy sinks before taking PHY ownership
  2021-09-24  0:30   ` Souza, Jose
@ 2021-09-24 15:31     ` Imre Deak
  0 siblings, 0 replies; 72+ messages in thread
From: Imre Deak @ 2021-09-24 15:31 UTC (permalink / raw)
  To: Souza, Jose; +Cc: intel-gfx

On Fri, Sep 24, 2021 at 03:30:07AM +0300, Souza, Jose wrote:
> On Tue, 2021-09-21 at 03:23 +0300, Imre Deak wrote:
> > On ADL-P the PHY ready/complete flag is always set even in TBT-alt mode.
> > To avoid taking the PHY ownership and the following spurious "PHY sudden
> > disconnect" messages on this platform when connecting the PHY in TBT
> > mode, check if there is any DP-alt or legacy sink connected before
> > taking the ownership.
> > 
> > Cc: José Roberto de Souza <jose.souza@intel.com>
> > Signed-off-by: Imre Deak <imre.deak@intel.com>
> > ---
> >  drivers/gpu/drm/i915/display/intel_tc.c | 7 +++++++
> >  1 file changed, 7 insertions(+)
> > 
> > diff --git a/drivers/gpu/drm/i915/display/intel_tc.c b/drivers/gpu/drm/i915/display/intel_tc.c
> > index 0d3555437b0b1..1f76c11d70834 100644
> > --- a/drivers/gpu/drm/i915/display/intel_tc.c
> > +++ b/drivers/gpu/drm/i915/display/intel_tc.c
> > @@ -432,6 +432,13 @@ static void icl_tc_phy_connect(struct intel_digital_port *dig_port,
> >  		goto out_set_tbt_alt_mode;
> >  	}
> >  
> > +	if (!(tc_port_live_status_mask(dig_port) &
> > +	      (BIT(TC_PORT_DP_ALT) | BIT(TC_PORT_LEGACY)))) {
> > +		drm_dbg_kms(&i915->drm, "Port %s: nothing is connected\n",
> > +			    dig_port->tc_port_name);
> 
> Misleading log, it could have actual TBT connected and it would print
> nothing is connected.

Yes, missed that case. Will change that to print live_status_mask()
instead.

> Could you also add a comment in tc_phy_status_complete() about the TBT
> behavior on adl-p?

It means a different thing than what it means on previous platforms, can
add a note about this. 

> Fixing the above:
> Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
> 
> > +		goto out_set_tbt_alt_mode;
> > +	}
> > +
> >  	if (!tc_phy_take_ownership(dig_port, true) &&
> >  	    !drm_WARN_ON(&i915->drm, dig_port->tc_legacy_port))
> >  		goto out_set_tbt_alt_mode;
> 

^ permalink raw reply	[flat|nested] 72+ messages in thread

* Re: [Intel-gfx] [PATCH 05/13] drm/i915/tc: Add/use helpers to retrieve TypeC port properties
  2021-09-21  0:23 ` [Intel-gfx] [PATCH 05/13] drm/i915/tc: Add/use helpers to retrieve TypeC port properties Imre Deak
@ 2021-09-24 19:54   ` Souza, Jose
  0 siblings, 0 replies; 72+ messages in thread
From: Souza, Jose @ 2021-09-24 19:54 UTC (permalink / raw)
  To: intel-gfx, Deak, Imre

On Tue, 2021-09-21 at 03:23 +0300, Imre Deak wrote:
> Instead of directly accessing the TypeC port internal struct members,
> add/use helpers to retrieve the corresponding properties.
> 
> No functional change.

Reviewed-by: José Roberto de Souza <jose.souza@intel.com>

> 
> Cc: José Roberto de Souza <jose.souza@intel.com>
> Signed-off-by: Imre Deak <imre.deak@intel.com>
> ---
>  drivers/gpu/drm/i915/display/intel_ddi.c      | 31 +++++++------------
>  drivers/gpu/drm/i915/display/intel_display.c  |  6 +---
>  .../drm/i915/display/intel_display_power.c    |  4 +--
>  drivers/gpu/drm/i915/display/intel_dp_aux.c   |  6 +---
>  drivers/gpu/drm/i915/display/intel_dpll_mgr.c |  5 +--
>  drivers/gpu/drm/i915/display/intel_tc.c       | 24 ++++++++++++++
>  drivers/gpu/drm/i915/display/intel_tc.h       |  4 +++
>  7 files changed, 46 insertions(+), 34 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c b/drivers/gpu/drm/i915/display/intel_ddi.c
> index c4ed4675f5791..b9194d6a4dfe7 100644
> --- a/drivers/gpu/drm/i915/display/intel_ddi.c
> +++ b/drivers/gpu/drm/i915/display/intel_ddi.c
> @@ -288,7 +288,7 @@ static void intel_ddi_init_dp_buf_reg(struct intel_encoder *encoder,
>  
>  	if (IS_ALDERLAKE_P(i915) && intel_phy_is_tc(i915, phy)) {
>  		intel_dp->DP |= ddi_buf_phy_link_rate(crtc_state->port_clock);
> -		if (dig_port->tc_mode != TC_PORT_TBT_ALT)
> +		if (!intel_tc_port_in_tbt_alt_mode(dig_port))
>  			intel_dp->DP |= DDI_BUF_CTL_TC_PHY_OWNERSHIP;
>  	}
>  }
> @@ -885,8 +885,7 @@ static void intel_ddi_get_power_domains(struct intel_encoder *encoder,
>  
>  	dig_port = enc_to_dig_port(encoder);
>  
> -	if (!intel_phy_is_tc(dev_priv, phy) ||
> -	    dig_port->tc_mode != TC_PORT_TBT_ALT) {
> +	if (!intel_tc_port_in_tbt_alt_mode(dig_port)) {
>  		drm_WARN_ON(&dev_priv->drm, dig_port->ddi_io_wakeref);
>  		dig_port->ddi_io_wakeref = intel_display_power_get(dev_priv,
>  								   dig_port->ddi_io_power_domain);
> @@ -1180,7 +1179,7 @@ static void icl_mg_phy_ddi_vswing_sequence(struct intel_encoder *encoder,
>  	int n_entries, ln;
>  	u32 val;
>  
> -	if (enc_to_dig_port(encoder)->tc_mode == TC_PORT_TBT_ALT)
> +	if (intel_tc_port_in_tbt_alt_mode(enc_to_dig_port(encoder)))
>  		return;
>  
>  	ddi_translations = encoder->get_buf_trans(encoder, crtc_state, &n_entries);
> @@ -1317,7 +1316,7 @@ tgl_dkl_phy_ddi_vswing_sequence(struct intel_encoder *encoder,
>  	u32 val, dpcnt_mask, dpcnt_val;
>  	int n_entries, ln;
>  
> -	if (enc_to_dig_port(encoder)->tc_mode == TC_PORT_TBT_ALT)
> +	if (intel_tc_port_in_tbt_alt_mode(enc_to_dig_port(encoder)))
>  		return;
>  
>  	ddi_translations = encoder->get_buf_trans(encoder, crtc_state, &n_entries);
> @@ -2084,7 +2083,7 @@ icl_program_mg_dp_mode(struct intel_digital_port *dig_port,
>  	u8 width;
>  
>  	if (!intel_phy_is_tc(dev_priv, phy) ||
> -	    dig_port->tc_mode == TC_PORT_TBT_ALT)
> +	    intel_tc_port_in_tbt_alt_mode(dig_port))
>  		return;
>  
>  	if (DISPLAY_VER(dev_priv) >= 12) {
> @@ -2109,7 +2108,7 @@ icl_program_mg_dp_mode(struct intel_digital_port *dig_port,
>  	switch (pin_assignment) {
>  	case 0x0:
>  		drm_WARN_ON(&dev_priv->drm,
> -			    dig_port->tc_mode != TC_PORT_LEGACY);
> +			    !intel_tc_port_in_legacy_mode(dig_port));
>  		if (width == 1) {
>  			ln1 |= MG_DP_MODE_CFG_DP_X1_MODE;
>  		} else {
> @@ -2354,7 +2353,6 @@ static void dg2_ddi_pre_enable_dp(struct intel_atomic_state *state,
>  {
>  	struct intel_dp *intel_dp = enc_to_intel_dp(encoder);
>  	struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
> -	enum phy phy = intel_port_to_phy(dev_priv, encoder->port);
>  	struct intel_digital_port *dig_port = enc_to_dig_port(encoder);
>  	bool is_mst = intel_crtc_has_type(crtc_state, INTEL_OUTPUT_DP_MST);
>  	int level = intel_ddi_dp_level(intel_dp, crtc_state);
> @@ -2378,8 +2376,7 @@ static void dg2_ddi_pre_enable_dp(struct intel_atomic_state *state,
>  	intel_ddi_enable_clock(encoder, crtc_state);
>  
>  	/* 4. Enable IO power */
> -	if (!intel_phy_is_tc(dev_priv, phy) ||
> -	    dig_port->tc_mode != TC_PORT_TBT_ALT)
> +	if (!intel_tc_port_in_tbt_alt_mode(dig_port))
>  		dig_port->ddi_io_wakeref = intel_display_power_get(dev_priv,
>  								   dig_port->ddi_io_power_domain);
>  
> @@ -2468,7 +2465,6 @@ static void tgl_ddi_pre_enable_dp(struct intel_atomic_state *state,
>  {
>  	struct intel_dp *intel_dp = enc_to_intel_dp(encoder);
>  	struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
> -	enum phy phy = intel_port_to_phy(dev_priv, encoder->port);
>  	struct intel_digital_port *dig_port = enc_to_dig_port(encoder);
>  	bool is_mst = intel_crtc_has_type(crtc_state, INTEL_OUTPUT_DP_MST);
>  	int level = intel_ddi_dp_level(intel_dp, crtc_state);
> @@ -2505,8 +2501,7 @@ static void tgl_ddi_pre_enable_dp(struct intel_atomic_state *state,
>  	intel_ddi_enable_clock(encoder, crtc_state);
>  
>  	/* 5. If IO power is controlled through PWR_WELL_CTL, Enable IO Power */
> -	if (!intel_phy_is_tc(dev_priv, phy) ||
> -	    dig_port->tc_mode != TC_PORT_TBT_ALT) {
> +	if (!intel_tc_port_in_tbt_alt_mode(dig_port)) {
>  		drm_WARN_ON(&dev_priv->drm, dig_port->ddi_io_wakeref);
>  		dig_port->ddi_io_wakeref = intel_display_power_get(dev_priv,
>  								   dig_port->ddi_io_power_domain);
> @@ -2611,7 +2606,6 @@ static void hsw_ddi_pre_enable_dp(struct intel_atomic_state *state,
>  	struct intel_dp *intel_dp = enc_to_intel_dp(encoder);
>  	struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
>  	enum port port = encoder->port;
> -	enum phy phy = intel_port_to_phy(dev_priv, port);
>  	struct intel_digital_port *dig_port = enc_to_dig_port(encoder);
>  	bool is_mst = intel_crtc_has_type(crtc_state, INTEL_OUTPUT_DP_MST);
>  	int level = intel_ddi_dp_level(intel_dp, crtc_state);
> @@ -2630,8 +2624,7 @@ static void hsw_ddi_pre_enable_dp(struct intel_atomic_state *state,
>  
>  	intel_ddi_enable_clock(encoder, crtc_state);
>  
> -	if (!intel_phy_is_tc(dev_priv, phy) ||
> -	    dig_port->tc_mode != TC_PORT_TBT_ALT) {
> +	if (!intel_tc_port_in_tbt_alt_mode(dig_port)) {
>  		drm_WARN_ON(&dev_priv->drm, dig_port->ddi_io_wakeref);
>  		dig_port->ddi_io_wakeref = intel_display_power_get(dev_priv,
>  								   dig_port->ddi_io_power_domain);
> @@ -2801,7 +2794,6 @@ static void intel_ddi_post_disable_dp(struct intel_atomic_state *state,
>  	struct intel_dp *intel_dp = &dig_port->dp;
>  	bool is_mst = intel_crtc_has_type(old_crtc_state,
>  					  INTEL_OUTPUT_DP_MST);
> -	enum phy phy = intel_port_to_phy(dev_priv, encoder->port);
>  
>  	if (!is_mst)
>  		intel_dp_set_infoframes(encoder, false,
> @@ -2844,8 +2836,7 @@ static void intel_ddi_post_disable_dp(struct intel_atomic_state *state,
>  	intel_pps_vdd_on(intel_dp);
>  	intel_pps_off(intel_dp);
>  
> -	if (!intel_phy_is_tc(dev_priv, phy) ||
> -	    dig_port->tc_mode != TC_PORT_TBT_ALT)
> +	if (!intel_tc_port_in_tbt_alt_mode(dig_port))
>  		intel_display_power_put(dev_priv,
>  					dig_port->ddi_io_power_domain,
>  					fetch_and_zero(&dig_port->ddi_io_wakeref));
> @@ -3322,7 +3313,7 @@ intel_ddi_pre_pll_enable(struct intel_atomic_state *state,
>  						intel_ddi_main_link_aux_domain(dig_port));
>  	}
>  
> -	if (is_tc_port && dig_port->tc_mode != TC_PORT_TBT_ALT)
> +	if (is_tc_port && !intel_tc_port_in_tbt_alt_mode(dig_port))
>  		/*
>  		 * Program the lane count for static/dynamic connections on
>  		 * Type-C ports.  Skip this step for TBT.
> diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
> index 8547842935389..ddd8aa6560352 100644
> --- a/drivers/gpu/drm/i915/display/intel_display.c
> +++ b/drivers/gpu/drm/i915/display/intel_display.c
> @@ -3361,11 +3361,7 @@ enum intel_display_power_domain intel_port_to_power_domain(enum port port)
>  enum intel_display_power_domain
>  intel_aux_power_domain(struct intel_digital_port *dig_port)
>  {
> -	struct drm_i915_private *dev_priv = to_i915(dig_port->base.base.dev);
> -	enum phy phy = intel_port_to_phy(dev_priv, dig_port->base.port);
> -
> -	if (intel_phy_is_tc(dev_priv, phy) &&
> -	    dig_port->tc_mode == TC_PORT_TBT_ALT) {
> +	if (intel_tc_port_in_tbt_alt_mode(dig_port)) {
>  		switch (dig_port->aux_ch) {
>  		case AUX_CH_C:
>  			return POWER_DOMAIN_AUX_C_TBT;
> diff --git a/drivers/gpu/drm/i915/display/intel_display_power.c b/drivers/gpu/drm/i915/display/intel_display_power.c
> index cce1a926fcc10..ee03483047632 100644
> --- a/drivers/gpu/drm/i915/display/intel_display_power.c
> +++ b/drivers/gpu/drm/i915/display/intel_display_power.c
> @@ -560,7 +560,7 @@ static void icl_tc_port_assert_ref_held(struct drm_i915_private *dev_priv,
>  	if (drm_WARN_ON(&dev_priv->drm, !dig_port))
>  		return;
>  
> -	if (DISPLAY_VER(dev_priv) == 11 && dig_port->tc_legacy_port)
> +	if (DISPLAY_VER(dev_priv) == 11 && intel_tc_cold_requires_aux_pw(dig_port))
>  		return;
>  
>  	drm_WARN_ON(&dev_priv->drm, !intel_tc_port_ref_held(dig_port));
> @@ -629,7 +629,7 @@ icl_tc_phy_aux_power_well_enable(struct drm_i915_private *dev_priv,
>  	 * exit sequence.
>  	 */
>  	timeout_expected = is_tbt || intel_tc_cold_requires_aux_pw(dig_port);
> -	if (DISPLAY_VER(dev_priv) == 11 && dig_port->tc_legacy_port)
> +	if (DISPLAY_VER(dev_priv) == 11 && intel_tc_cold_requires_aux_pw(dig_port))
>  		icl_tc_cold_exit(dev_priv);
>  
>  	hsw_wait_for_power_well_enable(dev_priv, power_well, timeout_expected);
> diff --git a/drivers/gpu/drm/i915/display/intel_dp_aux.c b/drivers/gpu/drm/i915/display/intel_dp_aux.c
> index d9b2a783101d0..fbe1166bc5a64 100644
> --- a/drivers/gpu/drm/i915/display/intel_dp_aux.c
> +++ b/drivers/gpu/drm/i915/display/intel_dp_aux.c
> @@ -150,9 +150,6 @@ static u32 skl_get_aux_send_ctl(struct intel_dp *intel_dp,
>  				u32 unused)
>  {
>  	struct intel_digital_port *dig_port = dp_to_dig_port(intel_dp);
> -	struct drm_i915_private *i915 =
> -			to_i915(dig_port->base.base.dev);
> -	enum phy phy = intel_port_to_phy(i915, dig_port->base.port);
>  	u32 ret;
>  
>  	/*
> @@ -170,8 +167,7 @@ static u32 skl_get_aux_send_ctl(struct intel_dp *intel_dp,
>  	      DP_AUX_CH_CTL_FW_SYNC_PULSE_SKL(32) |
>  	      DP_AUX_CH_CTL_SYNC_PULSE_SKL(32);
>  
> -	if (intel_phy_is_tc(i915, phy) &&
> -	    dig_port->tc_mode == TC_PORT_TBT_ALT)
> +	if (intel_tc_port_in_tbt_alt_mode(dig_port))
>  		ret |= DP_AUX_CH_CTL_TBT_IO;
>  
>  	return ret;
> diff --git a/drivers/gpu/drm/i915/display/intel_dpll_mgr.c b/drivers/gpu/drm/i915/display/intel_dpll_mgr.c
> index 055992d099c7c..0a7e04db04be4 100644
> --- a/drivers/gpu/drm/i915/display/intel_dpll_mgr.c
> +++ b/drivers/gpu/drm/i915/display/intel_dpll_mgr.c
> @@ -26,6 +26,7 @@
>  #include "intel_dpio_phy.h"
>  #include "intel_dpll.h"
>  #include "intel_dpll_mgr.h"
> +#include "intel_tc.h"
>  
>  /**
>   * DOC: Display PLLs
> @@ -3101,8 +3102,8 @@ static void icl_update_active_dpll(struct intel_atomic_state *state,
>  		enc_to_dig_port(encoder);
>  
>  	if (primary_port &&
> -	    (primary_port->tc_mode == TC_PORT_DP_ALT ||
> -	     primary_port->tc_mode == TC_PORT_LEGACY))
> +	    (intel_tc_port_in_dp_alt_mode(primary_port) ||
> +	     intel_tc_port_in_legacy_mode(primary_port)))
>  		port_dpll_id = ICL_PORT_DPLL_MG_PHY;
>  
>  	icl_set_active_port_dpll(crtc_state, port_dpll_id);
> diff --git a/drivers/gpu/drm/i915/display/intel_tc.c b/drivers/gpu/drm/i915/display/intel_tc.c
> index 1f76c11d70834..511c46e36e237 100644
> --- a/drivers/gpu/drm/i915/display/intel_tc.c
> +++ b/drivers/gpu/drm/i915/display/intel_tc.c
> @@ -23,6 +23,30 @@ static const char *tc_port_mode_name(enum tc_port_mode mode)
>  	return names[mode];
>  }
>  
> +static bool intel_tc_port_in_mode(struct intel_digital_port *dig_port,
> +				  enum tc_port_mode mode)
> +{
> +	struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev);
> +	enum phy phy = intel_port_to_phy(i915, dig_port->base.port);
> +
> +	return intel_phy_is_tc(i915, phy) && dig_port->tc_mode == mode;
> +}
> +
> +bool intel_tc_port_in_tbt_alt_mode(struct intel_digital_port *dig_port)
> +{
> +	return intel_tc_port_in_mode(dig_port, TC_PORT_TBT_ALT);
> +}
> +
> +bool intel_tc_port_in_dp_alt_mode(struct intel_digital_port *dig_port)
> +{
> +	return intel_tc_port_in_mode(dig_port, TC_PORT_DP_ALT);
> +}
> +
> +bool intel_tc_port_in_legacy_mode(struct intel_digital_port *dig_port)
> +{
> +	return intel_tc_port_in_mode(dig_port, TC_PORT_LEGACY);
> +}
> +
>  static enum intel_display_power_domain
>  tc_cold_get_power_domain(struct intel_digital_port *dig_port)
>  {
> diff --git a/drivers/gpu/drm/i915/display/intel_tc.h b/drivers/gpu/drm/i915/display/intel_tc.h
> index 0c881f645e279..0fdcddb4fc870 100644
> --- a/drivers/gpu/drm/i915/display/intel_tc.h
> +++ b/drivers/gpu/drm/i915/display/intel_tc.h
> @@ -12,6 +12,10 @@
>  struct intel_digital_port;
>  struct intel_encoder;
>  
> +bool intel_tc_port_in_tbt_alt_mode(struct intel_digital_port *dig_port);
> +bool intel_tc_port_in_dp_alt_mode(struct intel_digital_port *dig_port);
> +bool intel_tc_port_in_legacy_mode(struct intel_digital_port *dig_port);
> +
>  bool intel_tc_port_connected(struct intel_encoder *encoder);
>  void intel_tc_port_disconnect_phy(struct intel_digital_port *dig_port);
>  


^ permalink raw reply	[flat|nested] 72+ messages in thread

* Re: [Intel-gfx] [PATCH 06/13] drm/i915/tc: Don't keep legacy TypeC ports in connected state w/o a sink
  2021-09-21  0:23 ` [Intel-gfx] [PATCH 06/13] drm/i915/tc: Don't keep legacy TypeC ports in connected state w/o a sink Imre Deak
@ 2021-09-24 19:57   ` Souza, Jose
  0 siblings, 0 replies; 72+ messages in thread
From: Souza, Jose @ 2021-09-24 19:57 UTC (permalink / raw)
  To: intel-gfx, Deak, Imre

On Tue, 2021-09-21 at 03:23 +0300, Imre Deak wrote:
> A follow-up patch will disconnect/reconnect PHYs around AUX transfers
> and modeset enable/disables. To prepare for that and make things
> consistent for all TypeC modes stop connecting the PHY in legacy mode
> without a sink being connected. This was done before since in legacy
> mode the PHY is dedicated to display usage, so there was no point in
> disconnecting it. However after the follow-up changes the TC-cold
> blocking power domains will be held as long as the PHY is in the
> connected state, so we'll need to disconnect/re-connect the PHY in all
> TypeC modes to allow for power saving.

Reviewed-by: José Roberto de Souza <jose.souza@intel.com>

> 
> Cc: José Roberto de Souza <jose.souza@intel.com>
> Signed-off-by: Imre Deak <imre.deak@intel.com>
> ---
>  drivers/gpu/drm/i915/display/intel_tc.c | 12 +-----------
>  1 file changed, 1 insertion(+), 11 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_tc.c b/drivers/gpu/drm/i915/display/intel_tc.c
> index 511c46e36e237..aa4c1e5e0c002 100644
> --- a/drivers/gpu/drm/i915/display/intel_tc.c
> +++ b/drivers/gpu/drm/i915/display/intel_tc.c
> @@ -511,8 +511,6 @@ static void icl_tc_phy_disconnect(struct intel_digital_port *dig_port)
>  {
>  	switch (dig_port->tc_mode) {
>  	case TC_PORT_LEGACY:
> -		/* Nothing to do, we never disconnect from legacy mode */
> -		break;
>  	case TC_PORT_DP_ALT:
>  		tc_phy_take_ownership(dig_port, false);
>  		dig_port->tc_mode = TC_PORT_TBT_ALT;
> @@ -580,9 +578,7 @@ intel_tc_port_get_target_mode(struct intel_digital_port *dig_port)
>  	if (live_status_mask)
>  		return fls(live_status_mask) - 1;
>  
> -	return tc_phy_status_complete(dig_port) &&
> -	       dig_port->tc_legacy_port ? TC_PORT_LEGACY :
> -					  TC_PORT_TBT_ALT;
> +	return TC_PORT_TBT_ALT;
>  }
>  
>  static void intel_tc_port_reset_mode(struct intel_digital_port *dig_port,
> @@ -643,14 +639,8 @@ void intel_tc_port_sanitize(struct intel_digital_port *dig_port)
>  				    "Port %s: PHY disconnected with %d active link(s)\n",
>  				    dig_port->tc_port_name, active_links);
>  		intel_tc_port_link_init_refcount(dig_port, active_links);
> -
> -		goto out;
>  	}
>  
> -	if (dig_port->tc_legacy_port)
> -		icl_tc_phy_connect(dig_port, 1);
> -
> -out:
>  	drm_dbg_kms(&i915->drm, "Port %s: sanitize mode (%s)\n",
>  		    dig_port->tc_port_name,
>  		    tc_port_mode_name(dig_port->tc_mode));


^ permalink raw reply	[flat|nested] 72+ messages in thread

* Re: [Intel-gfx] [PATCH 07/13] drm/i915/tc: Add a mode for the TypeC PHY's disconnected state
  2021-09-21  0:23 ` [Intel-gfx] [PATCH 07/13] drm/i915/tc: Add a mode for the TypeC PHY's disconnected state Imre Deak
@ 2021-09-27 21:16   ` Souza, Jose
  2021-09-27 21:46     ` Imre Deak
  2021-09-29 13:28   ` [Intel-gfx] [PATCH v2 " Imre Deak
  1 sibling, 1 reply; 72+ messages in thread
From: Souza, Jose @ 2021-09-27 21:16 UTC (permalink / raw)
  To: intel-gfx, Deak, Imre

On Tue, 2021-09-21 at 03:23 +0300, Imre Deak wrote:
> A follow-up change will start to disconnect/re-connect PHYs around AUX
> transfers and modeset enable/disables. To prepare for that add a new
> TypeC PHY disconnected mode, to help tracking the TC-cold blocking power
> domain status (no power domain in disconnected state, mode dependent
> power domain in connected state).
> 
> Cc: José Roberto de Souza <jose.souza@intel.com>
> Signed-off-by: Imre Deak <imre.deak@intel.com>
> ---
>  drivers/gpu/drm/i915/display/intel_display.h |  1 +
>  drivers/gpu/drm/i915/display/intel_tc.c      | 26 ++++++++++++++------
>  2 files changed, 19 insertions(+), 8 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_display.h b/drivers/gpu/drm/i915/display/intel_display.h
> index d425ee77aad71..87b96fed5e0ba 100644
> --- a/drivers/gpu/drm/i915/display/intel_display.h
> +++ b/drivers/gpu/drm/i915/display/intel_display.h
> @@ -270,6 +270,7 @@ enum tc_port {
>  };
>  
>  enum tc_port_mode {
> +	TC_PORT_DISCONNECTED,
>  	TC_PORT_TBT_ALT,
>  	TC_PORT_DP_ALT,
>  	TC_PORT_LEGACY,
> diff --git a/drivers/gpu/drm/i915/display/intel_tc.c b/drivers/gpu/drm/i915/display/intel_tc.c
> index aa4c1e5e0c002..77b16a7c43466 100644
> --- a/drivers/gpu/drm/i915/display/intel_tc.c
> +++ b/drivers/gpu/drm/i915/display/intel_tc.c
> @@ -12,13 +12,14 @@
>  static const char *tc_port_mode_name(enum tc_port_mode mode)
>  {
>  	static const char * const names[] = {
> +		[TC_PORT_DISCONNECTED] = "disconnected",
>  		[TC_PORT_TBT_ALT] = "tbt-alt",
>  		[TC_PORT_DP_ALT] = "dp-alt",
>  		[TC_PORT_LEGACY] = "legacy",
>  	};
>  
>  	if (WARN_ON(mode >= ARRAY_SIZE(names)))
> -		mode = TC_PORT_TBT_ALT;
> +		mode = TC_PORT_DISCONNECTED;
>  
>  	return names[mode];
>  }
> @@ -513,10 +514,11 @@ static void icl_tc_phy_disconnect(struct intel_digital_port *dig_port)
>  	case TC_PORT_LEGACY:
>  	case TC_PORT_DP_ALT:
>  		tc_phy_take_ownership(dig_port, false);
> -		dig_port->tc_mode = TC_PORT_TBT_ALT;
> -		break;
> +		fallthrough;
>  	case TC_PORT_TBT_ALT:
> -		/* Nothing to do, we stay in TBT-alt mode */
> +		dig_port->tc_mode = TC_PORT_DISCONNECTED;
> +		fallthrough;
> +	case TC_PORT_DISCONNECTED:
>  		break;
>  	default:
>  		MISSING_CASE(dig_port->tc_mode);
> @@ -621,31 +623,34 @@ void intel_tc_port_sanitize(struct intel_digital_port *dig_port)
>  {
>  	struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev);
>  	struct intel_encoder *encoder = &dig_port->base;
> -	intel_wakeref_t tc_cold_wref;
>  	int active_links = 0;
>  
>  	mutex_lock(&dig_port->tc_lock);
> -	tc_cold_wref = tc_cold_block(dig_port);
>  
> -	dig_port->tc_mode = intel_tc_port_get_current_mode(dig_port);
>  	if (dig_port->dp.is_mst)
>  		active_links = intel_dp_mst_encoder_active_links(dig_port);
>  	else if (encoder->base.crtc)
>  		active_links = to_intel_crtc(encoder->base.crtc)->active;
>  
> +	drm_WARN_ON(&i915->drm, dig_port->tc_mode != TC_PORT_DISCONNECTED);
>  	if (active_links) {
> +		intel_wakeref_t tc_cold_wref = tc_cold_block(dig_port);
> +
> +		dig_port->tc_mode = intel_tc_port_get_current_mode(dig_port);
> +
>  		if (!icl_tc_phy_is_connected(dig_port))
>  			drm_dbg_kms(&i915->drm,
>  				    "Port %s: PHY disconnected with %d active link(s)\n",
>  				    dig_port->tc_port_name, active_links);
>  		intel_tc_port_link_init_refcount(dig_port, active_links);
> +
> +		tc_cold_unblock(dig_port, tc_cold_wref);
>  	}
>  
>  	drm_dbg_kms(&i915->drm, "Port %s: sanitize mode (%s)\n",
>  		    dig_port->tc_port_name,
>  		    tc_port_mode_name(dig_port->tc_mode));
>  
> -	tc_cold_unblock(dig_port, tc_cold_wref);
>  	mutex_unlock(&dig_port->tc_lock);
>  }
>  
> @@ -704,6 +709,10 @@ static void __intel_tc_port_lock(struct intel_digital_port *dig_port,
>  		tc_cold_unblock(dig_port, tc_cold_wref);
>  	}
>  
> +	drm_WARN_ON(&i915->drm, dig_port->tc_mode == TC_PORT_DISCONNECTED);

This warning will be printed everytime it goes to suspend, other than that lgtm.

> +	drm_WARN_ON(&i915->drm, dig_port->tc_mode != TC_PORT_TBT_ALT &&
> +				!tc_phy_is_owned(dig_port));
> +
>  	drm_WARN_ON(&i915->drm, dig_port->tc_lock_wakeref);
>  	dig_port->tc_lock_wakeref = wakeref;
>  }
> @@ -816,6 +825,7 @@ void intel_tc_port_init(struct intel_digital_port *dig_port, bool is_legacy)
>  
>  	mutex_init(&dig_port->tc_lock);
>  	dig_port->tc_legacy_port = is_legacy;
> +	dig_port->tc_mode = TC_PORT_DISCONNECTED;
>  	dig_port->tc_link_refcount = 0;
>  	tc_port_load_fia_params(i915, dig_port);
>  }


^ permalink raw reply	[flat|nested] 72+ messages in thread

* Re: [Intel-gfx] [PATCH 07/13] drm/i915/tc: Add a mode for the TypeC PHY's disconnected state
  2021-09-27 21:16   ` Souza, Jose
@ 2021-09-27 21:46     ` Imre Deak
  2021-09-28 19:18       ` Souza, Jose
  0 siblings, 1 reply; 72+ messages in thread
From: Imre Deak @ 2021-09-27 21:46 UTC (permalink / raw)
  To: Souza, Jose; +Cc: intel-gfx

On Tue, Sep 28, 2021 at 12:16:45AM +0300, Souza, Jose wrote:
> On Tue, 2021-09-21 at 03:23 +0300, Imre Deak wrote:
> > A follow-up change will start to disconnect/re-connect PHYs around AUX
> > transfers and modeset enable/disables. To prepare for that add a new
> > TypeC PHY disconnected mode, to help tracking the TC-cold blocking power
> > domain status (no power domain in disconnected state, mode dependent
> > power domain in connected state).
> > 
> > Cc: José Roberto de Souza <jose.souza@intel.com>
> > Signed-off-by: Imre Deak <imre.deak@intel.com>
> > ---
> >  drivers/gpu/drm/i915/display/intel_display.h |  1 +
> >  drivers/gpu/drm/i915/display/intel_tc.c      | 26 ++++++++++++++------
> >  2 files changed, 19 insertions(+), 8 deletions(-)
> > 
> > diff --git a/drivers/gpu/drm/i915/display/intel_display.h b/drivers/gpu/drm/i915/display/intel_display.h
> > index d425ee77aad71..87b96fed5e0ba 100644
> > --- a/drivers/gpu/drm/i915/display/intel_display.h
> > +++ b/drivers/gpu/drm/i915/display/intel_display.h
> > @@ -270,6 +270,7 @@ enum tc_port {
> >  };
> >  
> >  enum tc_port_mode {
> > +	TC_PORT_DISCONNECTED,
> >  	TC_PORT_TBT_ALT,
> >  	TC_PORT_DP_ALT,
> >  	TC_PORT_LEGACY,
> > diff --git a/drivers/gpu/drm/i915/display/intel_tc.c b/drivers/gpu/drm/i915/display/intel_tc.c
> > index aa4c1e5e0c002..77b16a7c43466 100644
> > --- a/drivers/gpu/drm/i915/display/intel_tc.c
> > +++ b/drivers/gpu/drm/i915/display/intel_tc.c
> > @@ -12,13 +12,14 @@
> >  static const char *tc_port_mode_name(enum tc_port_mode mode)
> >  {
> >  	static const char * const names[] = {
> > +		[TC_PORT_DISCONNECTED] = "disconnected",
> >  		[TC_PORT_TBT_ALT] = "tbt-alt",
> >  		[TC_PORT_DP_ALT] = "dp-alt",
> >  		[TC_PORT_LEGACY] = "legacy",
> >  	};
> >  
> >  	if (WARN_ON(mode >= ARRAY_SIZE(names)))
> > -		mode = TC_PORT_TBT_ALT;
> > +		mode = TC_PORT_DISCONNECTED;
> >  
> >  	return names[mode];
> >  }
> > @@ -513,10 +514,11 @@ static void icl_tc_phy_disconnect(struct intel_digital_port *dig_port)
> >  	case TC_PORT_LEGACY:
> >  	case TC_PORT_DP_ALT:
> >  		tc_phy_take_ownership(dig_port, false);
> > -		dig_port->tc_mode = TC_PORT_TBT_ALT;
> > -		break;
> > +		fallthrough;
> >  	case TC_PORT_TBT_ALT:
> > -		/* Nothing to do, we stay in TBT-alt mode */
> > +		dig_port->tc_mode = TC_PORT_DISCONNECTED;
> > +		fallthrough;
> > +	case TC_PORT_DISCONNECTED:
> >  		break;
> >  	default:
> >  		MISSING_CASE(dig_port->tc_mode);
> > @@ -621,31 +623,34 @@ void intel_tc_port_sanitize(struct intel_digital_port *dig_port)
> >  {
> >  	struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev);
> >  	struct intel_encoder *encoder = &dig_port->base;
> > -	intel_wakeref_t tc_cold_wref;
> >  	int active_links = 0;
> >  
> >  	mutex_lock(&dig_port->tc_lock);
> > -	tc_cold_wref = tc_cold_block(dig_port);
> >  
> > -	dig_port->tc_mode = intel_tc_port_get_current_mode(dig_port);
> >  	if (dig_port->dp.is_mst)
> >  		active_links = intel_dp_mst_encoder_active_links(dig_port);
> >  	else if (encoder->base.crtc)
> >  		active_links = to_intel_crtc(encoder->base.crtc)->active;
> >  
> > +	drm_WARN_ON(&i915->drm, dig_port->tc_mode != TC_PORT_DISCONNECTED);
> >  	if (active_links) {
> > +		intel_wakeref_t tc_cold_wref = tc_cold_block(dig_port);
> > +
> > +		dig_port->tc_mode = intel_tc_port_get_current_mode(dig_port);
> > +
> >  		if (!icl_tc_phy_is_connected(dig_port))
> >  			drm_dbg_kms(&i915->drm,
> >  				    "Port %s: PHY disconnected with %d active link(s)\n",
> >  				    dig_port->tc_port_name, active_links);
> >  		intel_tc_port_link_init_refcount(dig_port, active_links);
> > +
> > +		tc_cold_unblock(dig_port, tc_cold_wref);
> >  	}
> >  
> >  	drm_dbg_kms(&i915->drm, "Port %s: sanitize mode (%s)\n",
> >  		    dig_port->tc_port_name,
> >  		    tc_port_mode_name(dig_port->tc_mode));
> >  
> > -	tc_cold_unblock(dig_port, tc_cold_wref);
> >  	mutex_unlock(&dig_port->tc_lock);
> >  }
> >  
> > @@ -704,6 +709,10 @@ static void __intel_tc_port_lock(struct intel_digital_port *dig_port,
> >  		tc_cold_unblock(dig_port, tc_cold_wref);
> >  	}
> >  
> > +	drm_WARN_ON(&i915->drm, dig_port->tc_mode == TC_PORT_DISCONNECTED);
> 
> This warning will be printed everytime it goes to suspend, other than that lgtm.

By the end of the patchset this shouldn't warn. But yes, for bisect to
work this should've been added only in patch 11, I'll move it there.

> > +	drm_WARN_ON(&i915->drm, dig_port->tc_mode != TC_PORT_TBT_ALT &&
> > +				!tc_phy_is_owned(dig_port));
> > +
> >  	drm_WARN_ON(&i915->drm, dig_port->tc_lock_wakeref);
> >  	dig_port->tc_lock_wakeref = wakeref;
> >  }
> > @@ -816,6 +825,7 @@ void intel_tc_port_init(struct intel_digital_port *dig_port, bool is_legacy)
> >  
> >  	mutex_init(&dig_port->tc_lock);
> >  	dig_port->tc_legacy_port = is_legacy;
> > +	dig_port->tc_mode = TC_PORT_DISCONNECTED;
> >  	dig_port->tc_link_refcount = 0;
> >  	tc_port_load_fia_params(i915, dig_port);
> >  }
> 

^ permalink raw reply	[flat|nested] 72+ messages in thread

* Re: [Intel-gfx] [PATCH 08/13] drm/i915/tc: Refactor TC-cold block/unblock helpers
  2021-09-21  0:23 ` [Intel-gfx] [PATCH 08/13] drm/i915/tc: Refactor TC-cold block/unblock helpers Imre Deak
@ 2021-09-27 21:56   ` Souza, Jose
  2021-09-27 22:13     ` Imre Deak
  2021-09-29 13:28   ` [Intel-gfx] [PATCH v2 " Imre Deak
  1 sibling, 1 reply; 72+ messages in thread
From: Souza, Jose @ 2021-09-27 21:56 UTC (permalink / raw)
  To: intel-gfx, Deak, Imre

On Tue, 2021-09-21 at 03:23 +0300, Imre Deak wrote:
> A follow-up change will select the TC-cold blocking power domain based
> on the TypeC mode, prepare for that here.
> 
> Also bring intel_tc_cold_requires_aux_pw() earlier to its logical place
> for readability.
> 
> No functional change.
> 
> Cc: José Roberto de Souza <jose.souza@intel.com>
> Signed-off-by: Imre Deak <imre.deak@intel.com>
> ---
>  .../drm/i915/display/intel_display_types.h    |  2 +
>  drivers/gpu/drm/i915/display/intel_tc.c       | 63 +++++++++++--------
>  2 files changed, 39 insertions(+), 26 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_display_types.h b/drivers/gpu/drm/i915/display/intel_display_types.h
> index e9e806d90eec4..08a73ffded957 100644
> --- a/drivers/gpu/drm/i915/display/intel_display_types.h
> +++ b/drivers/gpu/drm/i915/display/intel_display_types.h
> @@ -1663,8 +1663,10 @@ struct intel_digital_port {
>  	enum intel_display_power_domain ddi_io_power_domain;
>  	intel_wakeref_t ddi_io_wakeref;
>  	intel_wakeref_t aux_wakeref;
> +
>  	struct mutex tc_lock;	/* protects the TypeC port mode */
>  	intel_wakeref_t tc_lock_wakeref;
> +	enum intel_display_power_domain tc_lock_power_domain;
>  	int tc_link_refcount;
>  	bool tc_legacy_port:1;
>  	char tc_port_name[8];
> diff --git a/drivers/gpu/drm/i915/display/intel_tc.c b/drivers/gpu/drm/i915/display/intel_tc.c
> index 77b16a7c43466..24d2dc2e19a7d 100644
> --- a/drivers/gpu/drm/i915/display/intel_tc.c
> +++ b/drivers/gpu/drm/i915/display/intel_tc.c
> @@ -48,8 +48,16 @@ bool intel_tc_port_in_legacy_mode(struct intel_digital_port *dig_port)
>  	return intel_tc_port_in_mode(dig_port, TC_PORT_LEGACY);
>  }
>  
> +bool intel_tc_cold_requires_aux_pw(struct intel_digital_port *dig_port)
> +{
> +	struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev);
> +
> +	return (DISPLAY_VER(i915) == 11 && dig_port->tc_legacy_port) ||
> +		IS_ALDERLAKE_P(i915);
> +}
> +
>  static enum intel_display_power_domain
> -tc_cold_get_power_domain(struct intel_digital_port *dig_port)
> +tc_cold_get_power_domain(struct intel_digital_port *dig_port, enum tc_port_mode mode)
>  {
>  	if (intel_tc_cold_requires_aux_pw(dig_port))
>  		return intel_legacy_aux_to_power_domain(dig_port->aux_ch);
> @@ -58,23 +66,30 @@ tc_cold_get_power_domain(struct intel_digital_port *dig_port)
>  }
>  
>  static intel_wakeref_t
> -tc_cold_block(struct intel_digital_port *dig_port)
> +tc_cold_block_in_mode(struct intel_digital_port *dig_port, enum tc_port_mode mode,
> +		      enum intel_display_power_domain *domain)
>  {
>  	struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev);
> -	enum intel_display_power_domain domain;
>  
>  	if (DISPLAY_VER(i915) == 11 && !dig_port->tc_legacy_port)
>  		return 0;
>  
> -	domain = tc_cold_get_power_domain(dig_port);
> -	return intel_display_power_get(i915, domain);
> +	*domain = tc_cold_get_power_domain(dig_port, mode);

I see problems with this approach.
If there is a TC alt-mode is connected and current software state is TBT or disconnected it will not get the power domain to exit TC cold, what could
case invalid reads of registers.

From the next patch commit message: 'For the ADL-P TBT mode the spec doesn't require blocking TC-cold by
using the legacy AUX power domain'.

It is not required for TBT but when there is nothing connected, hardware is not in TBT mode so it can still get into TC cold.

> +
> +	return intel_display_power_get(i915, *domain);
> +}
> +
> +static intel_wakeref_t
> +tc_cold_block(struct intel_digital_port *dig_port, enum intel_display_power_domain *domain)
> +{
> +	return tc_cold_block_in_mode(dig_port, dig_port->tc_mode, domain);
>  }
>  
>  static void
> -tc_cold_unblock(struct intel_digital_port *dig_port, intel_wakeref_t wakeref)
> +tc_cold_unblock(struct intel_digital_port *dig_port, enum intel_display_power_domain domain,
> +		intel_wakeref_t wakeref)
>  {
>  	struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev);
> -	enum intel_display_power_domain domain;
>  
>  	/*
>  	 * wakeref == -1, means some error happened saving save_depot_stack but
> @@ -84,8 +99,7 @@ tc_cold_unblock(struct intel_digital_port *dig_port, intel_wakeref_t wakeref)
>  	if (wakeref == 0)
>  		return;
>  
> -	domain = tc_cold_get_power_domain(dig_port);
> -	intel_display_power_put_async(i915, domain, wakeref);
> +	intel_display_power_put(i915, domain, wakeref);
>  }
>  
>  static void
> @@ -98,7 +112,8 @@ assert_tc_cold_blocked(struct intel_digital_port *dig_port)
>  		return;
>  
>  	enabled = intel_display_power_is_enabled(i915,
> -						 tc_cold_get_power_domain(dig_port));
> +						 tc_cold_get_power_domain(dig_port,
> +									  dig_port->tc_mode));
>  	drm_WARN_ON(&i915->drm, !enabled);
>  }
>  
> @@ -634,7 +649,8 @@ void intel_tc_port_sanitize(struct intel_digital_port *dig_port)
>  
>  	drm_WARN_ON(&i915->drm, dig_port->tc_mode != TC_PORT_DISCONNECTED);
>  	if (active_links) {
> -		intel_wakeref_t tc_cold_wref = tc_cold_block(dig_port);
> +		enum intel_display_power_domain domain;
> +		intel_wakeref_t tc_cold_wref = tc_cold_block(dig_port, &domain);
>  
>  		dig_port->tc_mode = intel_tc_port_get_current_mode(dig_port);
>  
> @@ -644,7 +660,7 @@ void intel_tc_port_sanitize(struct intel_digital_port *dig_port)
>  				    dig_port->tc_port_name, active_links);
>  		intel_tc_port_link_init_refcount(dig_port, active_links);
>  
> -		tc_cold_unblock(dig_port, tc_cold_wref);
> +		tc_cold_unblock(dig_port, domain, tc_cold_wref);
>  	}
>  
>  	drm_dbg_kms(&i915->drm, "Port %s: sanitize mode (%s)\n",
> @@ -673,15 +689,16 @@ bool intel_tc_port_connected(struct intel_encoder *encoder)
>  {
>  	struct intel_digital_port *dig_port = enc_to_dig_port(encoder);
>  	bool is_connected;
> +	enum intel_display_power_domain domain;
>  	intel_wakeref_t tc_cold_wref;
>  
>  	intel_tc_port_lock(dig_port);
> -	tc_cold_wref = tc_cold_block(dig_port);
> +	tc_cold_wref = tc_cold_block(dig_port, &domain);
>  
>  	is_connected = tc_port_live_status_mask(dig_port) &
>  		       BIT(dig_port->tc_mode);
>  
> -	tc_cold_unblock(dig_port, tc_cold_wref);
> +	tc_cold_unblock(dig_port, domain, tc_cold_wref);
>  	intel_tc_port_unlock(dig_port);
>  
>  	return is_connected;
> @@ -698,15 +715,16 @@ static void __intel_tc_port_lock(struct intel_digital_port *dig_port,
>  	mutex_lock(&dig_port->tc_lock);
>  
>  	if (!dig_port->tc_link_refcount) {
> +		enum intel_display_power_domain domain;
>  		intel_wakeref_t tc_cold_wref;
>  
> -		tc_cold_wref = tc_cold_block(dig_port);
> +		tc_cold_wref = tc_cold_block(dig_port, &domain);
>  
>  		if (force_disconnect || intel_tc_port_needs_reset(dig_port))
>  			intel_tc_port_reset_mode(dig_port, required_lanes,
>  						 force_disconnect);
>  
> -		tc_cold_unblock(dig_port, tc_cold_wref);
> +		tc_cold_unblock(dig_port, domain, tc_cold_wref);
>  	}
>  
>  	drm_WARN_ON(&i915->drm, dig_port->tc_mode == TC_PORT_DISCONNECTED);
> @@ -775,6 +793,7 @@ void intel_tc_port_put_link(struct intel_digital_port *dig_port)
>  static bool
>  tc_has_modular_fia(struct drm_i915_private *i915, struct intel_digital_port *dig_port)
>  {
> +	enum intel_display_power_domain domain;
>  	intel_wakeref_t wakeref;
>  	u32 val;
>  
> @@ -782,9 +801,9 @@ tc_has_modular_fia(struct drm_i915_private *i915, struct intel_digital_port *dig
>  		return false;
>  
>  	mutex_lock(&dig_port->tc_lock);
> -	wakeref = tc_cold_block(dig_port);
> +	wakeref = tc_cold_block(dig_port, &domain);
>  	val = intel_uncore_read(&i915->uncore, PORT_TX_DFLEXDPSP(FIA1));
> -	tc_cold_unblock(dig_port, wakeref);
> +	tc_cold_unblock(dig_port, domain, wakeref);
>  	mutex_unlock(&dig_port->tc_lock);
>  
>  	drm_WARN_ON(&i915->drm, val == 0xffffffff);
> @@ -829,11 +848,3 @@ void intel_tc_port_init(struct intel_digital_port *dig_port, bool is_legacy)
>  	dig_port->tc_link_refcount = 0;
>  	tc_port_load_fia_params(i915, dig_port);
>  }
> -
> -bool intel_tc_cold_requires_aux_pw(struct intel_digital_port *dig_port)
> -{
> -	struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev);
> -
> -	return (DISPLAY_VER(i915) == 11 && dig_port->tc_legacy_port) ||
> -		IS_ALDERLAKE_P(i915);
> -}


^ permalink raw reply	[flat|nested] 72+ messages in thread

* Re: [Intel-gfx] [PATCH 10/13] drm/i915/icl/tc: Remove the ICL special casing during TC-cold blocking
  2021-09-21  0:23 ` [Intel-gfx] [PATCH 10/13] drm/i915/icl/tc: Remove the ICL special casing during TC-cold blocking Imre Deak
@ 2021-09-27 22:02   ` Souza, Jose
  2021-09-28 10:52     ` Imre Deak
  0 siblings, 1 reply; 72+ messages in thread
From: Souza, Jose @ 2021-09-27 22:02 UTC (permalink / raw)
  To: intel-gfx, Deak, Imre

On Tue, 2021-09-21 at 03:23 +0300, Imre Deak wrote:
> While a TypeC port mode is locked a DISPLAY_CORE power domain reference
> is held, which implies a runtime PM ref. By removing the ICL !legacy
> port special casing, a TC_COLD_OFF power domain reference will be taken
> for such ports, which also translates to a runtime PM ref on that
> platform. A follow-up change will stop holding the DISPLAY_CORE power
> domain while the port is locked.

This should be squashed to 'drm/i915/tc: Refactor TC-cold block/unblock helpers' otherwise domain is not initialized for this case. 

> 
> Cc: José Roberto de Souza <jose.souza@intel.com>
> Signed-off-by: Imre Deak <imre.deak@intel.com>
> ---
>  drivers/gpu/drm/i915/display/intel_tc.c | 6 ------
>  1 file changed, 6 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_tc.c b/drivers/gpu/drm/i915/display/intel_tc.c
> index b2a3d297bfc19..8d799cf7ccefd 100644
> --- a/drivers/gpu/drm/i915/display/intel_tc.c
> +++ b/drivers/gpu/drm/i915/display/intel_tc.c
> @@ -71,9 +71,6 @@ tc_cold_block_in_mode(struct intel_digital_port *dig_port, enum tc_port_mode mod
>  {
>  	struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev);
>  
> -	if (DISPLAY_VER(i915) == 11 && !dig_port->tc_legacy_port)
> -		return 0;
> -
>  	*domain = tc_cold_get_power_domain(dig_port, mode);
>  
>  	return intel_display_power_get(i915, *domain);
> @@ -108,9 +105,6 @@ assert_tc_cold_blocked(struct intel_digital_port *dig_port)
>  	struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev);
>  	bool enabled;
>  
> -	if (DISPLAY_VER(i915) == 11 && !dig_port->tc_legacy_port)
> -		return;
> -
>  	enabled = intel_display_power_is_enabled(i915,
>  						 tc_cold_get_power_domain(dig_port,
>  									  dig_port->tc_mode));


^ permalink raw reply	[flat|nested] 72+ messages in thread

* Re: [Intel-gfx] [PATCH 08/13] drm/i915/tc: Refactor TC-cold block/unblock helpers
  2021-09-27 21:56   ` Souza, Jose
@ 2021-09-27 22:13     ` Imre Deak
  2021-09-27 22:21       ` Souza, Jose
  0 siblings, 1 reply; 72+ messages in thread
From: Imre Deak @ 2021-09-27 22:13 UTC (permalink / raw)
  To: Souza, Jose; +Cc: intel-gfx

On Tue, Sep 28, 2021 at 12:56:24AM +0300, Souza, Jose wrote:
> On Tue, 2021-09-21 at 03:23 +0300, Imre Deak wrote:
> > A follow-up change will select the TC-cold blocking power domain based
> > on the TypeC mode, prepare for that here.
> > 
> > Also bring intel_tc_cold_requires_aux_pw() earlier to its logical place
> > for readability.
> > 
> > No functional change.
> > 
> > Cc: José Roberto de Souza <jose.souza@intel.com>
> > Signed-off-by: Imre Deak <imre.deak@intel.com>
> > ---
> >  .../drm/i915/display/intel_display_types.h    |  2 +
> >  drivers/gpu/drm/i915/display/intel_tc.c       | 63 +++++++++++--------
> >  2 files changed, 39 insertions(+), 26 deletions(-)
> > 
> > diff --git a/drivers/gpu/drm/i915/display/intel_display_types.h b/drivers/gpu/drm/i915/display/intel_display_types.h
> > index e9e806d90eec4..08a73ffded957 100644
> > --- a/drivers/gpu/drm/i915/display/intel_display_types.h
> > +++ b/drivers/gpu/drm/i915/display/intel_display_types.h
> > @@ -1663,8 +1663,10 @@ struct intel_digital_port {
> >  	enum intel_display_power_domain ddi_io_power_domain;
> >  	intel_wakeref_t ddi_io_wakeref;
> >  	intel_wakeref_t aux_wakeref;
> > +
> >  	struct mutex tc_lock;	/* protects the TypeC port mode */
> >  	intel_wakeref_t tc_lock_wakeref;
> > +	enum intel_display_power_domain tc_lock_power_domain;
> >  	int tc_link_refcount;
> >  	bool tc_legacy_port:1;
> >  	char tc_port_name[8];
> > diff --git a/drivers/gpu/drm/i915/display/intel_tc.c b/drivers/gpu/drm/i915/display/intel_tc.c
> > index 77b16a7c43466..24d2dc2e19a7d 100644
> > --- a/drivers/gpu/drm/i915/display/intel_tc.c
> > +++ b/drivers/gpu/drm/i915/display/intel_tc.c
> > @@ -48,8 +48,16 @@ bool intel_tc_port_in_legacy_mode(struct intel_digital_port *dig_port)
> >  	return intel_tc_port_in_mode(dig_port, TC_PORT_LEGACY);
> >  }
> >  
> > +bool intel_tc_cold_requires_aux_pw(struct intel_digital_port *dig_port)
> > +{
> > +	struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev);
> > +
> > +	return (DISPLAY_VER(i915) == 11 && dig_port->tc_legacy_port) ||
> > +		IS_ALDERLAKE_P(i915);
> > +}
> > +
> >  static enum intel_display_power_domain
> > -tc_cold_get_power_domain(struct intel_digital_port *dig_port)
> > +tc_cold_get_power_domain(struct intel_digital_port *dig_port, enum tc_port_mode mode)
> >  {
> >  	if (intel_tc_cold_requires_aux_pw(dig_port))
> >  		return intel_legacy_aux_to_power_domain(dig_port->aux_ch);
> > @@ -58,23 +66,30 @@ tc_cold_get_power_domain(struct intel_digital_port *dig_port)
> >  }
> >  
> >  static intel_wakeref_t
> > -tc_cold_block(struct intel_digital_port *dig_port)
> > +tc_cold_block_in_mode(struct intel_digital_port *dig_port, enum tc_port_mode mode,
> > +		      enum intel_display_power_domain *domain)
> >  {
> >  	struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev);
> > -	enum intel_display_power_domain domain;
> >  
> >  	if (DISPLAY_VER(i915) == 11 && !dig_port->tc_legacy_port)
> >  		return 0;
> >  
> > -	domain = tc_cold_get_power_domain(dig_port);
> > -	return intel_display_power_get(i915, domain);
> > +	*domain = tc_cold_get_power_domain(dig_port, mode);
> 
> I see problems with this approach.
>
> If there is a TC alt-mode is connected and current software state is
> TBT or disconnected it will not get the power domain to exit TC cold,
> what could case invalid reads of registers.

If the mode needs to be changed, like in the above cases, the power
domain required to exit TC cold will be taken.

> From the next patch commit message: 'For the ADL-P TBT mode the spec
> doesn't require blocking TC-cold by using the legacy AUX power
> domain'.
>
> It is not required for TBT but when there is nothing connected,
> hardware is not in TBT mode so it can still get into TC cold.

If there is nothing connected the required power domain will be taken to
exit TC cold.

> > +
> > +	return intel_display_power_get(i915, *domain);
> > +}
> > +
> > +static intel_wakeref_t
> > +tc_cold_block(struct intel_digital_port *dig_port, enum intel_display_power_domain *domain)
> > +{
> > +	return tc_cold_block_in_mode(dig_port, dig_port->tc_mode, domain);
> >  }
> >  
> >  static void
> > -tc_cold_unblock(struct intel_digital_port *dig_port, intel_wakeref_t wakeref)
> > +tc_cold_unblock(struct intel_digital_port *dig_port, enum intel_display_power_domain domain,
> > +		intel_wakeref_t wakeref)
> >  {
> >  	struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev);
> > -	enum intel_display_power_domain domain;
> >  
> >  	/*
> >  	 * wakeref == -1, means some error happened saving save_depot_stack but
> > @@ -84,8 +99,7 @@ tc_cold_unblock(struct intel_digital_port *dig_port, intel_wakeref_t wakeref)
> >  	if (wakeref == 0)
> >  		return;
> >  
> > -	domain = tc_cold_get_power_domain(dig_port);
> > -	intel_display_power_put_async(i915, domain, wakeref);
> > +	intel_display_power_put(i915, domain, wakeref);
> >  }
> >  
> >  static void
> > @@ -98,7 +112,8 @@ assert_tc_cold_blocked(struct intel_digital_port *dig_port)
> >  		return;
> >  
> >  	enabled = intel_display_power_is_enabled(i915,
> > -						 tc_cold_get_power_domain(dig_port));
> > +						 tc_cold_get_power_domain(dig_port,
> > +									  dig_port->tc_mode));
> >  	drm_WARN_ON(&i915->drm, !enabled);
> >  }
> >  
> > @@ -634,7 +649,8 @@ void intel_tc_port_sanitize(struct intel_digital_port *dig_port)
> >  
> >  	drm_WARN_ON(&i915->drm, dig_port->tc_mode != TC_PORT_DISCONNECTED);
> >  	if (active_links) {
> > -		intel_wakeref_t tc_cold_wref = tc_cold_block(dig_port);
> > +		enum intel_display_power_domain domain;
> > +		intel_wakeref_t tc_cold_wref = tc_cold_block(dig_port, &domain);
> >  
> >  		dig_port->tc_mode = intel_tc_port_get_current_mode(dig_port);
> >  
> > @@ -644,7 +660,7 @@ void intel_tc_port_sanitize(struct intel_digital_port *dig_port)
> >  				    dig_port->tc_port_name, active_links);
> >  		intel_tc_port_link_init_refcount(dig_port, active_links);
> >  
> > -		tc_cold_unblock(dig_port, tc_cold_wref);
> > +		tc_cold_unblock(dig_port, domain, tc_cold_wref);
> >  	}
> >  
> >  	drm_dbg_kms(&i915->drm, "Port %s: sanitize mode (%s)\n",
> > @@ -673,15 +689,16 @@ bool intel_tc_port_connected(struct intel_encoder *encoder)
> >  {
> >  	struct intel_digital_port *dig_port = enc_to_dig_port(encoder);
> >  	bool is_connected;
> > +	enum intel_display_power_domain domain;
> >  	intel_wakeref_t tc_cold_wref;
> >  
> >  	intel_tc_port_lock(dig_port);
> > -	tc_cold_wref = tc_cold_block(dig_port);
> > +	tc_cold_wref = tc_cold_block(dig_port, &domain);
> >  
> >  	is_connected = tc_port_live_status_mask(dig_port) &
> >  		       BIT(dig_port->tc_mode);
> >  
> > -	tc_cold_unblock(dig_port, tc_cold_wref);
> > +	tc_cold_unblock(dig_port, domain, tc_cold_wref);
> >  	intel_tc_port_unlock(dig_port);
> >  
> >  	return is_connected;
> > @@ -698,15 +715,16 @@ static void __intel_tc_port_lock(struct intel_digital_port *dig_port,
> >  	mutex_lock(&dig_port->tc_lock);
> >  
> >  	if (!dig_port->tc_link_refcount) {
> > +		enum intel_display_power_domain domain;
> >  		intel_wakeref_t tc_cold_wref;
> >  
> > -		tc_cold_wref = tc_cold_block(dig_port);
> > +		tc_cold_wref = tc_cold_block(dig_port, &domain);
> >  
> >  		if (force_disconnect || intel_tc_port_needs_reset(dig_port))
> >  			intel_tc_port_reset_mode(dig_port, required_lanes,
> >  						 force_disconnect);
> >  
> > -		tc_cold_unblock(dig_port, tc_cold_wref);
> > +		tc_cold_unblock(dig_port, domain, tc_cold_wref);
> >  	}
> >  
> >  	drm_WARN_ON(&i915->drm, dig_port->tc_mode == TC_PORT_DISCONNECTED);
> > @@ -775,6 +793,7 @@ void intel_tc_port_put_link(struct intel_digital_port *dig_port)
> >  static bool
> >  tc_has_modular_fia(struct drm_i915_private *i915, struct intel_digital_port *dig_port)
> >  {
> > +	enum intel_display_power_domain domain;
> >  	intel_wakeref_t wakeref;
> >  	u32 val;
> >  
> > @@ -782,9 +801,9 @@ tc_has_modular_fia(struct drm_i915_private *i915, struct intel_digital_port *dig
> >  		return false;
> >  
> >  	mutex_lock(&dig_port->tc_lock);
> > -	wakeref = tc_cold_block(dig_port);
> > +	wakeref = tc_cold_block(dig_port, &domain);
> >  	val = intel_uncore_read(&i915->uncore, PORT_TX_DFLEXDPSP(FIA1));
> > -	tc_cold_unblock(dig_port, wakeref);
> > +	tc_cold_unblock(dig_port, domain, wakeref);
> >  	mutex_unlock(&dig_port->tc_lock);
> >  
> >  	drm_WARN_ON(&i915->drm, val == 0xffffffff);
> > @@ -829,11 +848,3 @@ void intel_tc_port_init(struct intel_digital_port *dig_port, bool is_legacy)
> >  	dig_port->tc_link_refcount = 0;
> >  	tc_port_load_fia_params(i915, dig_port);
> >  }
> > -
> > -bool intel_tc_cold_requires_aux_pw(struct intel_digital_port *dig_port)
> > -{
> > -	struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev);
> > -
> > -	return (DISPLAY_VER(i915) == 11 && dig_port->tc_legacy_port) ||
> > -		IS_ALDERLAKE_P(i915);
> > -}
> 

^ permalink raw reply	[flat|nested] 72+ messages in thread

* Re: [Intel-gfx] [PATCH 08/13] drm/i915/tc: Refactor TC-cold block/unblock helpers
  2021-09-27 22:13     ` Imre Deak
@ 2021-09-27 22:21       ` Souza, Jose
  2021-09-27 22:28         ` Imre Deak
  0 siblings, 1 reply; 72+ messages in thread
From: Souza, Jose @ 2021-09-27 22:21 UTC (permalink / raw)
  To: Deak, Imre; +Cc: intel-gfx

On Tue, 2021-09-28 at 01:13 +0300, Imre Deak wrote:
> On Tue, Sep 28, 2021 at 12:56:24AM +0300, Souza, Jose wrote:
> > On Tue, 2021-09-21 at 03:23 +0300, Imre Deak wrote:
> > > A follow-up change will select the TC-cold blocking power domain based
> > > on the TypeC mode, prepare for that here.
> > > 
> > > Also bring intel_tc_cold_requires_aux_pw() earlier to its logical place
> > > for readability.
> > > 
> > > No functional change.
> > > 
> > > Cc: José Roberto de Souza <jose.souza@intel.com>
> > > Signed-off-by: Imre Deak <imre.deak@intel.com>
> > > ---
> > >  .../drm/i915/display/intel_display_types.h    |  2 +
> > >  drivers/gpu/drm/i915/display/intel_tc.c       | 63 +++++++++++--------
> > >  2 files changed, 39 insertions(+), 26 deletions(-)
> > > 
> > > diff --git a/drivers/gpu/drm/i915/display/intel_display_types.h b/drivers/gpu/drm/i915/display/intel_display_types.h
> > > index e9e806d90eec4..08a73ffded957 100644
> > > --- a/drivers/gpu/drm/i915/display/intel_display_types.h
> > > +++ b/drivers/gpu/drm/i915/display/intel_display_types.h
> > > @@ -1663,8 +1663,10 @@ struct intel_digital_port {
> > >  	enum intel_display_power_domain ddi_io_power_domain;
> > >  	intel_wakeref_t ddi_io_wakeref;
> > >  	intel_wakeref_t aux_wakeref;
> > > +
> > >  	struct mutex tc_lock;	/* protects the TypeC port mode */
> > >  	intel_wakeref_t tc_lock_wakeref;
> > > +	enum intel_display_power_domain tc_lock_power_domain;
> > >  	int tc_link_refcount;
> > >  	bool tc_legacy_port:1;
> > >  	char tc_port_name[8];
> > > diff --git a/drivers/gpu/drm/i915/display/intel_tc.c b/drivers/gpu/drm/i915/display/intel_tc.c
> > > index 77b16a7c43466..24d2dc2e19a7d 100644
> > > --- a/drivers/gpu/drm/i915/display/intel_tc.c
> > > +++ b/drivers/gpu/drm/i915/display/intel_tc.c
> > > @@ -48,8 +48,16 @@ bool intel_tc_port_in_legacy_mode(struct intel_digital_port *dig_port)
> > >  	return intel_tc_port_in_mode(dig_port, TC_PORT_LEGACY);
> > >  }
> > >  
> > > +bool intel_tc_cold_requires_aux_pw(struct intel_digital_port *dig_port)
> > > +{
> > > +	struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev);
> > > +
> > > +	return (DISPLAY_VER(i915) == 11 && dig_port->tc_legacy_port) ||
> > > +		IS_ALDERLAKE_P(i915);
> > > +}
> > > +
> > >  static enum intel_display_power_domain
> > > -tc_cold_get_power_domain(struct intel_digital_port *dig_port)
> > > +tc_cold_get_power_domain(struct intel_digital_port *dig_port, enum tc_port_mode mode)
> > >  {
> > >  	if (intel_tc_cold_requires_aux_pw(dig_port))
> > >  		return intel_legacy_aux_to_power_domain(dig_port->aux_ch);
> > > @@ -58,23 +66,30 @@ tc_cold_get_power_domain(struct intel_digital_port *dig_port)
> > >  }
> > >  
> > >  static intel_wakeref_t
> > > -tc_cold_block(struct intel_digital_port *dig_port)
> > > +tc_cold_block_in_mode(struct intel_digital_port *dig_port, enum tc_port_mode mode,
> > > +		      enum intel_display_power_domain *domain)
> > >  {
> > >  	struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev);
> > > -	enum intel_display_power_domain domain;
> > >  
> > >  	if (DISPLAY_VER(i915) == 11 && !dig_port->tc_legacy_port)
> > >  		return 0;
> > >  
> > > -	domain = tc_cold_get_power_domain(dig_port);
> > > -	return intel_display_power_get(i915, domain);
> > > +	*domain = tc_cold_get_power_domain(dig_port, mode);
> > 
> > I see problems with this approach.
> > 
> > If there is a TC alt-mode is connected and current software state is
> > TBT or disconnected it will not get the power domain to exit TC cold,
> > what could case invalid reads of registers.
> 
> If the mode needs to be changed, like in the above cases, the power
> domain required to exit TC cold will be taken.

How?
I see at least this 2 problematic cases.

intel_tc_port_sanitize()
	tc_cold_block(mode=TBT)

	dig_port->tc_mode = intel_tc_port_get_current_mode(dig_port);
	...

	tc_cold_unblock(dig_port, domain, tc_cold_wref);

Other case

intel_tc_port_connected()

	tc_cold_block(mode=TBT)

	is_connected = tc_port_live_status_mask(dig_port) &
		       BIT(dig_port->tc_mode);

	tc_cold_unblock(dig_port, domain, tc_cold_wref);


> 
> > From the next patch commit message: 'For the ADL-P TBT mode the spec
> > doesn't require blocking TC-cold by using the legacy AUX power
> > domain'.
> > 
> > It is not required for TBT but when there is nothing connected,
> > hardware is not in TBT mode so it can still get into TC cold.
> 
> If there is nothing connected the required power domain will be taken to
> exit TC cold.
> 
> > > +
> > > +	return intel_display_power_get(i915, *domain);
> > > +}
> > > +
> > > +static intel_wakeref_t
> > > +tc_cold_block(struct intel_digital_port *dig_port, enum intel_display_power_domain *domain)
> > > +{
> > > +	return tc_cold_block_in_mode(dig_port, dig_port->tc_mode, domain);
> > >  }
> > >  
> > >  static void
> > > -tc_cold_unblock(struct intel_digital_port *dig_port, intel_wakeref_t wakeref)
> > > +tc_cold_unblock(struct intel_digital_port *dig_port, enum intel_display_power_domain domain,
> > > +		intel_wakeref_t wakeref)
> > >  {
> > >  	struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev);
> > > -	enum intel_display_power_domain domain;
> > >  
> > >  	/*
> > >  	 * wakeref == -1, means some error happened saving save_depot_stack but
> > > @@ -84,8 +99,7 @@ tc_cold_unblock(struct intel_digital_port *dig_port, intel_wakeref_t wakeref)
> > >  	if (wakeref == 0)
> > >  		return;
> > >  
> > > -	domain = tc_cold_get_power_domain(dig_port);
> > > -	intel_display_power_put_async(i915, domain, wakeref);
> > > +	intel_display_power_put(i915, domain, wakeref);
> > >  }
> > >  
> > >  static void
> > > @@ -98,7 +112,8 @@ assert_tc_cold_blocked(struct intel_digital_port *dig_port)
> > >  		return;
> > >  
> > >  	enabled = intel_display_power_is_enabled(i915,
> > > -						 tc_cold_get_power_domain(dig_port));
> > > +						 tc_cold_get_power_domain(dig_port,
> > > +									  dig_port->tc_mode));
> > >  	drm_WARN_ON(&i915->drm, !enabled);
> > >  }
> > >  
> > > @@ -634,7 +649,8 @@ void intel_tc_port_sanitize(struct intel_digital_port *dig_port)
> > >  
> > >  	drm_WARN_ON(&i915->drm, dig_port->tc_mode != TC_PORT_DISCONNECTED);
> > >  	if (active_links) {
> > > -		intel_wakeref_t tc_cold_wref = tc_cold_block(dig_port);
> > > +		enum intel_display_power_domain domain;
> > > +		intel_wakeref_t tc_cold_wref = tc_cold_block(dig_port, &domain);
> > >  
> > >  		dig_port->tc_mode = intel_tc_port_get_current_mode(dig_port);
> > >  
> > > @@ -644,7 +660,7 @@ void intel_tc_port_sanitize(struct intel_digital_port *dig_port)
> > >  				    dig_port->tc_port_name, active_links);
> > >  		intel_tc_port_link_init_refcount(dig_port, active_links);
> > >  
> > > -		tc_cold_unblock(dig_port, tc_cold_wref);
> > > +		tc_cold_unblock(dig_port, domain, tc_cold_wref);
> > >  	}
> > >  
> > >  	drm_dbg_kms(&i915->drm, "Port %s: sanitize mode (%s)\n",
> > > @@ -673,15 +689,16 @@ bool intel_tc_port_connected(struct intel_encoder *encoder)
> > >  {
> > >  	struct intel_digital_port *dig_port = enc_to_dig_port(encoder);
> > >  	bool is_connected;
> > > +	enum intel_display_power_domain domain;
> > >  	intel_wakeref_t tc_cold_wref;
> > >  
> > >  	intel_tc_port_lock(dig_port);
> > > -	tc_cold_wref = tc_cold_block(dig_port);
> > > +	tc_cold_wref = tc_cold_block(dig_port, &domain);
> > >  
> > >  	is_connected = tc_port_live_status_mask(dig_port) &
> > >  		       BIT(dig_port->tc_mode);
> > >  
> > > -	tc_cold_unblock(dig_port, tc_cold_wref);
> > > +	tc_cold_unblock(dig_port, domain, tc_cold_wref);
> > >  	intel_tc_port_unlock(dig_port);
> > >  
> > >  	return is_connected;
> > > @@ -698,15 +715,16 @@ static void __intel_tc_port_lock(struct intel_digital_port *dig_port,
> > >  	mutex_lock(&dig_port->tc_lock);
> > >  
> > >  	if (!dig_port->tc_link_refcount) {
> > > +		enum intel_display_power_domain domain;
> > >  		intel_wakeref_t tc_cold_wref;
> > >  
> > > -		tc_cold_wref = tc_cold_block(dig_port);
> > > +		tc_cold_wref = tc_cold_block(dig_port, &domain);
> > >  
> > >  		if (force_disconnect || intel_tc_port_needs_reset(dig_port))
> > >  			intel_tc_port_reset_mode(dig_port, required_lanes,
> > >  						 force_disconnect);
> > >  
> > > -		tc_cold_unblock(dig_port, tc_cold_wref);
> > > +		tc_cold_unblock(dig_port, domain, tc_cold_wref);
> > >  	}
> > >  
> > >  	drm_WARN_ON(&i915->drm, dig_port->tc_mode == TC_PORT_DISCONNECTED);
> > > @@ -775,6 +793,7 @@ void intel_tc_port_put_link(struct intel_digital_port *dig_port)
> > >  static bool
> > >  tc_has_modular_fia(struct drm_i915_private *i915, struct intel_digital_port *dig_port)
> > >  {
> > > +	enum intel_display_power_domain domain;
> > >  	intel_wakeref_t wakeref;
> > >  	u32 val;
> > >  
> > > @@ -782,9 +801,9 @@ tc_has_modular_fia(struct drm_i915_private *i915, struct intel_digital_port *dig
> > >  		return false;
> > >  
> > >  	mutex_lock(&dig_port->tc_lock);
> > > -	wakeref = tc_cold_block(dig_port);
> > > +	wakeref = tc_cold_block(dig_port, &domain);
> > >  	val = intel_uncore_read(&i915->uncore, PORT_TX_DFLEXDPSP(FIA1));
> > > -	tc_cold_unblock(dig_port, wakeref);
> > > +	tc_cold_unblock(dig_port, domain, wakeref);
> > >  	mutex_unlock(&dig_port->tc_lock);
> > >  
> > >  	drm_WARN_ON(&i915->drm, val == 0xffffffff);
> > > @@ -829,11 +848,3 @@ void intel_tc_port_init(struct intel_digital_port *dig_port, bool is_legacy)
> > >  	dig_port->tc_link_refcount = 0;
> > >  	tc_port_load_fia_params(i915, dig_port);
> > >  }
> > > -
> > > -bool intel_tc_cold_requires_aux_pw(struct intel_digital_port *dig_port)
> > > -{
> > > -	struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev);
> > > -
> > > -	return (DISPLAY_VER(i915) == 11 && dig_port->tc_legacy_port) ||
> > > -		IS_ALDERLAKE_P(i915);
> > > -}
> > 


^ permalink raw reply	[flat|nested] 72+ messages in thread

* Re: [Intel-gfx] [PATCH 08/13] drm/i915/tc: Refactor TC-cold block/unblock helpers
  2021-09-27 22:21       ` Souza, Jose
@ 2021-09-27 22:28         ` Imre Deak
  2021-09-27 23:33           ` Souza, Jose
  0 siblings, 1 reply; 72+ messages in thread
From: Imre Deak @ 2021-09-27 22:28 UTC (permalink / raw)
  To: Souza, Jose; +Cc: intel-gfx

On Tue, Sep 28, 2021 at 01:21:21AM +0300, Souza, Jose wrote:
> On Tue, 2021-09-28 at 01:13 +0300, Imre Deak wrote:
> > On Tue, Sep 28, 2021 at 12:56:24AM +0300, Souza, Jose wrote:
> > > On Tue, 2021-09-21 at 03:23 +0300, Imre Deak wrote:
> > > > A follow-up change will select the TC-cold blocking power domain based
> > > > on the TypeC mode, prepare for that here.
> > > > 
> > > > Also bring intel_tc_cold_requires_aux_pw() earlier to its logical place
> > > > for readability.
> > > > 
> > > > No functional change.
> > > > 
> > > > Cc: José Roberto de Souza <jose.souza@intel.com>
> > > > Signed-off-by: Imre Deak <imre.deak@intel.com>
> > > > ---
> > > >  .../drm/i915/display/intel_display_types.h    |  2 +
> > > >  drivers/gpu/drm/i915/display/intel_tc.c       | 63 +++++++++++--------
> > > >  2 files changed, 39 insertions(+), 26 deletions(-)
> > > > 
> > > > diff --git a/drivers/gpu/drm/i915/display/intel_display_types.h b/drivers/gpu/drm/i915/display/intel_display_types.h
> > > > index e9e806d90eec4..08a73ffded957 100644
> > > > --- a/drivers/gpu/drm/i915/display/intel_display_types.h
> > > > +++ b/drivers/gpu/drm/i915/display/intel_display_types.h
> > > > @@ -1663,8 +1663,10 @@ struct intel_digital_port {
> > > >  	enum intel_display_power_domain ddi_io_power_domain;
> > > >  	intel_wakeref_t ddi_io_wakeref;
> > > >  	intel_wakeref_t aux_wakeref;
> > > > +
> > > >  	struct mutex tc_lock;	/* protects the TypeC port mode */
> > > >  	intel_wakeref_t tc_lock_wakeref;
> > > > +	enum intel_display_power_domain tc_lock_power_domain;
> > > >  	int tc_link_refcount;
> > > >  	bool tc_legacy_port:1;
> > > >  	char tc_port_name[8];
> > > > diff --git a/drivers/gpu/drm/i915/display/intel_tc.c b/drivers/gpu/drm/i915/display/intel_tc.c
> > > > index 77b16a7c43466..24d2dc2e19a7d 100644
> > > > --- a/drivers/gpu/drm/i915/display/intel_tc.c
> > > > +++ b/drivers/gpu/drm/i915/display/intel_tc.c
> > > > @@ -48,8 +48,16 @@ bool intel_tc_port_in_legacy_mode(struct intel_digital_port *dig_port)
> > > >  	return intel_tc_port_in_mode(dig_port, TC_PORT_LEGACY);
> > > >  }
> > > >  
> > > > +bool intel_tc_cold_requires_aux_pw(struct intel_digital_port *dig_port)
> > > > +{
> > > > +	struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev);
> > > > +
> > > > +	return (DISPLAY_VER(i915) == 11 && dig_port->tc_legacy_port) ||
> > > > +		IS_ALDERLAKE_P(i915);
> > > > +}
> > > > +
> > > >  static enum intel_display_power_domain
> > > > -tc_cold_get_power_domain(struct intel_digital_port *dig_port)
> > > > +tc_cold_get_power_domain(struct intel_digital_port *dig_port, enum tc_port_mode mode)
> > > >  {
> > > >  	if (intel_tc_cold_requires_aux_pw(dig_port))
> > > >  		return intel_legacy_aux_to_power_domain(dig_port->aux_ch);
> > > > @@ -58,23 +66,30 @@ tc_cold_get_power_domain(struct intel_digital_port *dig_port)
> > > >  }
> > > >  
> > > >  static intel_wakeref_t
> > > > -tc_cold_block(struct intel_digital_port *dig_port)
> > > > +tc_cold_block_in_mode(struct intel_digital_port *dig_port, enum tc_port_mode mode,
> > > > +		      enum intel_display_power_domain *domain)
> > > >  {
> > > >  	struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev);
> > > > -	enum intel_display_power_domain domain;
> > > >  
> > > >  	if (DISPLAY_VER(i915) == 11 && !dig_port->tc_legacy_port)
> > > >  		return 0;
> > > >  
> > > > -	domain = tc_cold_get_power_domain(dig_port);
> > > > -	return intel_display_power_get(i915, domain);
> > > > +	*domain = tc_cold_get_power_domain(dig_port, mode);
> > > 
> > > I see problems with this approach.
> > > 
> > > If there is a TC alt-mode is connected and current software state is
> > > TBT or disconnected it will not get the power domain to exit TC cold,
> > > what could case invalid reads of registers.
> > 
> > If the mode needs to be changed, like in the above cases, the power
> > domain required to exit TC cold will be taken.
> 
> How?
> I see at least this 2 problematic cases.
> 
> intel_tc_port_sanitize()
> 	tc_cold_block(mode=TBT)

It's in disconnected mode at this point.

> 
> 	dig_port->tc_mode = intel_tc_port_get_current_mode(dig_port);
> 	...
> 
> 	tc_cold_unblock(dig_port, domain, tc_cold_wref);
> 
> Other case
> 
> intel_tc_port_connected()
> 
> 	tc_cold_block(mode=TBT)

Reading PORT_TX_DFLEXDPSP while in TC-cold returns 0xffffffff, and it's
handled when reading it (which is also required by the spec).

> 	is_connected = tc_port_live_status_mask(dig_port) &
> 		       BIT(dig_port->tc_mode);
> 
> 	tc_cold_unblock(dig_port, domain, tc_cold_wref);
> 
> 
> > 
> > > From the next patch commit message: 'For the ADL-P TBT mode the spec
> > > doesn't require blocking TC-cold by using the legacy AUX power
> > > domain'.
> > > 
> > > It is not required for TBT but when there is nothing connected,
> > > hardware is not in TBT mode so it can still get into TC cold.
> > 
> > If there is nothing connected the required power domain will be taken to
> > exit TC cold.
> > 
> > > > +
> > > > +	return intel_display_power_get(i915, *domain);
> > > > +}
> > > > +
> > > > +static intel_wakeref_t
> > > > +tc_cold_block(struct intel_digital_port *dig_port, enum intel_display_power_domain *domain)
> > > > +{
> > > > +	return tc_cold_block_in_mode(dig_port, dig_port->tc_mode, domain);
> > > >  }
> > > >  
> > > >  static void
> > > > -tc_cold_unblock(struct intel_digital_port *dig_port, intel_wakeref_t wakeref)
> > > > +tc_cold_unblock(struct intel_digital_port *dig_port, enum intel_display_power_domain domain,
> > > > +		intel_wakeref_t wakeref)
> > > >  {
> > > >  	struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev);
> > > > -	enum intel_display_power_domain domain;
> > > >  
> > > >  	/*
> > > >  	 * wakeref == -1, means some error happened saving save_depot_stack but
> > > > @@ -84,8 +99,7 @@ tc_cold_unblock(struct intel_digital_port *dig_port, intel_wakeref_t wakeref)
> > > >  	if (wakeref == 0)
> > > >  		return;
> > > >  
> > > > -	domain = tc_cold_get_power_domain(dig_port);
> > > > -	intel_display_power_put_async(i915, domain, wakeref);
> > > > +	intel_display_power_put(i915, domain, wakeref);
> > > >  }
> > > >  
> > > >  static void
> > > > @@ -98,7 +112,8 @@ assert_tc_cold_blocked(struct intel_digital_port *dig_port)
> > > >  		return;
> > > >  
> > > >  	enabled = intel_display_power_is_enabled(i915,
> > > > -						 tc_cold_get_power_domain(dig_port));
> > > > +						 tc_cold_get_power_domain(dig_port,
> > > > +									  dig_port->tc_mode));
> > > >  	drm_WARN_ON(&i915->drm, !enabled);
> > > >  }
> > > >  
> > > > @@ -634,7 +649,8 @@ void intel_tc_port_sanitize(struct intel_digital_port *dig_port)
> > > >  
> > > >  	drm_WARN_ON(&i915->drm, dig_port->tc_mode != TC_PORT_DISCONNECTED);
> > > >  	if (active_links) {
> > > > -		intel_wakeref_t tc_cold_wref = tc_cold_block(dig_port);
> > > > +		enum intel_display_power_domain domain;
> > > > +		intel_wakeref_t tc_cold_wref = tc_cold_block(dig_port, &domain);
> > > >  
> > > >  		dig_port->tc_mode = intel_tc_port_get_current_mode(dig_port);
> > > >  
> > > > @@ -644,7 +660,7 @@ void intel_tc_port_sanitize(struct intel_digital_port *dig_port)
> > > >  				    dig_port->tc_port_name, active_links);
> > > >  		intel_tc_port_link_init_refcount(dig_port, active_links);
> > > >  
> > > > -		tc_cold_unblock(dig_port, tc_cold_wref);
> > > > +		tc_cold_unblock(dig_port, domain, tc_cold_wref);
> > > >  	}
> > > >  
> > > >  	drm_dbg_kms(&i915->drm, "Port %s: sanitize mode (%s)\n",
> > > > @@ -673,15 +689,16 @@ bool intel_tc_port_connected(struct intel_encoder *encoder)
> > > >  {
> > > >  	struct intel_digital_port *dig_port = enc_to_dig_port(encoder);
> > > >  	bool is_connected;
> > > > +	enum intel_display_power_domain domain;
> > > >  	intel_wakeref_t tc_cold_wref;
> > > >  
> > > >  	intel_tc_port_lock(dig_port);
> > > > -	tc_cold_wref = tc_cold_block(dig_port);
> > > > +	tc_cold_wref = tc_cold_block(dig_port, &domain);
> > > >  
> > > >  	is_connected = tc_port_live_status_mask(dig_port) &
> > > >  		       BIT(dig_port->tc_mode);
> > > >  
> > > > -	tc_cold_unblock(dig_port, tc_cold_wref);
> > > > +	tc_cold_unblock(dig_port, domain, tc_cold_wref);
> > > >  	intel_tc_port_unlock(dig_port);
> > > >  
> > > >  	return is_connected;
> > > > @@ -698,15 +715,16 @@ static void __intel_tc_port_lock(struct intel_digital_port *dig_port,
> > > >  	mutex_lock(&dig_port->tc_lock);
> > > >  
> > > >  	if (!dig_port->tc_link_refcount) {
> > > > +		enum intel_display_power_domain domain;
> > > >  		intel_wakeref_t tc_cold_wref;
> > > >  
> > > > -		tc_cold_wref = tc_cold_block(dig_port);
> > > > +		tc_cold_wref = tc_cold_block(dig_port, &domain);
> > > >  
> > > >  		if (force_disconnect || intel_tc_port_needs_reset(dig_port))
> > > >  			intel_tc_port_reset_mode(dig_port, required_lanes,
> > > >  						 force_disconnect);
> > > >  
> > > > -		tc_cold_unblock(dig_port, tc_cold_wref);
> > > > +		tc_cold_unblock(dig_port, domain, tc_cold_wref);
> > > >  	}
> > > >  
> > > >  	drm_WARN_ON(&i915->drm, dig_port->tc_mode == TC_PORT_DISCONNECTED);
> > > > @@ -775,6 +793,7 @@ void intel_tc_port_put_link(struct intel_digital_port *dig_port)
> > > >  static bool
> > > >  tc_has_modular_fia(struct drm_i915_private *i915, struct intel_digital_port *dig_port)
> > > >  {
> > > > +	enum intel_display_power_domain domain;
> > > >  	intel_wakeref_t wakeref;
> > > >  	u32 val;
> > > >  
> > > > @@ -782,9 +801,9 @@ tc_has_modular_fia(struct drm_i915_private *i915, struct intel_digital_port *dig
> > > >  		return false;
> > > >  
> > > >  	mutex_lock(&dig_port->tc_lock);
> > > > -	wakeref = tc_cold_block(dig_port);
> > > > +	wakeref = tc_cold_block(dig_port, &domain);
> > > >  	val = intel_uncore_read(&i915->uncore, PORT_TX_DFLEXDPSP(FIA1));
> > > > -	tc_cold_unblock(dig_port, wakeref);
> > > > +	tc_cold_unblock(dig_port, domain, wakeref);
> > > >  	mutex_unlock(&dig_port->tc_lock);
> > > >  
> > > >  	drm_WARN_ON(&i915->drm, val == 0xffffffff);
> > > > @@ -829,11 +848,3 @@ void intel_tc_port_init(struct intel_digital_port *dig_port, bool is_legacy)
> > > >  	dig_port->tc_link_refcount = 0;
> > > >  	tc_port_load_fia_params(i915, dig_port);
> > > >  }
> > > > -
> > > > -bool intel_tc_cold_requires_aux_pw(struct intel_digital_port *dig_port)
> > > > -{
> > > > -	struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev);
> > > > -
> > > > -	return (DISPLAY_VER(i915) == 11 && dig_port->tc_legacy_port) ||
> > > > -		IS_ALDERLAKE_P(i915);
> > > > -}
> > > 
> 

^ permalink raw reply	[flat|nested] 72+ messages in thread

* Re: [Intel-gfx] [PATCH 08/13] drm/i915/tc: Refactor TC-cold block/unblock helpers
  2021-09-27 22:28         ` Imre Deak
@ 2021-09-27 23:33           ` Souza, Jose
  2021-09-27 23:51             ` Imre Deak
  0 siblings, 1 reply; 72+ messages in thread
From: Souza, Jose @ 2021-09-27 23:33 UTC (permalink / raw)
  To: Deak, Imre; +Cc: intel-gfx

On Tue, 2021-09-28 at 01:28 +0300, Imre Deak wrote:
> On Tue, Sep 28, 2021 at 01:21:21AM +0300, Souza, Jose wrote:
> > On Tue, 2021-09-28 at 01:13 +0300, Imre Deak wrote:
> > > On Tue, Sep 28, 2021 at 12:56:24AM +0300, Souza, Jose wrote:
> > > > On Tue, 2021-09-21 at 03:23 +0300, Imre Deak wrote:
> > > > > A follow-up change will select the TC-cold blocking power domain based
> > > > > on the TypeC mode, prepare for that here.
> > > > > 
> > > > > Also bring intel_tc_cold_requires_aux_pw() earlier to its logical place
> > > > > for readability.
> > > > > 
> > > > > No functional change.
> > > > > 
> > > > > Cc: José Roberto de Souza <jose.souza@intel.com>
> > > > > Signed-off-by: Imre Deak <imre.deak@intel.com>
> > > > > ---
> > > > >  .../drm/i915/display/intel_display_types.h    |  2 +
> > > > >  drivers/gpu/drm/i915/display/intel_tc.c       | 63 +++++++++++--------
> > > > >  2 files changed, 39 insertions(+), 26 deletions(-)
> > > > > 
> > > > > diff --git a/drivers/gpu/drm/i915/display/intel_display_types.h b/drivers/gpu/drm/i915/display/intel_display_types.h
> > > > > index e9e806d90eec4..08a73ffded957 100644
> > > > > --- a/drivers/gpu/drm/i915/display/intel_display_types.h
> > > > > +++ b/drivers/gpu/drm/i915/display/intel_display_types.h
> > > > > @@ -1663,8 +1663,10 @@ struct intel_digital_port {
> > > > >  	enum intel_display_power_domain ddi_io_power_domain;
> > > > >  	intel_wakeref_t ddi_io_wakeref;
> > > > >  	intel_wakeref_t aux_wakeref;
> > > > > +
> > > > >  	struct mutex tc_lock;	/* protects the TypeC port mode */
> > > > >  	intel_wakeref_t tc_lock_wakeref;
> > > > > +	enum intel_display_power_domain tc_lock_power_domain;
> > > > >  	int tc_link_refcount;
> > > > >  	bool tc_legacy_port:1;
> > > > >  	char tc_port_name[8];
> > > > > diff --git a/drivers/gpu/drm/i915/display/intel_tc.c b/drivers/gpu/drm/i915/display/intel_tc.c
> > > > > index 77b16a7c43466..24d2dc2e19a7d 100644
> > > > > --- a/drivers/gpu/drm/i915/display/intel_tc.c
> > > > > +++ b/drivers/gpu/drm/i915/display/intel_tc.c
> > > > > @@ -48,8 +48,16 @@ bool intel_tc_port_in_legacy_mode(struct intel_digital_port *dig_port)
> > > > >  	return intel_tc_port_in_mode(dig_port, TC_PORT_LEGACY);
> > > > >  }
> > > > >  
> > > > > +bool intel_tc_cold_requires_aux_pw(struct intel_digital_port *dig_port)
> > > > > +{
> > > > > +	struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev);
> > > > > +
> > > > > +	return (DISPLAY_VER(i915) == 11 && dig_port->tc_legacy_port) ||
> > > > > +		IS_ALDERLAKE_P(i915);
> > > > > +}
> > > > > +
> > > > >  static enum intel_display_power_domain
> > > > > -tc_cold_get_power_domain(struct intel_digital_port *dig_port)
> > > > > +tc_cold_get_power_domain(struct intel_digital_port *dig_port, enum tc_port_mode mode)
> > > > >  {
> > > > >  	if (intel_tc_cold_requires_aux_pw(dig_port))
> > > > >  		return intel_legacy_aux_to_power_domain(dig_port->aux_ch);
> > > > > @@ -58,23 +66,30 @@ tc_cold_get_power_domain(struct intel_digital_port *dig_port)
> > > > >  }
> > > > >  
> > > > >  static intel_wakeref_t
> > > > > -tc_cold_block(struct intel_digital_port *dig_port)
> > > > > +tc_cold_block_in_mode(struct intel_digital_port *dig_port, enum tc_port_mode mode,
> > > > > +		      enum intel_display_power_domain *domain)
> > > > >  {
> > > > >  	struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev);
> > > > > -	enum intel_display_power_domain domain;
> > > > >  
> > > > >  	if (DISPLAY_VER(i915) == 11 && !dig_port->tc_legacy_port)
> > > > >  		return 0;
> > > > >  
> > > > > -	domain = tc_cold_get_power_domain(dig_port);
> > > > > -	return intel_display_power_get(i915, domain);
> > > > > +	*domain = tc_cold_get_power_domain(dig_port, mode);
> > > > 
> > > > I see problems with this approach.
> > > > 
> > > > If there is a TC alt-mode is connected and current software state is
> > > > TBT or disconnected it will not get the power domain to exit TC cold,
> > > > what could case invalid reads of registers.
> > > 
> > > If the mode needs to be changed, like in the above cases, the power
> > > domain required to exit TC cold will be taken.
> > 
> > How?
> > I see at least this 2 problematic cases.
> > 
> > intel_tc_port_sanitize()
> > 	tc_cold_block(mode=TBT)
> 
> It's in disconnected mode at this point.

Okay.

> 
> > 
> > 	dig_port->tc_mode = intel_tc_port_get_current_mode(dig_port);
> > 	...
> > 
> > 	tc_cold_unblock(dig_port, domain, tc_cold_wref);
> > 
> > Other case
> > 
> > intel_tc_port_connected()
> > 
> > 	tc_cold_block(mode=TBT)
> 
> Reading PORT_TX_DFLEXDPSP while in TC-cold returns 0xffffffff, and it's
> handled when reading it (which is also required by the spec).

Will only follow adl-p flow for this example, https://pastebin.com/raw/TVXdK1Et (pastebin just to make sure indentation is not lost between email
clients)

> 
> > 	is_connected = tc_port_live_status_mask(dig_port) &
> > 		       BIT(dig_port->tc_mode);
> > 
> > 	tc_cold_unblock(dig_port, domain, tc_cold_wref);
> > 
> > 
> > > 
> > > > From the next patch commit message: 'For the ADL-P TBT mode the spec
> > > > doesn't require blocking TC-cold by using the legacy AUX power
> > > > domain'.
> > > > 
> > > > It is not required for TBT but when there is nothing connected,
> > > > hardware is not in TBT mode so it can still get into TC cold.
> > > 
> > > If there is nothing connected the required power domain will be taken to
> > > exit TC cold.
> > > 
> > > > > +
> > > > > +	return intel_display_power_get(i915, *domain);
> > > > > +}
> > > > > +
> > > > > +static intel_wakeref_t
> > > > > +tc_cold_block(struct intel_digital_port *dig_port, enum intel_display_power_domain *domain)
> > > > > +{
> > > > > +	return tc_cold_block_in_mode(dig_port, dig_port->tc_mode, domain);
> > > > >  }
> > > > >  
> > > > >  static void
> > > > > -tc_cold_unblock(struct intel_digital_port *dig_port, intel_wakeref_t wakeref)
> > > > > +tc_cold_unblock(struct intel_digital_port *dig_port, enum intel_display_power_domain domain,
> > > > > +		intel_wakeref_t wakeref)
> > > > >  {
> > > > >  	struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev);
> > > > > -	enum intel_display_power_domain domain;
> > > > >  
> > > > >  	/*
> > > > >  	 * wakeref == -1, means some error happened saving save_depot_stack but
> > > > > @@ -84,8 +99,7 @@ tc_cold_unblock(struct intel_digital_port *dig_port, intel_wakeref_t wakeref)
> > > > >  	if (wakeref == 0)
> > > > >  		return;
> > > > >  
> > > > > -	domain = tc_cold_get_power_domain(dig_port);
> > > > > -	intel_display_power_put_async(i915, domain, wakeref);
> > > > > +	intel_display_power_put(i915, domain, wakeref);
> > > > >  }
> > > > >  
> > > > >  static void
> > > > > @@ -98,7 +112,8 @@ assert_tc_cold_blocked(struct intel_digital_port *dig_port)
> > > > >  		return;
> > > > >  
> > > > >  	enabled = intel_display_power_is_enabled(i915,
> > > > > -						 tc_cold_get_power_domain(dig_port));
> > > > > +						 tc_cold_get_power_domain(dig_port,
> > > > > +									  dig_port->tc_mode));
> > > > >  	drm_WARN_ON(&i915->drm, !enabled);
> > > > >  }
> > > > >  
> > > > > @@ -634,7 +649,8 @@ void intel_tc_port_sanitize(struct intel_digital_port *dig_port)
> > > > >  
> > > > >  	drm_WARN_ON(&i915->drm, dig_port->tc_mode != TC_PORT_DISCONNECTED);
> > > > >  	if (active_links) {
> > > > > -		intel_wakeref_t tc_cold_wref = tc_cold_block(dig_port);
> > > > > +		enum intel_display_power_domain domain;
> > > > > +		intel_wakeref_t tc_cold_wref = tc_cold_block(dig_port, &domain);
> > > > >  
> > > > >  		dig_port->tc_mode = intel_tc_port_get_current_mode(dig_port);
> > > > >  
> > > > > @@ -644,7 +660,7 @@ void intel_tc_port_sanitize(struct intel_digital_port *dig_port)
> > > > >  				    dig_port->tc_port_name, active_links);
> > > > >  		intel_tc_port_link_init_refcount(dig_port, active_links);
> > > > >  
> > > > > -		tc_cold_unblock(dig_port, tc_cold_wref);
> > > > > +		tc_cold_unblock(dig_port, domain, tc_cold_wref);
> > > > >  	}
> > > > >  
> > > > >  	drm_dbg_kms(&i915->drm, "Port %s: sanitize mode (%s)\n",
> > > > > @@ -673,15 +689,16 @@ bool intel_tc_port_connected(struct intel_encoder *encoder)
> > > > >  {
> > > > >  	struct intel_digital_port *dig_port = enc_to_dig_port(encoder);
> > > > >  	bool is_connected;
> > > > > +	enum intel_display_power_domain domain;
> > > > >  	intel_wakeref_t tc_cold_wref;
> > > > >  
> > > > >  	intel_tc_port_lock(dig_port);
> > > > > -	tc_cold_wref = tc_cold_block(dig_port);
> > > > > +	tc_cold_wref = tc_cold_block(dig_port, &domain);
> > > > >  
> > > > >  	is_connected = tc_port_live_status_mask(dig_port) &
> > > > >  		       BIT(dig_port->tc_mode);
> > > > >  
> > > > > -	tc_cold_unblock(dig_port, tc_cold_wref);
> > > > > +	tc_cold_unblock(dig_port, domain, tc_cold_wref);
> > > > >  	intel_tc_port_unlock(dig_port);
> > > > >  
> > > > >  	return is_connected;
> > > > > @@ -698,15 +715,16 @@ static void __intel_tc_port_lock(struct intel_digital_port *dig_port,
> > > > >  	mutex_lock(&dig_port->tc_lock);
> > > > >  
> > > > >  	if (!dig_port->tc_link_refcount) {
> > > > > +		enum intel_display_power_domain domain;
> > > > >  		intel_wakeref_t tc_cold_wref;
> > > > >  
> > > > > -		tc_cold_wref = tc_cold_block(dig_port);
> > > > > +		tc_cold_wref = tc_cold_block(dig_port, &domain);
> > > > >  
> > > > >  		if (force_disconnect || intel_tc_port_needs_reset(dig_port))
> > > > >  			intel_tc_port_reset_mode(dig_port, required_lanes,
> > > > >  						 force_disconnect);
> > > > >  
> > > > > -		tc_cold_unblock(dig_port, tc_cold_wref);
> > > > > +		tc_cold_unblock(dig_port, domain, tc_cold_wref);
> > > > >  	}
> > > > >  
> > > > >  	drm_WARN_ON(&i915->drm, dig_port->tc_mode == TC_PORT_DISCONNECTED);
> > > > > @@ -775,6 +793,7 @@ void intel_tc_port_put_link(struct intel_digital_port *dig_port)
> > > > >  static bool
> > > > >  tc_has_modular_fia(struct drm_i915_private *i915, struct intel_digital_port *dig_port)
> > > > >  {
> > > > > +	enum intel_display_power_domain domain;
> > > > >  	intel_wakeref_t wakeref;
> > > > >  	u32 val;
> > > > >  
> > > > > @@ -782,9 +801,9 @@ tc_has_modular_fia(struct drm_i915_private *i915, struct intel_digital_port *dig
> > > > >  		return false;
> > > > >  
> > > > >  	mutex_lock(&dig_port->tc_lock);
> > > > > -	wakeref = tc_cold_block(dig_port);
> > > > > +	wakeref = tc_cold_block(dig_port, &domain);
> > > > >  	val = intel_uncore_read(&i915->uncore, PORT_TX_DFLEXDPSP(FIA1));
> > > > > -	tc_cold_unblock(dig_port, wakeref);
> > > > > +	tc_cold_unblock(dig_port, domain, wakeref);
> > > > >  	mutex_unlock(&dig_port->tc_lock);
> > > > >  
> > > > >  	drm_WARN_ON(&i915->drm, val == 0xffffffff);
> > > > > @@ -829,11 +848,3 @@ void intel_tc_port_init(struct intel_digital_port *dig_port, bool is_legacy)
> > > > >  	dig_port->tc_link_refcount = 0;
> > > > >  	tc_port_load_fia_params(i915, dig_port);
> > > > >  }
> > > > > -
> > > > > -bool intel_tc_cold_requires_aux_pw(struct intel_digital_port *dig_port)
> > > > > -{
> > > > > -	struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev);
> > > > > -
> > > > > -	return (DISPLAY_VER(i915) == 11 && dig_port->tc_legacy_port) ||
> > > > > -		IS_ALDERLAKE_P(i915);
> > > > > -}
> > > > 
> > 


^ permalink raw reply	[flat|nested] 72+ messages in thread

* Re: [Intel-gfx] [PATCH 08/13] drm/i915/tc: Refactor TC-cold block/unblock helpers
  2021-09-27 23:33           ` Souza, Jose
@ 2021-09-27 23:51             ` Imre Deak
  2021-09-28  0:14               ` Souza, Jose
  0 siblings, 1 reply; 72+ messages in thread
From: Imre Deak @ 2021-09-27 23:51 UTC (permalink / raw)
  To: Souza, Jose; +Cc: intel-gfx

On Tue, Sep 28, 2021 at 02:33:27AM +0300, Souza, Jose wrote:
> On Tue, 2021-09-28 at 01:28 +0300, Imre Deak wrote:
> > On Tue, Sep 28, 2021 at 01:21:21AM +0300, Souza, Jose wrote:
> > > On Tue, 2021-09-28 at 01:13 +0300, Imre Deak wrote:
> > > > On Tue, Sep 28, 2021 at 12:56:24AM +0300, Souza, Jose wrote:
> > > > > On Tue, 2021-09-21 at 03:23 +0300, Imre Deak wrote:
> > > > > > A follow-up change will select the TC-cold blocking power domain based
> > > > > > on the TypeC mode, prepare for that here.
> > > > > > 
> > > > > > Also bring intel_tc_cold_requires_aux_pw() earlier to its logical place
> > > > > > for readability.
> > > > > > 
> > > > > > No functional change.
> > > > > > 
> > > > > > Cc: José Roberto de Souza <jose.souza@intel.com>
> > > > > > Signed-off-by: Imre Deak <imre.deak@intel.com>
> > > > > > ---
> > > > > >  .../drm/i915/display/intel_display_types.h    |  2 +
> > > > > >  drivers/gpu/drm/i915/display/intel_tc.c       | 63 +++++++++++--------
> > > > > >  2 files changed, 39 insertions(+), 26 deletions(-)
> > > > > > 
> > > > > > diff --git a/drivers/gpu/drm/i915/display/intel_display_types.h b/drivers/gpu/drm/i915/display/intel_display_types.h
> > > > > > index e9e806d90eec4..08a73ffded957 100644
> > > > > > --- a/drivers/gpu/drm/i915/display/intel_display_types.h
> > > > > > +++ b/drivers/gpu/drm/i915/display/intel_display_types.h
> > > > > > @@ -1663,8 +1663,10 @@ struct intel_digital_port {
> > > > > >  	enum intel_display_power_domain ddi_io_power_domain;
> > > > > >  	intel_wakeref_t ddi_io_wakeref;
> > > > > >  	intel_wakeref_t aux_wakeref;
> > > > > > +
> > > > > >  	struct mutex tc_lock;	/* protects the TypeC port mode */
> > > > > >  	intel_wakeref_t tc_lock_wakeref;
> > > > > > +	enum intel_display_power_domain tc_lock_power_domain;
> > > > > >  	int tc_link_refcount;
> > > > > >  	bool tc_legacy_port:1;
> > > > > >  	char tc_port_name[8];
> > > > > > diff --git a/drivers/gpu/drm/i915/display/intel_tc.c b/drivers/gpu/drm/i915/display/intel_tc.c
> > > > > > index 77b16a7c43466..24d2dc2e19a7d 100644
> > > > > > --- a/drivers/gpu/drm/i915/display/intel_tc.c
> > > > > > +++ b/drivers/gpu/drm/i915/display/intel_tc.c
> > > > > > @@ -48,8 +48,16 @@ bool intel_tc_port_in_legacy_mode(struct intel_digital_port *dig_port)
> > > > > >  	return intel_tc_port_in_mode(dig_port, TC_PORT_LEGACY);
> > > > > >  }
> > > > > >  
> > > > > > +bool intel_tc_cold_requires_aux_pw(struct intel_digital_port *dig_port)
> > > > > > +{
> > > > > > +	struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev);
> > > > > > +
> > > > > > +	return (DISPLAY_VER(i915) == 11 && dig_port->tc_legacy_port) ||
> > > > > > +		IS_ALDERLAKE_P(i915);
> > > > > > +}
> > > > > > +
> > > > > >  static enum intel_display_power_domain
> > > > > > -tc_cold_get_power_domain(struct intel_digital_port *dig_port)
> > > > > > +tc_cold_get_power_domain(struct intel_digital_port *dig_port, enum tc_port_mode mode)
> > > > > >  {
> > > > > >  	if (intel_tc_cold_requires_aux_pw(dig_port))
> > > > > >  		return intel_legacy_aux_to_power_domain(dig_port->aux_ch);
> > > > > > @@ -58,23 +66,30 @@ tc_cold_get_power_domain(struct intel_digital_port *dig_port)
> > > > > >  }
> > > > > >  
> > > > > >  static intel_wakeref_t
> > > > > > -tc_cold_block(struct intel_digital_port *dig_port)
> > > > > > +tc_cold_block_in_mode(struct intel_digital_port *dig_port, enum tc_port_mode mode,
> > > > > > +		      enum intel_display_power_domain *domain)
> > > > > >  {
> > > > > >  	struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev);
> > > > > > -	enum intel_display_power_domain domain;
> > > > > >  
> > > > > >  	if (DISPLAY_VER(i915) == 11 && !dig_port->tc_legacy_port)
> > > > > >  		return 0;
> > > > > >  
> > > > > > -	domain = tc_cold_get_power_domain(dig_port);
> > > > > > -	return intel_display_power_get(i915, domain);
> > > > > > +	*domain = tc_cold_get_power_domain(dig_port, mode);
> > > > > 
> > > > > I see problems with this approach.
> > > > > 
> > > > > If there is a TC alt-mode is connected and current software state is
> > > > > TBT or disconnected it will not get the power domain to exit TC cold,
> > > > > what could case invalid reads of registers.
> > > > 
> > > > If the mode needs to be changed, like in the above cases, the power
> > > > domain required to exit TC cold will be taken.
> > > 
> > > How?
> > > I see at least this 2 problematic cases.
> > > 
> > > intel_tc_port_sanitize()
> > > 	tc_cold_block(mode=TBT)
> > 
> > It's in disconnected mode at this point.
> 
> Okay.
> 
> > 
> > > 
> > > 	dig_port->tc_mode = intel_tc_port_get_current_mode(dig_port);
> > > 	...
> > > 
> > > 	tc_cold_unblock(dig_port, domain, tc_cold_wref);
> > > 
> > > Other case
> > > 
> > > intel_tc_port_connected()
> > > 
> > > 	tc_cold_block(mode=TBT)
> > 
> > Reading PORT_TX_DFLEXDPSP while in TC-cold returns 0xffffffff, and it's
> > handled when reading it (which is also required by the spec).
> 
> Will only follow adl-p flow for this
> example, https://pastebin.com/raw/TVXdK1Et (pastebin just to make sure
> indentation is not lost between email clients)

TCSS_DDI_STATUS is in IOM (so neither a FIA or a PHY register). From Bspec 55480:
"""
Type-C Flow Registers Used by Display Software
...
Location          Register
IOM               TCSS_DDI_STATUS
"""

and IOM registers are accessible in TC-cold:

"""
TCCOLD
The type-C subsystem can enter the TCCOLD power saving state where FIA and type-C
PHY registers become inaccessible and respond to reads with all 1s data,
while IOM remains accessible. 
"""

> > > 		       BIT(dig_port->tc_mode);
> > > 
> > > 	tc_cold_unblock(dig_port, domain, tc_cold_wref);
> > > 
> > > 
> > > > 
> > > > > From the next patch commit message: 'For the ADL-P TBT mode the spec
> > > > > doesn't require blocking TC-cold by using the legacy AUX power
> > > > > domain'.
> > > > > 
> > > > > It is not required for TBT but when there is nothing connected,
> > > > > hardware is not in TBT mode so it can still get into TC cold.
> > > > 
> > > > If there is nothing connected the required power domain will be taken to
> > > > exit TC cold.
> > > > 
> > > > > > +
> > > > > > +	return intel_display_power_get(i915, *domain);
> > > > > > +}
> > > > > > +
> > > > > > +static intel_wakeref_t
> > > > > > +tc_cold_block(struct intel_digital_port *dig_port, enum intel_display_power_domain *domain)
> > > > > > +{
> > > > > > +	return tc_cold_block_in_mode(dig_port, dig_port->tc_mode, domain);
> > > > > >  }
> > > > > >  
> > > > > >  static void
> > > > > > -tc_cold_unblock(struct intel_digital_port *dig_port, intel_wakeref_t wakeref)
> > > > > > +tc_cold_unblock(struct intel_digital_port *dig_port, enum intel_display_power_domain domain,
> > > > > > +		intel_wakeref_t wakeref)
> > > > > >  {
> > > > > >  	struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev);
> > > > > > -	enum intel_display_power_domain domain;
> > > > > >  
> > > > > >  	/*
> > > > > >  	 * wakeref == -1, means some error happened saving save_depot_stack but
> > > > > > @@ -84,8 +99,7 @@ tc_cold_unblock(struct intel_digital_port *dig_port, intel_wakeref_t wakeref)
> > > > > >  	if (wakeref == 0)
> > > > > >  		return;
> > > > > >  
> > > > > > -	domain = tc_cold_get_power_domain(dig_port);
> > > > > > -	intel_display_power_put_async(i915, domain, wakeref);
> > > > > > +	intel_display_power_put(i915, domain, wakeref);
> > > > > >  }
> > > > > >  
> > > > > >  static void
> > > > > > @@ -98,7 +112,8 @@ assert_tc_cold_blocked(struct intel_digital_port *dig_port)
> > > > > >  		return;
> > > > > >  
> > > > > >  	enabled = intel_display_power_is_enabled(i915,
> > > > > > -						 tc_cold_get_power_domain(dig_port));
> > > > > > +						 tc_cold_get_power_domain(dig_port,
> > > > > > +									  dig_port->tc_mode));
> > > > > >  	drm_WARN_ON(&i915->drm, !enabled);
> > > > > >  }
> > > > > >  
> > > > > > @@ -634,7 +649,8 @@ void intel_tc_port_sanitize(struct intel_digital_port *dig_port)
> > > > > >  
> > > > > >  	drm_WARN_ON(&i915->drm, dig_port->tc_mode != TC_PORT_DISCONNECTED);
> > > > > >  	if (active_links) {
> > > > > > -		intel_wakeref_t tc_cold_wref = tc_cold_block(dig_port);
> > > > > > +		enum intel_display_power_domain domain;
> > > > > > +		intel_wakeref_t tc_cold_wref = tc_cold_block(dig_port, &domain);
> > > > > >  
> > > > > >  		dig_port->tc_mode = intel_tc_port_get_current_mode(dig_port);
> > > > > >  
> > > > > > @@ -644,7 +660,7 @@ void intel_tc_port_sanitize(struct intel_digital_port *dig_port)
> > > > > >  				    dig_port->tc_port_name, active_links);
> > > > > >  		intel_tc_port_link_init_refcount(dig_port, active_links);
> > > > > >  
> > > > > > -		tc_cold_unblock(dig_port, tc_cold_wref);
> > > > > > +		tc_cold_unblock(dig_port, domain, tc_cold_wref);
> > > > > >  	}
> > > > > >  
> > > > > >  	drm_dbg_kms(&i915->drm, "Port %s: sanitize mode (%s)\n",
> > > > > > @@ -673,15 +689,16 @@ bool intel_tc_port_connected(struct intel_encoder *encoder)
> > > > > >  {
> > > > > >  	struct intel_digital_port *dig_port = enc_to_dig_port(encoder);
> > > > > >  	bool is_connected;
> > > > > > +	enum intel_display_power_domain domain;
> > > > > >  	intel_wakeref_t tc_cold_wref;
> > > > > >  
> > > > > >  	intel_tc_port_lock(dig_port);
> > > > > > -	tc_cold_wref = tc_cold_block(dig_port);
> > > > > > +	tc_cold_wref = tc_cold_block(dig_port, &domain);
> > > > > >  
> > > > > >  	is_connected = tc_port_live_status_mask(dig_port) &
> > > > > >  		       BIT(dig_port->tc_mode);
> > > > > >  
> > > > > > -	tc_cold_unblock(dig_port, tc_cold_wref);
> > > > > > +	tc_cold_unblock(dig_port, domain, tc_cold_wref);
> > > > > >  	intel_tc_port_unlock(dig_port);
> > > > > >  
> > > > > >  	return is_connected;
> > > > > > @@ -698,15 +715,16 @@ static void __intel_tc_port_lock(struct intel_digital_port *dig_port,
> > > > > >  	mutex_lock(&dig_port->tc_lock);
> > > > > >  
> > > > > >  	if (!dig_port->tc_link_refcount) {
> > > > > > +		enum intel_display_power_domain domain;
> > > > > >  		intel_wakeref_t tc_cold_wref;
> > > > > >  
> > > > > > -		tc_cold_wref = tc_cold_block(dig_port);
> > > > > > +		tc_cold_wref = tc_cold_block(dig_port, &domain);
> > > > > >  
> > > > > >  		if (force_disconnect || intel_tc_port_needs_reset(dig_port))
> > > > > >  			intel_tc_port_reset_mode(dig_port, required_lanes,
> > > > > >  						 force_disconnect);
> > > > > >  
> > > > > > -		tc_cold_unblock(dig_port, tc_cold_wref);
> > > > > > +		tc_cold_unblock(dig_port, domain, tc_cold_wref);
> > > > > >  	}
> > > > > >  
> > > > > >  	drm_WARN_ON(&i915->drm, dig_port->tc_mode == TC_PORT_DISCONNECTED);
> > > > > > @@ -775,6 +793,7 @@ void intel_tc_port_put_link(struct intel_digital_port *dig_port)
> > > > > >  static bool
> > > > > >  tc_has_modular_fia(struct drm_i915_private *i915, struct intel_digital_port *dig_port)
> > > > > >  {
> > > > > > +	enum intel_display_power_domain domain;
> > > > > >  	intel_wakeref_t wakeref;
> > > > > >  	u32 val;
> > > > > >  
> > > > > > @@ -782,9 +801,9 @@ tc_has_modular_fia(struct drm_i915_private *i915, struct intel_digital_port *dig
> > > > > >  		return false;
> > > > > >  
> > > > > >  	mutex_lock(&dig_port->tc_lock);
> > > > > > -	wakeref = tc_cold_block(dig_port);
> > > > > > +	wakeref = tc_cold_block(dig_port, &domain);
> > > > > >  	val = intel_uncore_read(&i915->uncore, PORT_TX_DFLEXDPSP(FIA1));
> > > > > > -	tc_cold_unblock(dig_port, wakeref);
> > > > > > +	tc_cold_unblock(dig_port, domain, wakeref);
> > > > > >  	mutex_unlock(&dig_port->tc_lock);
> > > > > >  
> > > > > >  	drm_WARN_ON(&i915->drm, val == 0xffffffff);
> > > > > > @@ -829,11 +848,3 @@ void intel_tc_port_init(struct intel_digital_port *dig_port, bool is_legacy)
> > > > > >  	dig_port->tc_link_refcount = 0;
> > > > > >  	tc_port_load_fia_params(i915, dig_port);
> > > > > >  }
> > > > > > -
> > > > > > -bool intel_tc_cold_requires_aux_pw(struct intel_digital_port *dig_port)
> > > > > > -{
> > > > > > -	struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev);
> > > > > > -
> > > > > > -	return (DISPLAY_VER(i915) == 11 && dig_port->tc_legacy_port) ||
> > > > > > -		IS_ALDERLAKE_P(i915);
> > > > > > -}
> > > > > 
> > > 
> 

^ permalink raw reply	[flat|nested] 72+ messages in thread

* Re: [Intel-gfx] [PATCH 08/13] drm/i915/tc: Refactor TC-cold block/unblock helpers
  2021-09-27 23:51             ` Imre Deak
@ 2021-09-28  0:14               ` Souza, Jose
  2021-09-28  0:45                 ` Imre Deak
  0 siblings, 1 reply; 72+ messages in thread
From: Souza, Jose @ 2021-09-28  0:14 UTC (permalink / raw)
  To: Deak, Imre; +Cc: intel-gfx

On Tue, 2021-09-28 at 02:51 +0300, Imre Deak wrote:
> On Tue, Sep 28, 2021 at 02:33:27AM +0300, Souza, Jose wrote:
> > On Tue, 2021-09-28 at 01:28 +0300, Imre Deak wrote:
> > > On Tue, Sep 28, 2021 at 01:21:21AM +0300, Souza, Jose wrote:
> > > > On Tue, 2021-09-28 at 01:13 +0300, Imre Deak wrote:
> > > > > On Tue, Sep 28, 2021 at 12:56:24AM +0300, Souza, Jose wrote:
> > > > > > On Tue, 2021-09-21 at 03:23 +0300, Imre Deak wrote:
> > > > > > > A follow-up change will select the TC-cold blocking power domain based
> > > > > > > on the TypeC mode, prepare for that here.
> > > > > > > 
> > > > > > > Also bring intel_tc_cold_requires_aux_pw() earlier to its logical place
> > > > > > > for readability.
> > > > > > > 
> > > > > > > No functional change.
> > > > > > > 
> > > > > > > Cc: José Roberto de Souza <jose.souza@intel.com>
> > > > > > > Signed-off-by: Imre Deak <imre.deak@intel.com>
> > > > > > > ---
> > > > > > >  .../drm/i915/display/intel_display_types.h    |  2 +
> > > > > > >  drivers/gpu/drm/i915/display/intel_tc.c       | 63 +++++++++++--------
> > > > > > >  2 files changed, 39 insertions(+), 26 deletions(-)
> > > > > > > 
> > > > > > > diff --git a/drivers/gpu/drm/i915/display/intel_display_types.h b/drivers/gpu/drm/i915/display/intel_display_types.h
> > > > > > > index e9e806d90eec4..08a73ffded957 100644
> > > > > > > --- a/drivers/gpu/drm/i915/display/intel_display_types.h
> > > > > > > +++ b/drivers/gpu/drm/i915/display/intel_display_types.h
> > > > > > > @@ -1663,8 +1663,10 @@ struct intel_digital_port {
> > > > > > >  	enum intel_display_power_domain ddi_io_power_domain;
> > > > > > >  	intel_wakeref_t ddi_io_wakeref;
> > > > > > >  	intel_wakeref_t aux_wakeref;
> > > > > > > +
> > > > > > >  	struct mutex tc_lock;	/* protects the TypeC port mode */
> > > > > > >  	intel_wakeref_t tc_lock_wakeref;
> > > > > > > +	enum intel_display_power_domain tc_lock_power_domain;
> > > > > > >  	int tc_link_refcount;
> > > > > > >  	bool tc_legacy_port:1;
> > > > > > >  	char tc_port_name[8];
> > > > > > > diff --git a/drivers/gpu/drm/i915/display/intel_tc.c b/drivers/gpu/drm/i915/display/intel_tc.c
> > > > > > > index 77b16a7c43466..24d2dc2e19a7d 100644
> > > > > > > --- a/drivers/gpu/drm/i915/display/intel_tc.c
> > > > > > > +++ b/drivers/gpu/drm/i915/display/intel_tc.c
> > > > > > > @@ -48,8 +48,16 @@ bool intel_tc_port_in_legacy_mode(struct intel_digital_port *dig_port)
> > > > > > >  	return intel_tc_port_in_mode(dig_port, TC_PORT_LEGACY);
> > > > > > >  }
> > > > > > >  
> > > > > > > +bool intel_tc_cold_requires_aux_pw(struct intel_digital_port *dig_port)
> > > > > > > +{
> > > > > > > +	struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev);
> > > > > > > +
> > > > > > > +	return (DISPLAY_VER(i915) == 11 && dig_port->tc_legacy_port) ||
> > > > > > > +		IS_ALDERLAKE_P(i915);
> > > > > > > +}
> > > > > > > +
> > > > > > >  static enum intel_display_power_domain
> > > > > > > -tc_cold_get_power_domain(struct intel_digital_port *dig_port)
> > > > > > > +tc_cold_get_power_domain(struct intel_digital_port *dig_port, enum tc_port_mode mode)
> > > > > > >  {
> > > > > > >  	if (intel_tc_cold_requires_aux_pw(dig_port))
> > > > > > >  		return intel_legacy_aux_to_power_domain(dig_port->aux_ch);
> > > > > > > @@ -58,23 +66,30 @@ tc_cold_get_power_domain(struct intel_digital_port *dig_port)
> > > > > > >  }
> > > > > > >  
> > > > > > >  static intel_wakeref_t
> > > > > > > -tc_cold_block(struct intel_digital_port *dig_port)
> > > > > > > +tc_cold_block_in_mode(struct intel_digital_port *dig_port, enum tc_port_mode mode,
> > > > > > > +		      enum intel_display_power_domain *domain)
> > > > > > >  {
> > > > > > >  	struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev);
> > > > > > > -	enum intel_display_power_domain domain;
> > > > > > >  
> > > > > > >  	if (DISPLAY_VER(i915) == 11 && !dig_port->tc_legacy_port)
> > > > > > >  		return 0;
> > > > > > >  
> > > > > > > -	domain = tc_cold_get_power_domain(dig_port);
> > > > > > > -	return intel_display_power_get(i915, domain);
> > > > > > > +	*domain = tc_cold_get_power_domain(dig_port, mode);
> > > > > > 
> > > > > > I see problems with this approach.
> > > > > > 
> > > > > > If there is a TC alt-mode is connected and current software state is
> > > > > > TBT or disconnected it will not get the power domain to exit TC cold,
> > > > > > what could case invalid reads of registers.
> > > > > 
> > > > > If the mode needs to be changed, like in the above cases, the power
> > > > > domain required to exit TC cold will be taken.
> > > > 
> > > > How?
> > > > I see at least this 2 problematic cases.
> > > > 
> > > > intel_tc_port_sanitize()
> > > > 	tc_cold_block(mode=TBT)
> > > 
> > > It's in disconnected mode at this point.
> > 
> > Okay.
> > 
> > > 
> > > > 
> > > > 	dig_port->tc_mode = intel_tc_port_get_current_mode(dig_port);
> > > > 	...
> > > > 
> > > > 	tc_cold_unblock(dig_port, domain, tc_cold_wref);
> > > > 
> > > > Other case
> > > > 
> > > > intel_tc_port_connected()
> > > > 
> > > > 	tc_cold_block(mode=TBT)
> > > 
> > > Reading PORT_TX_DFLEXDPSP while in TC-cold returns 0xffffffff, and it's
> > > handled when reading it (which is also required by the spec).
> > 
> > Will only follow adl-p flow for this
> > example, https://pastebin.com/raw/TVXdK1Et (pastebin just to make sure
> > indentation is not lost between email clients)
> 
> TCSS_DDI_STATUS is in IOM (so neither a FIA or a PHY register). From Bspec 55480:
> """
> Type-C Flow Registers Used by Display Software
> ...
> Location          Register
> IOM               TCSS_DDI_STATUS
> """
> 
> and IOM registers are accessible in TC-cold:
> 
> """
> TCCOLD
> The type-C subsystem can enter the TCCOLD power saving state where FIA and type-C
> PHY registers become inaccessible and respond to reads with all 1s data,
> while IOM remains accessible. 

Ohh okay, maybe add some comments about the above.

For TGL taking POWER_DOMAIN_TC_COLD_OFF will solve everything.

What about ICL in legacy mode, when going from TC_PORT_TBT_ALT to TC_PORT_LEGACY.
Reading PORT_TX_DFLEXDPSP in icl_tc_port_live_status_mask() will set mask to BIT(TC_PORT_TBT_ALT) | BIT(TC_PORT_DP_ALT) | BIT(TC_PORT_LEGACY).

That would not be a problem if SDEISR bit for TC port is always set when in legacy mode.
Do you know what is the behavior here?
The handling for going from TC_PORT_DISCONNECTED to TC_PORT_LEGACY is properly handled.


> """
> 
> > > > 		       BIT(dig_port->tc_mode);
> > > > 
> > > > 	tc_cold_unblock(dig_port, domain, tc_cold_wref);
> > > > 
> > > > 
> > > > > 
> > > > > > From the next patch commit message: 'For the ADL-P TBT mode the spec
> > > > > > doesn't require blocking TC-cold by using the legacy AUX power
> > > > > > domain'.
> > > > > > 
> > > > > > It is not required for TBT but when there is nothing connected,
> > > > > > hardware is not in TBT mode so it can still get into TC cold.
> > > > > 
> > > > > If there is nothing connected the required power domain will be taken to
> > > > > exit TC cold.
> > > > > 
> > > > > > > +
> > > > > > > +	return intel_display_power_get(i915, *domain);
> > > > > > > +}
> > > > > > > +
> > > > > > > +static intel_wakeref_t
> > > > > > > +tc_cold_block(struct intel_digital_port *dig_port, enum intel_display_power_domain *domain)
> > > > > > > +{
> > > > > > > +	return tc_cold_block_in_mode(dig_port, dig_port->tc_mode, domain);
> > > > > > >  }
> > > > > > >  
> > > > > > >  static void
> > > > > > > -tc_cold_unblock(struct intel_digital_port *dig_port, intel_wakeref_t wakeref)
> > > > > > > +tc_cold_unblock(struct intel_digital_port *dig_port, enum intel_display_power_domain domain,
> > > > > > > +		intel_wakeref_t wakeref)
> > > > > > >  {
> > > > > > >  	struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev);
> > > > > > > -	enum intel_display_power_domain domain;
> > > > > > >  
> > > > > > >  	/*
> > > > > > >  	 * wakeref == -1, means some error happened saving save_depot_stack but
> > > > > > > @@ -84,8 +99,7 @@ tc_cold_unblock(struct intel_digital_port *dig_port, intel_wakeref_t wakeref)
> > > > > > >  	if (wakeref == 0)
> > > > > > >  		return;
> > > > > > >  
> > > > > > > -	domain = tc_cold_get_power_domain(dig_port);
> > > > > > > -	intel_display_power_put_async(i915, domain, wakeref);
> > > > > > > +	intel_display_power_put(i915, domain, wakeref);
> > > > > > >  }
> > > > > > >  
> > > > > > >  static void
> > > > > > > @@ -98,7 +112,8 @@ assert_tc_cold_blocked(struct intel_digital_port *dig_port)
> > > > > > >  		return;
> > > > > > >  
> > > > > > >  	enabled = intel_display_power_is_enabled(i915,
> > > > > > > -						 tc_cold_get_power_domain(dig_port));
> > > > > > > +						 tc_cold_get_power_domain(dig_port,
> > > > > > > +									  dig_port->tc_mode));
> > > > > > >  	drm_WARN_ON(&i915->drm, !enabled);
> > > > > > >  }
> > > > > > >  
> > > > > > > @@ -634,7 +649,8 @@ void intel_tc_port_sanitize(struct intel_digital_port *dig_port)
> > > > > > >  
> > > > > > >  	drm_WARN_ON(&i915->drm, dig_port->tc_mode != TC_PORT_DISCONNECTED);
> > > > > > >  	if (active_links) {
> > > > > > > -		intel_wakeref_t tc_cold_wref = tc_cold_block(dig_port);
> > > > > > > +		enum intel_display_power_domain domain;
> > > > > > > +		intel_wakeref_t tc_cold_wref = tc_cold_block(dig_port, &domain);
> > > > > > >  
> > > > > > >  		dig_port->tc_mode = intel_tc_port_get_current_mode(dig_port);
> > > > > > >  
> > > > > > > @@ -644,7 +660,7 @@ void intel_tc_port_sanitize(struct intel_digital_port *dig_port)
> > > > > > >  				    dig_port->tc_port_name, active_links);
> > > > > > >  		intel_tc_port_link_init_refcount(dig_port, active_links);
> > > > > > >  
> > > > > > > -		tc_cold_unblock(dig_port, tc_cold_wref);
> > > > > > > +		tc_cold_unblock(dig_port, domain, tc_cold_wref);
> > > > > > >  	}
> > > > > > >  
> > > > > > >  	drm_dbg_kms(&i915->drm, "Port %s: sanitize mode (%s)\n",
> > > > > > > @@ -673,15 +689,16 @@ bool intel_tc_port_connected(struct intel_encoder *encoder)
> > > > > > >  {
> > > > > > >  	struct intel_digital_port *dig_port = enc_to_dig_port(encoder);
> > > > > > >  	bool is_connected;
> > > > > > > +	enum intel_display_power_domain domain;
> > > > > > >  	intel_wakeref_t tc_cold_wref;
> > > > > > >  
> > > > > > >  	intel_tc_port_lock(dig_port);
> > > > > > > -	tc_cold_wref = tc_cold_block(dig_port);
> > > > > > > +	tc_cold_wref = tc_cold_block(dig_port, &domain);
> > > > > > >  
> > > > > > >  	is_connected = tc_port_live_status_mask(dig_port) &
> > > > > > >  		       BIT(dig_port->tc_mode);
> > > > > > >  
> > > > > > > -	tc_cold_unblock(dig_port, tc_cold_wref);
> > > > > > > +	tc_cold_unblock(dig_port, domain, tc_cold_wref);
> > > > > > >  	intel_tc_port_unlock(dig_port);
> > > > > > >  
> > > > > > >  	return is_connected;
> > > > > > > @@ -698,15 +715,16 @@ static void __intel_tc_port_lock(struct intel_digital_port *dig_port,
> > > > > > >  	mutex_lock(&dig_port->tc_lock);
> > > > > > >  
> > > > > > >  	if (!dig_port->tc_link_refcount) {
> > > > > > > +		enum intel_display_power_domain domain;
> > > > > > >  		intel_wakeref_t tc_cold_wref;
> > > > > > >  
> > > > > > > -		tc_cold_wref = tc_cold_block(dig_port);
> > > > > > > +		tc_cold_wref = tc_cold_block(dig_port, &domain);
> > > > > > >  
> > > > > > >  		if (force_disconnect || intel_tc_port_needs_reset(dig_port))
> > > > > > >  			intel_tc_port_reset_mode(dig_port, required_lanes,
> > > > > > >  						 force_disconnect);
> > > > > > >  
> > > > > > > -		tc_cold_unblock(dig_port, tc_cold_wref);
> > > > > > > +		tc_cold_unblock(dig_port, domain, tc_cold_wref);
> > > > > > >  	}
> > > > > > >  
> > > > > > >  	drm_WARN_ON(&i915->drm, dig_port->tc_mode == TC_PORT_DISCONNECTED);
> > > > > > > @@ -775,6 +793,7 @@ void intel_tc_port_put_link(struct intel_digital_port *dig_port)
> > > > > > >  static bool
> > > > > > >  tc_has_modular_fia(struct drm_i915_private *i915, struct intel_digital_port *dig_port)
> > > > > > >  {
> > > > > > > +	enum intel_display_power_domain domain;
> > > > > > >  	intel_wakeref_t wakeref;
> > > > > > >  	u32 val;
> > > > > > >  
> > > > > > > @@ -782,9 +801,9 @@ tc_has_modular_fia(struct drm_i915_private *i915, struct intel_digital_port *dig
> > > > > > >  		return false;
> > > > > > >  
> > > > > > >  	mutex_lock(&dig_port->tc_lock);
> > > > > > > -	wakeref = tc_cold_block(dig_port);
> > > > > > > +	wakeref = tc_cold_block(dig_port, &domain);
> > > > > > >  	val = intel_uncore_read(&i915->uncore, PORT_TX_DFLEXDPSP(FIA1));
> > > > > > > -	tc_cold_unblock(dig_port, wakeref);
> > > > > > > +	tc_cold_unblock(dig_port, domain, wakeref);
> > > > > > >  	mutex_unlock(&dig_port->tc_lock);
> > > > > > >  
> > > > > > >  	drm_WARN_ON(&i915->drm, val == 0xffffffff);
> > > > > > > @@ -829,11 +848,3 @@ void intel_tc_port_init(struct intel_digital_port *dig_port, bool is_legacy)
> > > > > > >  	dig_port->tc_link_refcount = 0;
> > > > > > >  	tc_port_load_fia_params(i915, dig_port);
> > > > > > >  }
> > > > > > > -
> > > > > > > -bool intel_tc_cold_requires_aux_pw(struct intel_digital_port *dig_port)
> > > > > > > -{
> > > > > > > -	struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev);
> > > > > > > -
> > > > > > > -	return (DISPLAY_VER(i915) == 11 && dig_port->tc_legacy_port) ||
> > > > > > > -		IS_ALDERLAKE_P(i915);
> > > > > > > -}
> > > > > > 
> > > > 
> > 


^ permalink raw reply	[flat|nested] 72+ messages in thread

* Re: [Intel-gfx] [PATCH 08/13] drm/i915/tc: Refactor TC-cold block/unblock helpers
  2021-09-28  0:14               ` Souza, Jose
@ 2021-09-28  0:45                 ` Imre Deak
  2021-09-28  1:03                   ` Souza, Jose
  0 siblings, 1 reply; 72+ messages in thread
From: Imre Deak @ 2021-09-28  0:45 UTC (permalink / raw)
  To: Souza, Jose; +Cc: intel-gfx

On Tue, Sep 28, 2021 at 03:14:45AM +0300, Souza, Jose wrote:
> On Tue, 2021-09-28 at 02:51 +0300, Imre Deak wrote:
> > On Tue, Sep 28, 2021 at 02:33:27AM +0300, Souza, Jose wrote:
> > > On Tue, 2021-09-28 at 01:28 +0300, Imre Deak wrote:
> > > > On Tue, Sep 28, 2021 at 01:21:21AM +0300, Souza, Jose wrote:
> > > > > On Tue, 2021-09-28 at 01:13 +0300, Imre Deak wrote:
> > > > > > On Tue, Sep 28, 2021 at 12:56:24AM +0300, Souza, Jose wrote:
> > > > > > > On Tue, 2021-09-21 at 03:23 +0300, Imre Deak wrote:
> > > > > > > > A follow-up change will select the TC-cold blocking power domain based
> > > > > > > > on the TypeC mode, prepare for that here.
> > > > > > > > 
> > > > > > > > Also bring intel_tc_cold_requires_aux_pw() earlier to its logical place
> > > > > > > > for readability.
> > > > > > > > 
> > > > > > > > No functional change.
> > > > > > > > 
> > > > > > > > Cc: José Roberto de Souza <jose.souza@intel.com>
> > > > > > > > Signed-off-by: Imre Deak <imre.deak@intel.com>
> > > > > > > > ---
> > > > > > > >  .../drm/i915/display/intel_display_types.h    |  2 +
> > > > > > > >  drivers/gpu/drm/i915/display/intel_tc.c       | 63 +++++++++++--------
> > > > > > > >  2 files changed, 39 insertions(+), 26 deletions(-)
> > > > > > > > 
> > > > > > > > diff --git a/drivers/gpu/drm/i915/display/intel_display_types.h b/drivers/gpu/drm/i915/display/intel_display_types.h
> > > > > > > > index e9e806d90eec4..08a73ffded957 100644
> > > > > > > > --- a/drivers/gpu/drm/i915/display/intel_display_types.h
> > > > > > > > +++ b/drivers/gpu/drm/i915/display/intel_display_types.h
> > > > > > > > @@ -1663,8 +1663,10 @@ struct intel_digital_port {
> > > > > > > >  	enum intel_display_power_domain ddi_io_power_domain;
> > > > > > > >  	intel_wakeref_t ddi_io_wakeref;
> > > > > > > >  	intel_wakeref_t aux_wakeref;
> > > > > > > > +
> > > > > > > >  	struct mutex tc_lock;	/* protects the TypeC port mode */
> > > > > > > >  	intel_wakeref_t tc_lock_wakeref;
> > > > > > > > +	enum intel_display_power_domain tc_lock_power_domain;
> > > > > > > >  	int tc_link_refcount;
> > > > > > > >  	bool tc_legacy_port:1;
> > > > > > > >  	char tc_port_name[8];
> > > > > > > > diff --git a/drivers/gpu/drm/i915/display/intel_tc.c b/drivers/gpu/drm/i915/display/intel_tc.c
> > > > > > > > index 77b16a7c43466..24d2dc2e19a7d 100644
> > > > > > > > --- a/drivers/gpu/drm/i915/display/intel_tc.c
> > > > > > > > +++ b/drivers/gpu/drm/i915/display/intel_tc.c
> > > > > > > > @@ -48,8 +48,16 @@ bool intel_tc_port_in_legacy_mode(struct intel_digital_port *dig_port)
> > > > > > > >  	return intel_tc_port_in_mode(dig_port, TC_PORT_LEGACY);
> > > > > > > >  }
> > > > > > > >  
> > > > > > > > +bool intel_tc_cold_requires_aux_pw(struct intel_digital_port *dig_port)
> > > > > > > > +{
> > > > > > > > +	struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev);
> > > > > > > > +
> > > > > > > > +	return (DISPLAY_VER(i915) == 11 && dig_port->tc_legacy_port) ||
> > > > > > > > +		IS_ALDERLAKE_P(i915);
> > > > > > > > +}
> > > > > > > > +
> > > > > > > >  static enum intel_display_power_domain
> > > > > > > > -tc_cold_get_power_domain(struct intel_digital_port *dig_port)
> > > > > > > > +tc_cold_get_power_domain(struct intel_digital_port *dig_port, enum tc_port_mode mode)
> > > > > > > >  {
> > > > > > > >  	if (intel_tc_cold_requires_aux_pw(dig_port))
> > > > > > > >  		return intel_legacy_aux_to_power_domain(dig_port->aux_ch);
> > > > > > > > @@ -58,23 +66,30 @@ tc_cold_get_power_domain(struct intel_digital_port *dig_port)
> > > > > > > >  }
> > > > > > > >  
> > > > > > > >  static intel_wakeref_t
> > > > > > > > -tc_cold_block(struct intel_digital_port *dig_port)
> > > > > > > > +tc_cold_block_in_mode(struct intel_digital_port *dig_port, enum tc_port_mode mode,
> > > > > > > > +		      enum intel_display_power_domain *domain)
> > > > > > > >  {
> > > > > > > >  	struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev);
> > > > > > > > -	enum intel_display_power_domain domain;
> > > > > > > >  
> > > > > > > >  	if (DISPLAY_VER(i915) == 11 && !dig_port->tc_legacy_port)
> > > > > > > >  		return 0;
> > > > > > > >  
> > > > > > > > -	domain = tc_cold_get_power_domain(dig_port);
> > > > > > > > -	return intel_display_power_get(i915, domain);
> > > > > > > > +	*domain = tc_cold_get_power_domain(dig_port, mode);
> > > > > > > 
> > > > > > > I see problems with this approach.
> > > > > > > 
> > > > > > > If there is a TC alt-mode is connected and current software state is
> > > > > > > TBT or disconnected it will not get the power domain to exit TC cold,
> > > > > > > what could case invalid reads of registers.
> > > > > > 
> > > > > > If the mode needs to be changed, like in the above cases, the power
> > > > > > domain required to exit TC cold will be taken.
> > > > > 
> > > > > How?
> > > > > I see at least this 2 problematic cases.
> > > > > 
> > > > > intel_tc_port_sanitize()
> > > > > 	tc_cold_block(mode=TBT)
> > > > 
> > > > It's in disconnected mode at this point.
> > > 
> > > Okay.
> > > 
> > > > 
> > > > > 
> > > > > 	dig_port->tc_mode = intel_tc_port_get_current_mode(dig_port);
> > > > > 	...
> > > > > 
> > > > > 	tc_cold_unblock(dig_port, domain, tc_cold_wref);
> > > > > 
> > > > > Other case
> > > > > 
> > > > > intel_tc_port_connected()
> > > > > 
> > > > > 	tc_cold_block(mode=TBT)
> > > > 
> > > > Reading PORT_TX_DFLEXDPSP while in TC-cold returns 0xffffffff, and it's
> > > > handled when reading it (which is also required by the spec).
> > > 
> > > Will only follow adl-p flow for this
> > > example, https://pastebin.com/raw/TVXdK1Et (pastebin just to make sure
> > > indentation is not lost between email clients)
> > 
> > TCSS_DDI_STATUS is in IOM (so neither a FIA or a PHY register). From Bspec 55480:
> > """
> > Type-C Flow Registers Used by Display Software
> > ...
> > Location          Register
> > IOM               TCSS_DDI_STATUS
> > """
> > 
> > and IOM registers are accessible in TC-cold:
> > 
> > """
> > TCCOLD
> > The type-C subsystem can enter the TCCOLD power saving state where FIA and type-C
> > PHY registers become inaccessible and respond to reads with all 1s data,
> > while IOM remains accessible. 
> 
> Ohh okay, maybe add some comments about the above.

Ok, can add something to adl_tc_port_live_status_mask().

> For TGL taking POWER_DOMAIN_TC_COLD_OFF will solve everything.
> 
> What about ICL in legacy mode, when going from TC_PORT_TBT_ALT to
> TC_PORT_LEGACY.  Reading PORT_TX_DFLEXDPSP in icl_tc_port_live_status_mask()
> will set mask to BIT(TC_PORT_TBT_ALT) | BIT(TC_PORT_DP_ALT) | BIT(TC_PORT_LEGACY).

Yes on ICL, we don't have any way to block TC-cold in TBT mode (on
systems with TBT/DP-alt ports, there is no TC-cold blocking PUNIT
command in the firmwares). Hence we compare the reads against all 1s. 

In any case normally it's not possible to switch from TBT/DP-alt to
legacy, since legacy is fixed/hardwired.

> That would not be a problem if SDEISR bit for TC port is always set
> when in legacy mode.  Do you know what is the behavior here?

SDEISR is in the south display, so shouldn't be affected by TC-cold.

We could check this bit even if DFLEXDPSP returns all 1s, to account for
incorrect VBTs (and let tc_port_fixup_legacy_flag() fix things up). But
that would be for a follow-up since it's not handled in the current code
either.

> The handling for going from TC_PORT_DISCONNECTED to TC_PORT_LEGACY is properly handled.
> 
> 
> > """
> > 
> > > > > 		       BIT(dig_port->tc_mode);
> > > > > 
> > > > > 	tc_cold_unblock(dig_port, domain, tc_cold_wref);
> > > > > 
> > > > > 
> > > > > > 
> > > > > > > From the next patch commit message: 'For the ADL-P TBT mode the spec
> > > > > > > doesn't require blocking TC-cold by using the legacy AUX power
> > > > > > > domain'.
> > > > > > > 
> > > > > > > It is not required for TBT but when there is nothing connected,
> > > > > > > hardware is not in TBT mode so it can still get into TC cold.
> > > > > > 
> > > > > > If there is nothing connected the required power domain will be taken to
> > > > > > exit TC cold.
> > > > > > 
> > > > > > > > +
> > > > > > > > +	return intel_display_power_get(i915, *domain);
> > > > > > > > +}
> > > > > > > > +
> > > > > > > > +static intel_wakeref_t
> > > > > > > > +tc_cold_block(struct intel_digital_port *dig_port, enum intel_display_power_domain *domain)
> > > > > > > > +{
> > > > > > > > +	return tc_cold_block_in_mode(dig_port, dig_port->tc_mode, domain);
> > > > > > > >  }
> > > > > > > >  
> > > > > > > >  static void
> > > > > > > > -tc_cold_unblock(struct intel_digital_port *dig_port, intel_wakeref_t wakeref)
> > > > > > > > +tc_cold_unblock(struct intel_digital_port *dig_port, enum intel_display_power_domain domain,
> > > > > > > > +		intel_wakeref_t wakeref)
> > > > > > > >  {
> > > > > > > >  	struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev);
> > > > > > > > -	enum intel_display_power_domain domain;
> > > > > > > >  
> > > > > > > >  	/*
> > > > > > > >  	 * wakeref == -1, means some error happened saving save_depot_stack but
> > > > > > > > @@ -84,8 +99,7 @@ tc_cold_unblock(struct intel_digital_port *dig_port, intel_wakeref_t wakeref)
> > > > > > > >  	if (wakeref == 0)
> > > > > > > >  		return;
> > > > > > > >  
> > > > > > > > -	domain = tc_cold_get_power_domain(dig_port);
> > > > > > > > -	intel_display_power_put_async(i915, domain, wakeref);
> > > > > > > > +	intel_display_power_put(i915, domain, wakeref);
> > > > > > > >  }
> > > > > > > >  
> > > > > > > >  static void
> > > > > > > > @@ -98,7 +112,8 @@ assert_tc_cold_blocked(struct intel_digital_port *dig_port)
> > > > > > > >  		return;
> > > > > > > >  
> > > > > > > >  	enabled = intel_display_power_is_enabled(i915,
> > > > > > > > -						 tc_cold_get_power_domain(dig_port));
> > > > > > > > +						 tc_cold_get_power_domain(dig_port,
> > > > > > > > +									  dig_port->tc_mode));
> > > > > > > >  	drm_WARN_ON(&i915->drm, !enabled);
> > > > > > > >  }
> > > > > > > >  
> > > > > > > > @@ -634,7 +649,8 @@ void intel_tc_port_sanitize(struct intel_digital_port *dig_port)
> > > > > > > >  
> > > > > > > >  	drm_WARN_ON(&i915->drm, dig_port->tc_mode != TC_PORT_DISCONNECTED);
> > > > > > > >  	if (active_links) {
> > > > > > > > -		intel_wakeref_t tc_cold_wref = tc_cold_block(dig_port);
> > > > > > > > +		enum intel_display_power_domain domain;
> > > > > > > > +		intel_wakeref_t tc_cold_wref = tc_cold_block(dig_port, &domain);
> > > > > > > >  
> > > > > > > >  		dig_port->tc_mode = intel_tc_port_get_current_mode(dig_port);
> > > > > > > >  
> > > > > > > > @@ -644,7 +660,7 @@ void intel_tc_port_sanitize(struct intel_digital_port *dig_port)
> > > > > > > >  				    dig_port->tc_port_name, active_links);
> > > > > > > >  		intel_tc_port_link_init_refcount(dig_port, active_links);
> > > > > > > >  
> > > > > > > > -		tc_cold_unblock(dig_port, tc_cold_wref);
> > > > > > > > +		tc_cold_unblock(dig_port, domain, tc_cold_wref);
> > > > > > > >  	}
> > > > > > > >  
> > > > > > > >  	drm_dbg_kms(&i915->drm, "Port %s: sanitize mode (%s)\n",
> > > > > > > > @@ -673,15 +689,16 @@ bool intel_tc_port_connected(struct intel_encoder *encoder)
> > > > > > > >  {
> > > > > > > >  	struct intel_digital_port *dig_port = enc_to_dig_port(encoder);
> > > > > > > >  	bool is_connected;
> > > > > > > > +	enum intel_display_power_domain domain;
> > > > > > > >  	intel_wakeref_t tc_cold_wref;
> > > > > > > >  
> > > > > > > >  	intel_tc_port_lock(dig_port);
> > > > > > > > -	tc_cold_wref = tc_cold_block(dig_port);
> > > > > > > > +	tc_cold_wref = tc_cold_block(dig_port, &domain);
> > > > > > > >  
> > > > > > > >  	is_connected = tc_port_live_status_mask(dig_port) &
> > > > > > > >  		       BIT(dig_port->tc_mode);
> > > > > > > >  
> > > > > > > > -	tc_cold_unblock(dig_port, tc_cold_wref);
> > > > > > > > +	tc_cold_unblock(dig_port, domain, tc_cold_wref);
> > > > > > > >  	intel_tc_port_unlock(dig_port);
> > > > > > > >  
> > > > > > > >  	return is_connected;
> > > > > > > > @@ -698,15 +715,16 @@ static void __intel_tc_port_lock(struct intel_digital_port *dig_port,
> > > > > > > >  	mutex_lock(&dig_port->tc_lock);
> > > > > > > >  
> > > > > > > >  	if (!dig_port->tc_link_refcount) {
> > > > > > > > +		enum intel_display_power_domain domain;
> > > > > > > >  		intel_wakeref_t tc_cold_wref;
> > > > > > > >  
> > > > > > > > -		tc_cold_wref = tc_cold_block(dig_port);
> > > > > > > > +		tc_cold_wref = tc_cold_block(dig_port, &domain);
> > > > > > > >  
> > > > > > > >  		if (force_disconnect || intel_tc_port_needs_reset(dig_port))
> > > > > > > >  			intel_tc_port_reset_mode(dig_port, required_lanes,
> > > > > > > >  						 force_disconnect);
> > > > > > > >  
> > > > > > > > -		tc_cold_unblock(dig_port, tc_cold_wref);
> > > > > > > > +		tc_cold_unblock(dig_port, domain, tc_cold_wref);
> > > > > > > >  	}
> > > > > > > >  
> > > > > > > >  	drm_WARN_ON(&i915->drm, dig_port->tc_mode == TC_PORT_DISCONNECTED);
> > > > > > > > @@ -775,6 +793,7 @@ void intel_tc_port_put_link(struct intel_digital_port *dig_port)
> > > > > > > >  static bool
> > > > > > > >  tc_has_modular_fia(struct drm_i915_private *i915, struct intel_digital_port *dig_port)
> > > > > > > >  {
> > > > > > > > +	enum intel_display_power_domain domain;
> > > > > > > >  	intel_wakeref_t wakeref;
> > > > > > > >  	u32 val;
> > > > > > > >  
> > > > > > > > @@ -782,9 +801,9 @@ tc_has_modular_fia(struct drm_i915_private *i915, struct intel_digital_port *dig
> > > > > > > >  		return false;
> > > > > > > >  
> > > > > > > >  	mutex_lock(&dig_port->tc_lock);
> > > > > > > > -	wakeref = tc_cold_block(dig_port);
> > > > > > > > +	wakeref = tc_cold_block(dig_port, &domain);
> > > > > > > >  	val = intel_uncore_read(&i915->uncore, PORT_TX_DFLEXDPSP(FIA1));
> > > > > > > > -	tc_cold_unblock(dig_port, wakeref);
> > > > > > > > +	tc_cold_unblock(dig_port, domain, wakeref);
> > > > > > > >  	mutex_unlock(&dig_port->tc_lock);
> > > > > > > >  
> > > > > > > >  	drm_WARN_ON(&i915->drm, val == 0xffffffff);
> > > > > > > > @@ -829,11 +848,3 @@ void intel_tc_port_init(struct intel_digital_port *dig_port, bool is_legacy)
> > > > > > > >  	dig_port->tc_link_refcount = 0;
> > > > > > > >  	tc_port_load_fia_params(i915, dig_port);
> > > > > > > >  }
> > > > > > > > -
> > > > > > > > -bool intel_tc_cold_requires_aux_pw(struct intel_digital_port *dig_port)
> > > > > > > > -{
> > > > > > > > -	struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev);
> > > > > > > > -
> > > > > > > > -	return (DISPLAY_VER(i915) == 11 && dig_port->tc_legacy_port) ||
> > > > > > > > -		IS_ALDERLAKE_P(i915);
> > > > > > > > -}
> > > > > > > 
> > > > > 
> > > 
> 

^ permalink raw reply	[flat|nested] 72+ messages in thread

* Re: [Intel-gfx] [PATCH 08/13] drm/i915/tc: Refactor TC-cold block/unblock helpers
  2021-09-28  0:45                 ` Imre Deak
@ 2021-09-28  1:03                   ` Souza, Jose
  0 siblings, 0 replies; 72+ messages in thread
From: Souza, Jose @ 2021-09-28  1:03 UTC (permalink / raw)
  To: Deak, Imre; +Cc: intel-gfx

On Tue, 2021-09-28 at 03:45 +0300, Imre Deak wrote:
> On Tue, Sep 28, 2021 at 03:14:45AM +0300, Souza, Jose wrote:
> > On Tue, 2021-09-28 at 02:51 +0300, Imre Deak wrote:
> > > On Tue, Sep 28, 2021 at 02:33:27AM +0300, Souza, Jose wrote:
> > > > On Tue, 2021-09-28 at 01:28 +0300, Imre Deak wrote:
> > > > > On Tue, Sep 28, 2021 at 01:21:21AM +0300, Souza, Jose wrote:
> > > > > > On Tue, 2021-09-28 at 01:13 +0300, Imre Deak wrote:
> > > > > > > On Tue, Sep 28, 2021 at 12:56:24AM +0300, Souza, Jose wrote:
> > > > > > > > On Tue, 2021-09-21 at 03:23 +0300, Imre Deak wrote:
> > > > > > > > > A follow-up change will select the TC-cold blocking power domain based
> > > > > > > > > on the TypeC mode, prepare for that here.
> > > > > > > > > 
> > > > > > > > > Also bring intel_tc_cold_requires_aux_pw() earlier to its logical place
> > > > > > > > > for readability.
> > > > > > > > > 
> > > > > > > > > No functional change.
> > > > > > > > > 
> > > > > > > > > Cc: José Roberto de Souza <jose.souza@intel.com>
> > > > > > > > > Signed-off-by: Imre Deak <imre.deak@intel.com>
> > > > > > > > > ---
> > > > > > > > >  .../drm/i915/display/intel_display_types.h    |  2 +
> > > > > > > > >  drivers/gpu/drm/i915/display/intel_tc.c       | 63 +++++++++++--------
> > > > > > > > >  2 files changed, 39 insertions(+), 26 deletions(-)
> > > > > > > > > 
> > > > > > > > > diff --git a/drivers/gpu/drm/i915/display/intel_display_types.h b/drivers/gpu/drm/i915/display/intel_display_types.h
> > > > > > > > > index e9e806d90eec4..08a73ffded957 100644
> > > > > > > > > --- a/drivers/gpu/drm/i915/display/intel_display_types.h
> > > > > > > > > +++ b/drivers/gpu/drm/i915/display/intel_display_types.h
> > > > > > > > > @@ -1663,8 +1663,10 @@ struct intel_digital_port {
> > > > > > > > >  	enum intel_display_power_domain ddi_io_power_domain;
> > > > > > > > >  	intel_wakeref_t ddi_io_wakeref;
> > > > > > > > >  	intel_wakeref_t aux_wakeref;
> > > > > > > > > +
> > > > > > > > >  	struct mutex tc_lock;	/* protects the TypeC port mode */
> > > > > > > > >  	intel_wakeref_t tc_lock_wakeref;
> > > > > > > > > +	enum intel_display_power_domain tc_lock_power_domain;
> > > > > > > > >  	int tc_link_refcount;
> > > > > > > > >  	bool tc_legacy_port:1;
> > > > > > > > >  	char tc_port_name[8];
> > > > > > > > > diff --git a/drivers/gpu/drm/i915/display/intel_tc.c b/drivers/gpu/drm/i915/display/intel_tc.c
> > > > > > > > > index 77b16a7c43466..24d2dc2e19a7d 100644
> > > > > > > > > --- a/drivers/gpu/drm/i915/display/intel_tc.c
> > > > > > > > > +++ b/drivers/gpu/drm/i915/display/intel_tc.c
> > > > > > > > > @@ -48,8 +48,16 @@ bool intel_tc_port_in_legacy_mode(struct intel_digital_port *dig_port)
> > > > > > > > >  	return intel_tc_port_in_mode(dig_port, TC_PORT_LEGACY);
> > > > > > > > >  }
> > > > > > > > >  
> > > > > > > > > +bool intel_tc_cold_requires_aux_pw(struct intel_digital_port *dig_port)
> > > > > > > > > +{
> > > > > > > > > +	struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev);
> > > > > > > > > +
> > > > > > > > > +	return (DISPLAY_VER(i915) == 11 && dig_port->tc_legacy_port) ||
> > > > > > > > > +		IS_ALDERLAKE_P(i915);
> > > > > > > > > +}
> > > > > > > > > +
> > > > > > > > >  static enum intel_display_power_domain
> > > > > > > > > -tc_cold_get_power_domain(struct intel_digital_port *dig_port)
> > > > > > > > > +tc_cold_get_power_domain(struct intel_digital_port *dig_port, enum tc_port_mode mode)
> > > > > > > > >  {
> > > > > > > > >  	if (intel_tc_cold_requires_aux_pw(dig_port))
> > > > > > > > >  		return intel_legacy_aux_to_power_domain(dig_port->aux_ch);
> > > > > > > > > @@ -58,23 +66,30 @@ tc_cold_get_power_domain(struct intel_digital_port *dig_port)
> > > > > > > > >  }
> > > > > > > > >  
> > > > > > > > >  static intel_wakeref_t
> > > > > > > > > -tc_cold_block(struct intel_digital_port *dig_port)
> > > > > > > > > +tc_cold_block_in_mode(struct intel_digital_port *dig_port, enum tc_port_mode mode,
> > > > > > > > > +		      enum intel_display_power_domain *domain)
> > > > > > > > >  {
> > > > > > > > >  	struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev);
> > > > > > > > > -	enum intel_display_power_domain domain;
> > > > > > > > >  
> > > > > > > > >  	if (DISPLAY_VER(i915) == 11 && !dig_port->tc_legacy_port)
> > > > > > > > >  		return 0;
> > > > > > > > >  
> > > > > > > > > -	domain = tc_cold_get_power_domain(dig_port);
> > > > > > > > > -	return intel_display_power_get(i915, domain);
> > > > > > > > > +	*domain = tc_cold_get_power_domain(dig_port, mode);
> > > > > > > > 
> > > > > > > > I see problems with this approach.
> > > > > > > > 
> > > > > > > > If there is a TC alt-mode is connected and current software state is
> > > > > > > > TBT or disconnected it will not get the power domain to exit TC cold,
> > > > > > > > what could case invalid reads of registers.
> > > > > > > 
> > > > > > > If the mode needs to be changed, like in the above cases, the power
> > > > > > > domain required to exit TC cold will be taken.
> > > > > > 
> > > > > > How?
> > > > > > I see at least this 2 problematic cases.
> > > > > > 
> > > > > > intel_tc_port_sanitize()
> > > > > > 	tc_cold_block(mode=TBT)
> > > > > 
> > > > > It's in disconnected mode at this point.
> > > > 
> > > > Okay.
> > > > 
> > > > > 
> > > > > > 
> > > > > > 	dig_port->tc_mode = intel_tc_port_get_current_mode(dig_port);
> > > > > > 	...
> > > > > > 
> > > > > > 	tc_cold_unblock(dig_port, domain, tc_cold_wref);
> > > > > > 
> > > > > > Other case
> > > > > > 
> > > > > > intel_tc_port_connected()
> > > > > > 
> > > > > > 	tc_cold_block(mode=TBT)
> > > > > 
> > > > > Reading PORT_TX_DFLEXDPSP while in TC-cold returns 0xffffffff, and it's
> > > > > handled when reading it (which is also required by the spec).
> > > > 
> > > > Will only follow adl-p flow for this
> > > > example, https://pastebin.com/raw/TVXdK1Et (pastebin just to make sure
> > > > indentation is not lost between email clients)
> > > 
> > > TCSS_DDI_STATUS is in IOM (so neither a FIA or a PHY register). From Bspec 55480:
> > > """
> > > Type-C Flow Registers Used by Display Software
> > > ...
> > > Location          Register
> > > IOM               TCSS_DDI_STATUS
> > > """
> > > 
> > > and IOM registers are accessible in TC-cold:
> > > 
> > > """
> > > TCCOLD
> > > The type-C subsystem can enter the TCCOLD power saving state where FIA and type-C
> > > PHY registers become inaccessible and respond to reads with all 1s data,
> > > while IOM remains accessible. 
> > 
> > Ohh okay, maybe add some comments about the above.
> 
> Ok, can add something to adl_tc_port_live_status_mask().
> 
> > For TGL taking POWER_DOMAIN_TC_COLD_OFF will solve everything.
> > 
> > What about ICL in legacy mode, when going from TC_PORT_TBT_ALT to
> > TC_PORT_LEGACY.  Reading PORT_TX_DFLEXDPSP in icl_tc_port_live_status_mask()
> > will set mask to BIT(TC_PORT_TBT_ALT) | BIT(TC_PORT_DP_ALT) | BIT(TC_PORT_LEGACY).
> 
> Yes on ICL, we don't have any way to block TC-cold in TBT mode (on
> systems with TBT/DP-alt ports, there is no TC-cold blocking PUNIT
> command in the firmwares). Hence we compare the reads against all 1s. 
> 
> In any case normally it's not possible to switch from TBT/DP-alt to
> legacy, since legacy is fixed/hardwired.

Okay, with comment in adl_tc_port_live_status_mask().
Reviewed-by: José Roberto de Souza <jose.souza@intel.com>

> 
> > That would not be a problem if SDEISR bit for TC port is always set
> > when in legacy mode.  Do you know what is the behavior here?
> 
> SDEISR is in the south display, so shouldn't be affected by TC-cold.
> 
> We could check this bit even if DFLEXDPSP returns all 1s, to account for
> incorrect VBTs (and let tc_port_fixup_legacy_flag() fix things up). But
> that would be for a follow-up since it's not handled in the current code
> either.
> 
> > The handling for going from TC_PORT_DISCONNECTED to TC_PORT_LEGACY is properly handled.
> > 
> > 
> > > """
> > > 
> > > > > > 		       BIT(dig_port->tc_mode);
> > > > > > 
> > > > > > 	tc_cold_unblock(dig_port, domain, tc_cold_wref);
> > > > > > 
> > > > > > 
> > > > > > > 
> > > > > > > > From the next patch commit message: 'For the ADL-P TBT mode the spec
> > > > > > > > doesn't require blocking TC-cold by using the legacy AUX power
> > > > > > > > domain'.
> > > > > > > > 
> > > > > > > > It is not required for TBT but when there is nothing connected,
> > > > > > > > hardware is not in TBT mode so it can still get into TC cold.
> > > > > > > 
> > > > > > > If there is nothing connected the required power domain will be taken to
> > > > > > > exit TC cold.
> > > > > > > 
> > > > > > > > > +
> > > > > > > > > +	return intel_display_power_get(i915, *domain);
> > > > > > > > > +}
> > > > > > > > > +
> > > > > > > > > +static intel_wakeref_t
> > > > > > > > > +tc_cold_block(struct intel_digital_port *dig_port, enum intel_display_power_domain *domain)
> > > > > > > > > +{
> > > > > > > > > +	return tc_cold_block_in_mode(dig_port, dig_port->tc_mode, domain);
> > > > > > > > >  }
> > > > > > > > >  
> > > > > > > > >  static void
> > > > > > > > > -tc_cold_unblock(struct intel_digital_port *dig_port, intel_wakeref_t wakeref)
> > > > > > > > > +tc_cold_unblock(struct intel_digital_port *dig_port, enum intel_display_power_domain domain,
> > > > > > > > > +		intel_wakeref_t wakeref)
> > > > > > > > >  {
> > > > > > > > >  	struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev);
> > > > > > > > > -	enum intel_display_power_domain domain;
> > > > > > > > >  
> > > > > > > > >  	/*
> > > > > > > > >  	 * wakeref == -1, means some error happened saving save_depot_stack but
> > > > > > > > > @@ -84,8 +99,7 @@ tc_cold_unblock(struct intel_digital_port *dig_port, intel_wakeref_t wakeref)
> > > > > > > > >  	if (wakeref == 0)
> > > > > > > > >  		return;
> > > > > > > > >  
> > > > > > > > > -	domain = tc_cold_get_power_domain(dig_port);
> > > > > > > > > -	intel_display_power_put_async(i915, domain, wakeref);
> > > > > > > > > +	intel_display_power_put(i915, domain, wakeref);
> > > > > > > > >  }
> > > > > > > > >  
> > > > > > > > >  static void
> > > > > > > > > @@ -98,7 +112,8 @@ assert_tc_cold_blocked(struct intel_digital_port *dig_port)
> > > > > > > > >  		return;
> > > > > > > > >  
> > > > > > > > >  	enabled = intel_display_power_is_enabled(i915,
> > > > > > > > > -						 tc_cold_get_power_domain(dig_port));
> > > > > > > > > +						 tc_cold_get_power_domain(dig_port,
> > > > > > > > > +									  dig_port->tc_mode));
> > > > > > > > >  	drm_WARN_ON(&i915->drm, !enabled);
> > > > > > > > >  }
> > > > > > > > >  
> > > > > > > > > @@ -634,7 +649,8 @@ void intel_tc_port_sanitize(struct intel_digital_port *dig_port)
> > > > > > > > >  
> > > > > > > > >  	drm_WARN_ON(&i915->drm, dig_port->tc_mode != TC_PORT_DISCONNECTED);
> > > > > > > > >  	if (active_links) {
> > > > > > > > > -		intel_wakeref_t tc_cold_wref = tc_cold_block(dig_port);
> > > > > > > > > +		enum intel_display_power_domain domain;
> > > > > > > > > +		intel_wakeref_t tc_cold_wref = tc_cold_block(dig_port, &domain);
> > > > > > > > >  
> > > > > > > > >  		dig_port->tc_mode = intel_tc_port_get_current_mode(dig_port);
> > > > > > > > >  
> > > > > > > > > @@ -644,7 +660,7 @@ void intel_tc_port_sanitize(struct intel_digital_port *dig_port)
> > > > > > > > >  				    dig_port->tc_port_name, active_links);
> > > > > > > > >  		intel_tc_port_link_init_refcount(dig_port, active_links);
> > > > > > > > >  
> > > > > > > > > -		tc_cold_unblock(dig_port, tc_cold_wref);
> > > > > > > > > +		tc_cold_unblock(dig_port, domain, tc_cold_wref);
> > > > > > > > >  	}
> > > > > > > > >  
> > > > > > > > >  	drm_dbg_kms(&i915->drm, "Port %s: sanitize mode (%s)\n",
> > > > > > > > > @@ -673,15 +689,16 @@ bool intel_tc_port_connected(struct intel_encoder *encoder)
> > > > > > > > >  {
> > > > > > > > >  	struct intel_digital_port *dig_port = enc_to_dig_port(encoder);
> > > > > > > > >  	bool is_connected;
> > > > > > > > > +	enum intel_display_power_domain domain;
> > > > > > > > >  	intel_wakeref_t tc_cold_wref;
> > > > > > > > >  
> > > > > > > > >  	intel_tc_port_lock(dig_port);
> > > > > > > > > -	tc_cold_wref = tc_cold_block(dig_port);
> > > > > > > > > +	tc_cold_wref = tc_cold_block(dig_port, &domain);
> > > > > > > > >  
> > > > > > > > >  	is_connected = tc_port_live_status_mask(dig_port) &
> > > > > > > > >  		       BIT(dig_port->tc_mode);
> > > > > > > > >  
> > > > > > > > > -	tc_cold_unblock(dig_port, tc_cold_wref);
> > > > > > > > > +	tc_cold_unblock(dig_port, domain, tc_cold_wref);
> > > > > > > > >  	intel_tc_port_unlock(dig_port);
> > > > > > > > >  
> > > > > > > > >  	return is_connected;
> > > > > > > > > @@ -698,15 +715,16 @@ static void __intel_tc_port_lock(struct intel_digital_port *dig_port,
> > > > > > > > >  	mutex_lock(&dig_port->tc_lock);
> > > > > > > > >  
> > > > > > > > >  	if (!dig_port->tc_link_refcount) {
> > > > > > > > > +		enum intel_display_power_domain domain;
> > > > > > > > >  		intel_wakeref_t tc_cold_wref;
> > > > > > > > >  
> > > > > > > > > -		tc_cold_wref = tc_cold_block(dig_port);
> > > > > > > > > +		tc_cold_wref = tc_cold_block(dig_port, &domain);
> > > > > > > > >  
> > > > > > > > >  		if (force_disconnect || intel_tc_port_needs_reset(dig_port))
> > > > > > > > >  			intel_tc_port_reset_mode(dig_port, required_lanes,
> > > > > > > > >  						 force_disconnect);
> > > > > > > > >  
> > > > > > > > > -		tc_cold_unblock(dig_port, tc_cold_wref);
> > > > > > > > > +		tc_cold_unblock(dig_port, domain, tc_cold_wref);
> > > > > > > > >  	}
> > > > > > > > >  
> > > > > > > > >  	drm_WARN_ON(&i915->drm, dig_port->tc_mode == TC_PORT_DISCONNECTED);
> > > > > > > > > @@ -775,6 +793,7 @@ void intel_tc_port_put_link(struct intel_digital_port *dig_port)
> > > > > > > > >  static bool
> > > > > > > > >  tc_has_modular_fia(struct drm_i915_private *i915, struct intel_digital_port *dig_port)
> > > > > > > > >  {
> > > > > > > > > +	enum intel_display_power_domain domain;
> > > > > > > > >  	intel_wakeref_t wakeref;
> > > > > > > > >  	u32 val;
> > > > > > > > >  
> > > > > > > > > @@ -782,9 +801,9 @@ tc_has_modular_fia(struct drm_i915_private *i915, struct intel_digital_port *dig
> > > > > > > > >  		return false;
> > > > > > > > >  
> > > > > > > > >  	mutex_lock(&dig_port->tc_lock);
> > > > > > > > > -	wakeref = tc_cold_block(dig_port);
> > > > > > > > > +	wakeref = tc_cold_block(dig_port, &domain);
> > > > > > > > >  	val = intel_uncore_read(&i915->uncore, PORT_TX_DFLEXDPSP(FIA1));
> > > > > > > > > -	tc_cold_unblock(dig_port, wakeref);
> > > > > > > > > +	tc_cold_unblock(dig_port, domain, wakeref);
> > > > > > > > >  	mutex_unlock(&dig_port->tc_lock);
> > > > > > > > >  
> > > > > > > > >  	drm_WARN_ON(&i915->drm, val == 0xffffffff);
> > > > > > > > > @@ -829,11 +848,3 @@ void intel_tc_port_init(struct intel_digital_port *dig_port, bool is_legacy)
> > > > > > > > >  	dig_port->tc_link_refcount = 0;
> > > > > > > > >  	tc_port_load_fia_params(i915, dig_port);
> > > > > > > > >  }
> > > > > > > > > -
> > > > > > > > > -bool intel_tc_cold_requires_aux_pw(struct intel_digital_port *dig_port)
> > > > > > > > > -{
> > > > > > > > > -	struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev);
> > > > > > > > > -
> > > > > > > > > -	return (DISPLAY_VER(i915) == 11 && dig_port->tc_legacy_port) ||
> > > > > > > > > -		IS_ALDERLAKE_P(i915);
> > > > > > > > > -}
> > > > > > > > 
> > > > > > 
> > > > 
> > 


^ permalink raw reply	[flat|nested] 72+ messages in thread

* Re: [Intel-gfx] [PATCH 10/13] drm/i915/icl/tc: Remove the ICL special casing during TC-cold blocking
  2021-09-27 22:02   ` Souza, Jose
@ 2021-09-28 10:52     ` Imre Deak
  2021-09-28 20:50       ` Souza, Jose
  0 siblings, 1 reply; 72+ messages in thread
From: Imre Deak @ 2021-09-28 10:52 UTC (permalink / raw)
  To: Souza, Jose; +Cc: intel-gfx

On Tue, Sep 28, 2021 at 01:02:21AM +0300, Souza, Jose wrote:
> On Tue, 2021-09-21 at 03:23 +0300, Imre Deak wrote:
> > While a TypeC port mode is locked a DISPLAY_CORE power domain reference
> > is held, which implies a runtime PM ref. By removing the ICL !legacy
> > port special casing, a TC_COLD_OFF power domain reference will be taken
> > for such ports, which also translates to a runtime PM ref on that
> > platform. A follow-up change will stop holding the DISPLAY_CORE power
> > domain while the port is locked.
> 
> This should be squashed to 'drm/i915/tc: Refactor TC-cold
> block/unblock helpers' otherwise domain is not initialized for this
> case.

domain is always only valid with a non-zero wakeref, so no need to init
domain if the returned wakeref is zero.

> > Cc: José Roberto de Souza <jose.souza@intel.com>
> > Signed-off-by: Imre Deak <imre.deak@intel.com>
> > ---
> >  drivers/gpu/drm/i915/display/intel_tc.c | 6 ------
> >  1 file changed, 6 deletions(-)
> > 
> > diff --git a/drivers/gpu/drm/i915/display/intel_tc.c b/drivers/gpu/drm/i915/display/intel_tc.c
> > index b2a3d297bfc19..8d799cf7ccefd 100644
> > --- a/drivers/gpu/drm/i915/display/intel_tc.c
> > +++ b/drivers/gpu/drm/i915/display/intel_tc.c
> > @@ -71,9 +71,6 @@ tc_cold_block_in_mode(struct intel_digital_port *dig_port, enum tc_port_mode mod
> >  {
> >  	struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev);
> >  
> > -	if (DISPLAY_VER(i915) == 11 && !dig_port->tc_legacy_port)
> > -		return 0;
> > -
> >  	*domain = tc_cold_get_power_domain(dig_port, mode);
> >  
> >  	return intel_display_power_get(i915, *domain);
> > @@ -108,9 +105,6 @@ assert_tc_cold_blocked(struct intel_digital_port *dig_port)
> >  	struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev);
> >  	bool enabled;
> >  
> > -	if (DISPLAY_VER(i915) == 11 && !dig_port->tc_legacy_port)
> > -		return;
> > -
> >  	enabled = intel_display_power_is_enabled(i915,
> >  						 tc_cold_get_power_domain(dig_port,
> >  									  dig_port->tc_mode));
> 

^ permalink raw reply	[flat|nested] 72+ messages in thread

* Re: [Intel-gfx] [PATCH 07/13] drm/i915/tc: Add a mode for the TypeC PHY's disconnected state
  2021-09-27 21:46     ` Imre Deak
@ 2021-09-28 19:18       ` Souza, Jose
  2021-09-28 19:34         ` Imre Deak
  0 siblings, 1 reply; 72+ messages in thread
From: Souza, Jose @ 2021-09-28 19:18 UTC (permalink / raw)
  To: Deak, Imre; +Cc: intel-gfx

On Tue, 2021-09-28 at 00:46 +0300, Imre Deak wrote:
> On Tue, Sep 28, 2021 at 12:16:45AM +0300, Souza, Jose wrote:
> > On Tue, 2021-09-21 at 03:23 +0300, Imre Deak wrote:
> > > A follow-up change will start to disconnect/re-connect PHYs around AUX
> > > transfers and modeset enable/disables. To prepare for that add a new
> > > TypeC PHY disconnected mode, to help tracking the TC-cold blocking power
> > > domain status (no power domain in disconnected state, mode dependent
> > > power domain in connected state).
> > > 
> > > Cc: José Roberto de Souza <jose.souza@intel.com>
> > > Signed-off-by: Imre Deak <imre.deak@intel.com>
> > > ---
> > >  drivers/gpu/drm/i915/display/intel_display.h |  1 +
> > >  drivers/gpu/drm/i915/display/intel_tc.c      | 26 ++++++++++++++------
> > >  2 files changed, 19 insertions(+), 8 deletions(-)
> > > 
> > > diff --git a/drivers/gpu/drm/i915/display/intel_display.h b/drivers/gpu/drm/i915/display/intel_display.h
> > > index d425ee77aad71..87b96fed5e0ba 100644
> > > --- a/drivers/gpu/drm/i915/display/intel_display.h
> > > +++ b/drivers/gpu/drm/i915/display/intel_display.h
> > > @@ -270,6 +270,7 @@ enum tc_port {
> > >  };
> > >  
> > >  enum tc_port_mode {
> > > +	TC_PORT_DISCONNECTED,
> > >  	TC_PORT_TBT_ALT,
> > >  	TC_PORT_DP_ALT,
> > >  	TC_PORT_LEGACY,
> > > diff --git a/drivers/gpu/drm/i915/display/intel_tc.c b/drivers/gpu/drm/i915/display/intel_tc.c
> > > index aa4c1e5e0c002..77b16a7c43466 100644
> > > --- a/drivers/gpu/drm/i915/display/intel_tc.c
> > > +++ b/drivers/gpu/drm/i915/display/intel_tc.c
> > > @@ -12,13 +12,14 @@
> > >  static const char *tc_port_mode_name(enum tc_port_mode mode)
> > >  {
> > >  	static const char * const names[] = {
> > > +		[TC_PORT_DISCONNECTED] = "disconnected",
> > >  		[TC_PORT_TBT_ALT] = "tbt-alt",
> > >  		[TC_PORT_DP_ALT] = "dp-alt",
> > >  		[TC_PORT_LEGACY] = "legacy",
> > >  	};
> > >  
> > >  	if (WARN_ON(mode >= ARRAY_SIZE(names)))
> > > -		mode = TC_PORT_TBT_ALT;
> > > +		mode = TC_PORT_DISCONNECTED;
> > >  
> > >  	return names[mode];
> > >  }
> > > @@ -513,10 +514,11 @@ static void icl_tc_phy_disconnect(struct intel_digital_port *dig_port)
> > >  	case TC_PORT_LEGACY:
> > >  	case TC_PORT_DP_ALT:
> > >  		tc_phy_take_ownership(dig_port, false);
> > > -		dig_port->tc_mode = TC_PORT_TBT_ALT;
> > > -		break;
> > > +		fallthrough;
> > >  	case TC_PORT_TBT_ALT:
> > > -		/* Nothing to do, we stay in TBT-alt mode */
> > > +		dig_port->tc_mode = TC_PORT_DISCONNECTED;
> > > +		fallthrough;
> > > +	case TC_PORT_DISCONNECTED:
> > >  		break;
> > >  	default:
> > >  		MISSING_CASE(dig_port->tc_mode);
> > > @@ -621,31 +623,34 @@ void intel_tc_port_sanitize(struct intel_digital_port *dig_port)
> > >  {
> > >  	struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev);
> > >  	struct intel_encoder *encoder = &dig_port->base;
> > > -	intel_wakeref_t tc_cold_wref;
> > >  	int active_links = 0;
> > >  
> > >  	mutex_lock(&dig_port->tc_lock);
> > > -	tc_cold_wref = tc_cold_block(dig_port);
> > >  
> > > -	dig_port->tc_mode = intel_tc_port_get_current_mode(dig_port);
> > >  	if (dig_port->dp.is_mst)
> > >  		active_links = intel_dp_mst_encoder_active_links(dig_port);
> > >  	else if (encoder->base.crtc)
> > >  		active_links = to_intel_crtc(encoder->base.crtc)->active;
> > >  
> > > +	drm_WARN_ON(&i915->drm, dig_port->tc_mode != TC_PORT_DISCONNECTED);
> > >  	if (active_links) {
> > > +		intel_wakeref_t tc_cold_wref = tc_cold_block(dig_port);
> > > +
> > > +		dig_port->tc_mode = intel_tc_port_get_current_mode(dig_port);
> > > +
> > >  		if (!icl_tc_phy_is_connected(dig_port))
> > >  			drm_dbg_kms(&i915->drm,
> > >  				    "Port %s: PHY disconnected with %d active link(s)\n",
> > >  				    dig_port->tc_port_name, active_links);
> > >  		intel_tc_port_link_init_refcount(dig_port, active_links);
> > > +
> > > +		tc_cold_unblock(dig_port, tc_cold_wref);
> > >  	}
> > >  
> > >  	drm_dbg_kms(&i915->drm, "Port %s: sanitize mode (%s)\n",
> > >  		    dig_port->tc_port_name,
> > >  		    tc_port_mode_name(dig_port->tc_mode));
> > >  
> > > -	tc_cold_unblock(dig_port, tc_cold_wref);
> > >  	mutex_unlock(&dig_port->tc_lock);
> > >  }
> > >  
> > > @@ -704,6 +709,10 @@ static void __intel_tc_port_lock(struct intel_digital_port *dig_port,
> > >  		tc_cold_unblock(dig_port, tc_cold_wref);
> > >  	}
> > >  
> > > +	drm_WARN_ON(&i915->drm, dig_port->tc_mode == TC_PORT_DISCONNECTED);
> > 
> > This warning will be printed everytime it goes to suspend, other than that lgtm.
> 
> By the end of the patchset this shouldn't warn. But yes, for bisect to
> work this should've been added only in patch 11, I'll move it there.

Would not be possible to use TC_PORT_DISCONNECTED when really disconnected and dropping the use of TC_PORT_TBT_ALT for it?

Further patches does the proper tc cold exit sequence when mode is TC_PORT_DISCONNECTED, that would cover all the cases from when going from
TC_PORT_DISCONNECTED to any other state and would make the code easier to understand.
 

> 
> > > +	drm_WARN_ON(&i915->drm, dig_port->tc_mode != TC_PORT_TBT_ALT &&
> > > +				!tc_phy_is_owned(dig_port));
> > > +
> > >  	drm_WARN_ON(&i915->drm, dig_port->tc_lock_wakeref);
> > >  	dig_port->tc_lock_wakeref = wakeref;
> > >  }
> > > @@ -816,6 +825,7 @@ void intel_tc_port_init(struct intel_digital_port *dig_port, bool is_legacy)
> > >  
> > >  	mutex_init(&dig_port->tc_lock);
> > >  	dig_port->tc_legacy_port = is_legacy;
> > > +	dig_port->tc_mode = TC_PORT_DISCONNECTED;
> > >  	dig_port->tc_link_refcount = 0;
> > >  	tc_port_load_fia_params(i915, dig_port);
> > >  }
> > 


^ permalink raw reply	[flat|nested] 72+ messages in thread

* Re: [Intel-gfx] [PATCH 07/13] drm/i915/tc: Add a mode for the TypeC PHY's disconnected state
  2021-09-28 19:18       ` Souza, Jose
@ 2021-09-28 19:34         ` Imre Deak
  2021-09-28 19:45           ` Souza, Jose
  0 siblings, 1 reply; 72+ messages in thread
From: Imre Deak @ 2021-09-28 19:34 UTC (permalink / raw)
  To: Souza, Jose; +Cc: intel-gfx

On Tue, Sep 28, 2021 at 10:18:25PM +0300, Souza, Jose wrote:
> On Tue, 2021-09-28 at 00:46 +0300, Imre Deak wrote:
> > On Tue, Sep 28, 2021 at 12:16:45AM +0300, Souza, Jose wrote:
> > > On Tue, 2021-09-21 at 03:23 +0300, Imre Deak wrote:
> > > > A follow-up change will start to disconnect/re-connect PHYs around AUX
> > > > transfers and modeset enable/disables. To prepare for that add a new
> > > > TypeC PHY disconnected mode, to help tracking the TC-cold blocking power
> > > > domain status (no power domain in disconnected state, mode dependent
> > > > power domain in connected state).
> > > > 
> > > > Cc: José Roberto de Souza <jose.souza@intel.com>
> > > > Signed-off-by: Imre Deak <imre.deak@intel.com>
> > > > ---
> > > >  drivers/gpu/drm/i915/display/intel_display.h |  1 +
> > > >  drivers/gpu/drm/i915/display/intel_tc.c      | 26 ++++++++++++++------
> > > >  2 files changed, 19 insertions(+), 8 deletions(-)
> > > > 
> > > > diff --git a/drivers/gpu/drm/i915/display/intel_display.h b/drivers/gpu/drm/i915/display/intel_display.h
> > > > index d425ee77aad71..87b96fed5e0ba 100644
> > > > --- a/drivers/gpu/drm/i915/display/intel_display.h
> > > > +++ b/drivers/gpu/drm/i915/display/intel_display.h
> > > > @@ -270,6 +270,7 @@ enum tc_port {
> > > >  };
> > > >  
> > > >  enum tc_port_mode {
> > > > +	TC_PORT_DISCONNECTED,
> > > >  	TC_PORT_TBT_ALT,
> > > >  	TC_PORT_DP_ALT,
> > > >  	TC_PORT_LEGACY,
> > > > diff --git a/drivers/gpu/drm/i915/display/intel_tc.c b/drivers/gpu/drm/i915/display/intel_tc.c
> > > > index aa4c1e5e0c002..77b16a7c43466 100644
> > > > --- a/drivers/gpu/drm/i915/display/intel_tc.c
> > > > +++ b/drivers/gpu/drm/i915/display/intel_tc.c
> > > > @@ -12,13 +12,14 @@
> > > >  static const char *tc_port_mode_name(enum tc_port_mode mode)
> > > >  {
> > > >  	static const char * const names[] = {
> > > > +		[TC_PORT_DISCONNECTED] = "disconnected",
> > > >  		[TC_PORT_TBT_ALT] = "tbt-alt",
> > > >  		[TC_PORT_DP_ALT] = "dp-alt",
> > > >  		[TC_PORT_LEGACY] = "legacy",
> > > >  	};
> > > >  
> > > >  	if (WARN_ON(mode >= ARRAY_SIZE(names)))
> > > > -		mode = TC_PORT_TBT_ALT;
> > > > +		mode = TC_PORT_DISCONNECTED;
> > > >  
> > > >  	return names[mode];
> > > >  }
> > > > @@ -513,10 +514,11 @@ static void icl_tc_phy_disconnect(struct intel_digital_port *dig_port)
> > > >  	case TC_PORT_LEGACY:
> > > >  	case TC_PORT_DP_ALT:
> > > >  		tc_phy_take_ownership(dig_port, false);
> > > > -		dig_port->tc_mode = TC_PORT_TBT_ALT;
> > > > -		break;
> > > > +		fallthrough;
> > > >  	case TC_PORT_TBT_ALT:
> > > > -		/* Nothing to do, we stay in TBT-alt mode */
> > > > +		dig_port->tc_mode = TC_PORT_DISCONNECTED;
> > > > +		fallthrough;
> > > > +	case TC_PORT_DISCONNECTED:
> > > >  		break;
> > > >  	default:
> > > >  		MISSING_CASE(dig_port->tc_mode);
> > > > @@ -621,31 +623,34 @@ void intel_tc_port_sanitize(struct intel_digital_port *dig_port)
> > > >  {
> > > >  	struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev);
> > > >  	struct intel_encoder *encoder = &dig_port->base;
> > > > -	intel_wakeref_t tc_cold_wref;
> > > >  	int active_links = 0;
> > > >  
> > > >  	mutex_lock(&dig_port->tc_lock);
> > > > -	tc_cold_wref = tc_cold_block(dig_port);
> > > >  
> > > > -	dig_port->tc_mode = intel_tc_port_get_current_mode(dig_port);
> > > >  	if (dig_port->dp.is_mst)
> > > >  		active_links = intel_dp_mst_encoder_active_links(dig_port);
> > > >  	else if (encoder->base.crtc)
> > > >  		active_links = to_intel_crtc(encoder->base.crtc)->active;
> > > >  
> > > > +	drm_WARN_ON(&i915->drm, dig_port->tc_mode != TC_PORT_DISCONNECTED);
> > > >  	if (active_links) {
> > > > +		intel_wakeref_t tc_cold_wref = tc_cold_block(dig_port);
> > > > +
> > > > +		dig_port->tc_mode = intel_tc_port_get_current_mode(dig_port);
> > > > +
> > > >  		if (!icl_tc_phy_is_connected(dig_port))
> > > >  			drm_dbg_kms(&i915->drm,
> > > >  				    "Port %s: PHY disconnected with %d active link(s)\n",
> > > >  				    dig_port->tc_port_name, active_links);
> > > >  		intel_tc_port_link_init_refcount(dig_port, active_links);
> > > > +
> > > > +		tc_cold_unblock(dig_port, tc_cold_wref);
> > > >  	}
> > > >  
> > > >  	drm_dbg_kms(&i915->drm, "Port %s: sanitize mode (%s)\n",
> > > >  		    dig_port->tc_port_name,
> > > >  		    tc_port_mode_name(dig_port->tc_mode));
> > > >  
> > > > -	tc_cold_unblock(dig_port, tc_cold_wref);
> > > >  	mutex_unlock(&dig_port->tc_lock);
> > > >  }
> > > >  
> > > > @@ -704,6 +709,10 @@ static void __intel_tc_port_lock(struct intel_digital_port *dig_port,
> > > >  		tc_cold_unblock(dig_port, tc_cold_wref);
> > > >  	}
> > > >  
> > > > +	drm_WARN_ON(&i915->drm, dig_port->tc_mode == TC_PORT_DISCONNECTED);
> > > 
> > > This warning will be printed everytime it goes to suspend, other than that lgtm.
> > 
> > By the end of the patchset this shouldn't warn. But yes, for bisect to
> > work this should've been added only in patch 11, I'll move it there.
> 
> Would not be possible to use TC_PORT_DISCONNECTED when really
> disconnected and dropping the use of TC_PORT_TBT_ALT for it?

TC_PORT_DISCONNECTED is the state when the PHY ownership is not held and
we don't hold any power domains.

TC_PORT_TBT_ALT is the state when the PHY ownership is not held (like
above), and we hold the power domain needed to block TC-cold.

So the TBT_ALT state is not used for the disconnected state.

> Further patches does the proper tc cold exit sequence when mode is
> TC_PORT_DISCONNECTED, that would cover all the cases from when going
> from TC_PORT_DISCONNECTED to any other state and would make the code
> easier to understand.

Tc-cold will always get properly blocked, as bspec requires, when going
to other states from both the DISCONNECTED and the TBT_ALT state.

> > > > +	drm_WARN_ON(&i915->drm, dig_port->tc_mode != TC_PORT_TBT_ALT &&
> > > > +				!tc_phy_is_owned(dig_port));
> > > > +
> > > >  	drm_WARN_ON(&i915->drm, dig_port->tc_lock_wakeref);
> > > >  	dig_port->tc_lock_wakeref = wakeref;
> > > >  }
> > > > @@ -816,6 +825,7 @@ void intel_tc_port_init(struct intel_digital_port *dig_port, bool is_legacy)
> > > >  
> > > >  	mutex_init(&dig_port->tc_lock);
> > > >  	dig_port->tc_legacy_port = is_legacy;
> > > > +	dig_port->tc_mode = TC_PORT_DISCONNECTED;
> > > >  	dig_port->tc_link_refcount = 0;
> > > >  	tc_port_load_fia_params(i915, dig_port);
> > > >  }
> > > 
> 

^ permalink raw reply	[flat|nested] 72+ messages in thread

* Re: [Intel-gfx] [PATCH 07/13] drm/i915/tc: Add a mode for the TypeC PHY's disconnected state
  2021-09-28 19:34         ` Imre Deak
@ 2021-09-28 19:45           ` Souza, Jose
  2021-09-28 19:55             ` Imre Deak
  0 siblings, 1 reply; 72+ messages in thread
From: Souza, Jose @ 2021-09-28 19:45 UTC (permalink / raw)
  To: Deak, Imre; +Cc: intel-gfx

On Tue, 2021-09-28 at 22:34 +0300, Imre Deak wrote:
> On Tue, Sep 28, 2021 at 10:18:25PM +0300, Souza, Jose wrote:
> > On Tue, 2021-09-28 at 00:46 +0300, Imre Deak wrote:
> > > On Tue, Sep 28, 2021 at 12:16:45AM +0300, Souza, Jose wrote:
> > > > On Tue, 2021-09-21 at 03:23 +0300, Imre Deak wrote:
> > > > > A follow-up change will start to disconnect/re-connect PHYs around AUX
> > > > > transfers and modeset enable/disables. To prepare for that add a new
> > > > > TypeC PHY disconnected mode, to help tracking the TC-cold blocking power
> > > > > domain status (no power domain in disconnected state, mode dependent
> > > > > power domain in connected state).
> > > > > 
> > > > > Cc: José Roberto de Souza <jose.souza@intel.com>
> > > > > Signed-off-by: Imre Deak <imre.deak@intel.com>
> > > > > ---
> > > > >  drivers/gpu/drm/i915/display/intel_display.h |  1 +
> > > > >  drivers/gpu/drm/i915/display/intel_tc.c      | 26 ++++++++++++++------
> > > > >  2 files changed, 19 insertions(+), 8 deletions(-)
> > > > > 
> > > > > diff --git a/drivers/gpu/drm/i915/display/intel_display.h b/drivers/gpu/drm/i915/display/intel_display.h
> > > > > index d425ee77aad71..87b96fed5e0ba 100644
> > > > > --- a/drivers/gpu/drm/i915/display/intel_display.h
> > > > > +++ b/drivers/gpu/drm/i915/display/intel_display.h
> > > > > @@ -270,6 +270,7 @@ enum tc_port {
> > > > >  };
> > > > >  
> > > > >  enum tc_port_mode {
> > > > > +	TC_PORT_DISCONNECTED,
> > > > >  	TC_PORT_TBT_ALT,
> > > > >  	TC_PORT_DP_ALT,
> > > > >  	TC_PORT_LEGACY,
> > > > > diff --git a/drivers/gpu/drm/i915/display/intel_tc.c b/drivers/gpu/drm/i915/display/intel_tc.c
> > > > > index aa4c1e5e0c002..77b16a7c43466 100644
> > > > > --- a/drivers/gpu/drm/i915/display/intel_tc.c
> > > > > +++ b/drivers/gpu/drm/i915/display/intel_tc.c
> > > > > @@ -12,13 +12,14 @@
> > > > >  static const char *tc_port_mode_name(enum tc_port_mode mode)
> > > > >  {
> > > > >  	static const char * const names[] = {
> > > > > +		[TC_PORT_DISCONNECTED] = "disconnected",
> > > > >  		[TC_PORT_TBT_ALT] = "tbt-alt",
> > > > >  		[TC_PORT_DP_ALT] = "dp-alt",
> > > > >  		[TC_PORT_LEGACY] = "legacy",
> > > > >  	};
> > > > >  
> > > > >  	if (WARN_ON(mode >= ARRAY_SIZE(names)))
> > > > > -		mode = TC_PORT_TBT_ALT;
> > > > > +		mode = TC_PORT_DISCONNECTED;
> > > > >  
> > > > >  	return names[mode];
> > > > >  }
> > > > > @@ -513,10 +514,11 @@ static void icl_tc_phy_disconnect(struct intel_digital_port *dig_port)
> > > > >  	case TC_PORT_LEGACY:
> > > > >  	case TC_PORT_DP_ALT:
> > > > >  		tc_phy_take_ownership(dig_port, false);
> > > > > -		dig_port->tc_mode = TC_PORT_TBT_ALT;
> > > > > -		break;
> > > > > +		fallthrough;
> > > > >  	case TC_PORT_TBT_ALT:
> > > > > -		/* Nothing to do, we stay in TBT-alt mode */
> > > > > +		dig_port->tc_mode = TC_PORT_DISCONNECTED;
> > > > > +		fallthrough;
> > > > > +	case TC_PORT_DISCONNECTED:
> > > > >  		break;
> > > > >  	default:
> > > > >  		MISSING_CASE(dig_port->tc_mode);
> > > > > @@ -621,31 +623,34 @@ void intel_tc_port_sanitize(struct intel_digital_port *dig_port)
> > > > >  {
> > > > >  	struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev);
> > > > >  	struct intel_encoder *encoder = &dig_port->base;
> > > > > -	intel_wakeref_t tc_cold_wref;
> > > > >  	int active_links = 0;
> > > > >  
> > > > >  	mutex_lock(&dig_port->tc_lock);
> > > > > -	tc_cold_wref = tc_cold_block(dig_port);
> > > > >  
> > > > > -	dig_port->tc_mode = intel_tc_port_get_current_mode(dig_port);
> > > > >  	if (dig_port->dp.is_mst)
> > > > >  		active_links = intel_dp_mst_encoder_active_links(dig_port);
> > > > >  	else if (encoder->base.crtc)
> > > > >  		active_links = to_intel_crtc(encoder->base.crtc)->active;
> > > > >  
> > > > > +	drm_WARN_ON(&i915->drm, dig_port->tc_mode != TC_PORT_DISCONNECTED);
> > > > >  	if (active_links) {
> > > > > +		intel_wakeref_t tc_cold_wref = tc_cold_block(dig_port);
> > > > > +
> > > > > +		dig_port->tc_mode = intel_tc_port_get_current_mode(dig_port);
> > > > > +
> > > > >  		if (!icl_tc_phy_is_connected(dig_port))
> > > > >  			drm_dbg_kms(&i915->drm,
> > > > >  				    "Port %s: PHY disconnected with %d active link(s)\n",
> > > > >  				    dig_port->tc_port_name, active_links);
> > > > >  		intel_tc_port_link_init_refcount(dig_port, active_links);
> > > > > +
> > > > > +		tc_cold_unblock(dig_port, tc_cold_wref);
> > > > >  	}
> > > > >  
> > > > >  	drm_dbg_kms(&i915->drm, "Port %s: sanitize mode (%s)\n",
> > > > >  		    dig_port->tc_port_name,
> > > > >  		    tc_port_mode_name(dig_port->tc_mode));
> > > > >  
> > > > > -	tc_cold_unblock(dig_port, tc_cold_wref);
> > > > >  	mutex_unlock(&dig_port->tc_lock);
> > > > >  }
> > > > >  
> > > > > @@ -704,6 +709,10 @@ static void __intel_tc_port_lock(struct intel_digital_port *dig_port,
> > > > >  		tc_cold_unblock(dig_port, tc_cold_wref);
> > > > >  	}
> > > > >  
> > > > > +	drm_WARN_ON(&i915->drm, dig_port->tc_mode == TC_PORT_DISCONNECTED);
> > > > 
> > > > This warning will be printed everytime it goes to suspend, other than that lgtm.
> > > 
> > > By the end of the patchset this shouldn't warn. But yes, for bisect to
> > > work this should've been added only in patch 11, I'll move it there.
> > 
> > Would not be possible to use TC_PORT_DISCONNECTED when really
> > disconnected and dropping the use of TC_PORT_TBT_ALT for it?
> 
> TC_PORT_DISCONNECTED is the state when the PHY ownership is not held and
> we don't hold any power domains.
> 
> TC_PORT_TBT_ALT is the state when the PHY ownership is not held (like
> above), and we hold the power domain needed to block TC-cold.

Swapping it would make modes names do what their names intend to.

Up to the point that we only had TBT, TC alt and legacy it was fine to keep into TBT mode when disconnected but now with a disconnected state it do
not make sense to keep it in TBT mode when disconnected.

Or you rename it to TC_PORT_UNKNOWN, as it sets to TC_PORT_DISCONNECTED mode during tc_init() and when going to suspend.

> 
> So the TBT_ALT state is not used for the disconnected state.
> 
> > Further patches does the proper tc cold exit sequence when mode is
> > TC_PORT_DISCONNECTED, that would cover all the cases from when going
> > from TC_PORT_DISCONNECTED to any other state and would make the code
> > easier to understand.
> 
> Tc-cold will always get properly blocked, as bspec requires, when going
> to other states from both the DISCONNECTED and the TBT_ALT state.
> 
> > > > > +	drm_WARN_ON(&i915->drm, dig_port->tc_mode != TC_PORT_TBT_ALT &&
> > > > > +				!tc_phy_is_owned(dig_port));
> > > > > +
> > > > >  	drm_WARN_ON(&i915->drm, dig_port->tc_lock_wakeref);
> > > > >  	dig_port->tc_lock_wakeref = wakeref;
> > > > >  }
> > > > > @@ -816,6 +825,7 @@ void intel_tc_port_init(struct intel_digital_port *dig_port, bool is_legacy)
> > > > >  
> > > > >  	mutex_init(&dig_port->tc_lock);
> > > > >  	dig_port->tc_legacy_port = is_legacy;
> > > > > +	dig_port->tc_mode = TC_PORT_DISCONNECTED;
> > > > >  	dig_port->tc_link_refcount = 0;
> > > > >  	tc_port_load_fia_params(i915, dig_port);
> > > > >  }
> > > > 
> > 


^ permalink raw reply	[flat|nested] 72+ messages in thread

* Re: [Intel-gfx] [PATCH 07/13] drm/i915/tc: Add a mode for the TypeC PHY's disconnected state
  2021-09-28 19:45           ` Souza, Jose
@ 2021-09-28 19:55             ` Imre Deak
  2021-09-28 20:02               ` Souza, Jose
  0 siblings, 1 reply; 72+ messages in thread
From: Imre Deak @ 2021-09-28 19:55 UTC (permalink / raw)
  To: Souza, Jose; +Cc: intel-gfx

On Tue, Sep 28, 2021 at 10:45:50PM +0300, Souza, Jose wrote:
> > > [...]
> > > Would not be possible to use TC_PORT_DISCONNECTED when really
> > > disconnected and dropping the use of TC_PORT_TBT_ALT for it?
> > 
> > TC_PORT_DISCONNECTED is the state when the PHY ownership is not held and
> > we don't hold any power domains.
> > 
> > TC_PORT_TBT_ALT is the state when the PHY ownership is not held (like
> > above), and we hold the power domain needed to block TC-cold.
> 
> Swapping it would make modes names do what their names intend to.
> 
> Up to the point that we only had TBT, TC alt and legacy it was fine to
> keep into TBT mode when disconnected but now with a disconnected state
> it do not make sense to keep it in TBT mode when disconnected.
> 
> Or you rename it to TC_PORT_UNKNOWN, as it sets to
> TC_PORT_DISCONNECTED mode during tc_init() and when going to suspend.

Not sure what you mean, because what you describe is what actually
happens. From all states icl_tc_phy_disconnect() will change to
the disconnected state, which is the state at init time and during
suspend or after unloading the driver.

--Imre

^ permalink raw reply	[flat|nested] 72+ messages in thread

* Re: [Intel-gfx] [PATCH 07/13] drm/i915/tc: Add a mode for the TypeC PHY's disconnected state
  2021-09-28 19:55             ` Imre Deak
@ 2021-09-28 20:02               ` Souza, Jose
  2021-09-28 20:08                 ` Imre Deak
  0 siblings, 1 reply; 72+ messages in thread
From: Souza, Jose @ 2021-09-28 20:02 UTC (permalink / raw)
  To: Deak, Imre; +Cc: intel-gfx

On Tue, 2021-09-28 at 22:55 +0300, Imre Deak wrote:
> On Tue, Sep 28, 2021 at 10:45:50PM +0300, Souza, Jose wrote:
> > > > [...]
> > > > Would not be possible to use TC_PORT_DISCONNECTED when really
> > > > disconnected and dropping the use of TC_PORT_TBT_ALT for it?
> > > 
> > > TC_PORT_DISCONNECTED is the state when the PHY ownership is not held and
> > > we don't hold any power domains.
> > > 
> > > TC_PORT_TBT_ALT is the state when the PHY ownership is not held (like
> > > above), and we hold the power domain needed to block TC-cold.
> > 
> > Swapping it would make modes names do what their names intend to.
> > 
> > Up to the point that we only had TBT, TC alt and legacy it was fine to
> > keep into TBT mode when disconnected but now with a disconnected state
> > it do not make sense to keep it in TBT mode when disconnected.
> > 
> > Or you rename it to TC_PORT_UNKNOWN, as it sets to
> > TC_PORT_DISCONNECTED mode during tc_init() and when going to suspend.
> 
> Not sure what you mean, because what you describe is what actually
> happens. From all states icl_tc_phy_disconnect() will change to
> the disconnected state, which is the state at init time and during
> suspend or after unloading the driver.

I'm talking about the state when system is up without anything connected to the port, after icl_tc_phy_disconnect() sets dig_port->tc_mode =
TC_PORT_DISCONNECTED, icl_tc_phy_connect() goes and set it back to TC_PORT_TBT_ALT.


> 
> --Imre


^ permalink raw reply	[flat|nested] 72+ messages in thread

* Re: [Intel-gfx] [PATCH 07/13] drm/i915/tc: Add a mode for the TypeC PHY's disconnected state
  2021-09-28 20:02               ` Souza, Jose
@ 2021-09-28 20:08                 ` Imre Deak
  2021-09-28 20:29                   ` Souza, Jose
  0 siblings, 1 reply; 72+ messages in thread
From: Imre Deak @ 2021-09-28 20:08 UTC (permalink / raw)
  To: Souza, Jose; +Cc: intel-gfx

On Tue, Sep 28, 2021 at 11:02:37PM +0300, Souza, Jose wrote:
> On Tue, 2021-09-28 at 22:55 +0300, Imre Deak wrote:
> > On Tue, Sep 28, 2021 at 10:45:50PM +0300, Souza, Jose wrote:
> > > > > [...]
> > > > > Would not be possible to use TC_PORT_DISCONNECTED when really
> > > > > disconnected and dropping the use of TC_PORT_TBT_ALT for it?
> > > > 
> > > > TC_PORT_DISCONNECTED is the state when the PHY ownership is not held and
> > > > we don't hold any power domains.
> > > > 
> > > > TC_PORT_TBT_ALT is the state when the PHY ownership is not held (like
> > > > above), and we hold the power domain needed to block TC-cold.
> > > 
> > > Swapping it would make modes names do what their names intend to.
> > > 
> > > Up to the point that we only had TBT, TC alt and legacy it was fine to
> > > keep into TBT mode when disconnected but now with a disconnected state
> > > it do not make sense to keep it in TBT mode when disconnected.
> > > 
> > > Or you rename it to TC_PORT_UNKNOWN, as it sets to
> > > TC_PORT_DISCONNECTED mode during tc_init() and when going to suspend.
> > 
> > Not sure what you mean, because what you describe is what actually
> > happens. From all states icl_tc_phy_disconnect() will change to
> > the disconnected state, which is the state at init time and during
> > suspend or after unloading the driver.
> 
> I'm talking about the state when system is up without anything
> connected to the port, after icl_tc_phy_disconnect() sets
> dig_port->tc_mode = TC_PORT_DISCONNECTED, icl_tc_phy_connect() goes
> and set it back to TC_PORT_TBT_ALT.

Yes, when the port is locked we are in one of TBT-alt, DP-alt or legacy
mode. These are the only modes that make sense for an AUX transfer or a
modeset, for which the lock was taken.

--Imre

^ permalink raw reply	[flat|nested] 72+ messages in thread

* Re: [Intel-gfx] [PATCH 07/13] drm/i915/tc: Add a mode for the TypeC PHY's disconnected state
  2021-09-28 20:08                 ` Imre Deak
@ 2021-09-28 20:29                   ` Souza, Jose
  2021-09-28 20:38                     ` Imre Deak
  0 siblings, 1 reply; 72+ messages in thread
From: Souza, Jose @ 2021-09-28 20:29 UTC (permalink / raw)
  To: Deak, Imre; +Cc: intel-gfx

On Tue, 2021-09-28 at 23:08 +0300, Imre Deak wrote:
> On Tue, Sep 28, 2021 at 11:02:37PM +0300, Souza, Jose wrote:
> > On Tue, 2021-09-28 at 22:55 +0300, Imre Deak wrote:
> > > On Tue, Sep 28, 2021 at 10:45:50PM +0300, Souza, Jose wrote:
> > > > > > [...]
> > > > > > Would not be possible to use TC_PORT_DISCONNECTED when really
> > > > > > disconnected and dropping the use of TC_PORT_TBT_ALT for it?
> > > > > 
> > > > > TC_PORT_DISCONNECTED is the state when the PHY ownership is not held and
> > > > > we don't hold any power domains.
> > > > > 
> > > > > TC_PORT_TBT_ALT is the state when the PHY ownership is not held (like
> > > > > above), and we hold the power domain needed to block TC-cold.
> > > > 
> > > > Swapping it would make modes names do what their names intend to.
> > > > 
> > > > Up to the point that we only had TBT, TC alt and legacy it was fine to
> > > > keep into TBT mode when disconnected but now with a disconnected state
> > > > it do not make sense to keep it in TBT mode when disconnected.
> > > > 
> > > > Or you rename it to TC_PORT_UNKNOWN, as it sets to
> > > > TC_PORT_DISCONNECTED mode during tc_init() and when going to suspend.
> > > 
> > > Not sure what you mean, because what you describe is what actually
> > > happens. From all states icl_tc_phy_disconnect() will change to
> > > the disconnected state, which is the state at init time and during
> > > suspend or after unloading the driver.
> > 
> > I'm talking about the state when system is up without anything
> > connected to the port, after icl_tc_phy_disconnect() sets
> > dig_port->tc_mode = TC_PORT_DISCONNECTED, icl_tc_phy_connect() goes
> > and set it back to TC_PORT_TBT_ALT.
> 
> Yes, when the port is locked we are in one of TBT-alt, DP-alt or legacy
> mode. These are the only modes that make sense for an AUX transfer or a
> modeset, for which the lock was taken.

Okay at the end of the series mode goes to TC_PORT_DISCONNECTED if no reference is held.

> 
> --Imre


^ permalink raw reply	[flat|nested] 72+ messages in thread

* Re: [Intel-gfx] [PATCH 09/13] drm/i915/tc: Avoid using legacy AUX PW in TBT mode
  2021-09-21  0:23 ` [Intel-gfx] [PATCH 09/13] drm/i915/tc: Avoid using legacy AUX PW in TBT mode Imre Deak
@ 2021-09-28 20:31   ` Souza, Jose
  2021-09-29 13:28   ` [Intel-gfx] [PATCH v2 " Imre Deak
  1 sibling, 0 replies; 72+ messages in thread
From: Souza, Jose @ 2021-09-28 20:31 UTC (permalink / raw)
  To: intel-gfx, Deak, Imre

On Tue, 2021-09-21 at 03:23 +0300, Imre Deak wrote:
> For the ADL-P TBT mode the spec doesn't require blocking TC-cold by
> using the legacy AUX power domain. To avoid the timeouts that this would
> cause during PHY disconnect/reconnect sequences (which will be more
> frequent after a follow-up change) use the TC_COLD_OFF power domain in
> TBT mode on all platforms. On TGL this power domain blocks TC-cold via a
> PUNIT command, while on other platforms the domain just takes a runtime
> PM reference.
> 
> If the HPD live status indicates that the port mode needs to be reset
> - for instance after switching from TBT to a DP-alt sink - still take
> the AUX domain, since the IOM firmware handshake requires this.

Reviewed-by: José Roberto de Souza <jose.souza@intel.com>

> 
> Cc: José Roberto de Souza <jose.souza@intel.com>
> Signed-off-by: Imre Deak <imre.deak@intel.com>
> ---
>  drivers/gpu/drm/i915/display/intel_tc.c | 55 ++++++++++++++++---------
>  1 file changed, 36 insertions(+), 19 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_tc.c b/drivers/gpu/drm/i915/display/intel_tc.c
> index 24d2dc2e19a7d..b2a3d297bfc19 100644
> --- a/drivers/gpu/drm/i915/display/intel_tc.c
> +++ b/drivers/gpu/drm/i915/display/intel_tc.c
> @@ -59,10 +59,10 @@ bool intel_tc_cold_requires_aux_pw(struct intel_digital_port *dig_port)
>  static enum intel_display_power_domain
>  tc_cold_get_power_domain(struct intel_digital_port *dig_port, enum tc_port_mode mode)
>  {
> -	if (intel_tc_cold_requires_aux_pw(dig_port))
> -		return intel_legacy_aux_to_power_domain(dig_port->aux_ch);
> -	else
> +	if (mode == TC_PORT_TBT_ALT || !intel_tc_cold_requires_aux_pw(dig_port))
>  		return POWER_DOMAIN_TC_COLD_OFF;
> +
> +	return intel_legacy_aux_to_power_domain(dig_port->aux_ch);
>  }
>  
>  static intel_wakeref_t
> @@ -624,6 +624,36 @@ static void intel_tc_port_reset_mode(struct intel_digital_port *dig_port,
>  		    tc_port_mode_name(dig_port->tc_mode));
>  }
>  
> +static bool intel_tc_port_needs_reset(struct intel_digital_port *dig_port)
> +{
> +	return intel_tc_port_get_target_mode(dig_port) != dig_port->tc_mode;
> +}
> +
> +static void intel_tc_port_update_mode(struct intel_digital_port *dig_port,
> +				      int required_lanes, bool force_disconnect)
> +{
> +	enum intel_display_power_domain domain;
> +	intel_wakeref_t wref;
> +	bool needs_reset = force_disconnect;
> +
> +	if (!needs_reset) {
> +		/* Get power domain required to check the hotplug live status. */
> +		wref = tc_cold_block(dig_port, &domain);
> +		needs_reset = intel_tc_port_needs_reset(dig_port);
> +		tc_cold_unblock(dig_port, domain, wref);
> +	}
> +
> +	if (!needs_reset)
> +		return;
> +
> +	/* Get power domain required for resetting the mode. */
> +	wref = tc_cold_block_in_mode(dig_port, TC_PORT_DISCONNECTED, &domain);
> +
> +	intel_tc_port_reset_mode(dig_port, required_lanes, force_disconnect);
> +
> +	tc_cold_unblock(dig_port, domain, wref);
> +}
> +
>  static void
>  intel_tc_port_link_init_refcount(struct intel_digital_port *dig_port,
>  				 int refcount)
> @@ -670,11 +700,6 @@ void intel_tc_port_sanitize(struct intel_digital_port *dig_port)
>  	mutex_unlock(&dig_port->tc_lock);
>  }
>  
> -static bool intel_tc_port_needs_reset(struct intel_digital_port *dig_port)
> -{
> -	return intel_tc_port_get_target_mode(dig_port) != dig_port->tc_mode;
> -}
> -
>  /*
>   * The type-C ports are different because even when they are connected, they may
>   * not be available/usable by the graphics driver: see the comment on
> @@ -714,18 +739,10 @@ static void __intel_tc_port_lock(struct intel_digital_port *dig_port,
>  
>  	mutex_lock(&dig_port->tc_lock);
>  
> -	if (!dig_port->tc_link_refcount) {
> -		enum intel_display_power_domain domain;
> -		intel_wakeref_t tc_cold_wref;
>  
> -		tc_cold_wref = tc_cold_block(dig_port, &domain);
> -
> -		if (force_disconnect || intel_tc_port_needs_reset(dig_port))
> -			intel_tc_port_reset_mode(dig_port, required_lanes,
> -						 force_disconnect);
> -
> -		tc_cold_unblock(dig_port, domain, tc_cold_wref);
> -	}
> +	if (!dig_port->tc_link_refcount)
> +		intel_tc_port_update_mode(dig_port, required_lanes,
> +					  force_disconnect);
>  
>  	drm_WARN_ON(&i915->drm, dig_port->tc_mode == TC_PORT_DISCONNECTED);
>  	drm_WARN_ON(&i915->drm, dig_port->tc_mode != TC_PORT_TBT_ALT &&


^ permalink raw reply	[flat|nested] 72+ messages in thread

* Re: [Intel-gfx] [PATCH 07/13] drm/i915/tc: Add a mode for the TypeC PHY's disconnected state
  2021-09-28 20:29                   ` Souza, Jose
@ 2021-09-28 20:38                     ` Imre Deak
  2021-09-28 20:56                       ` Souza, Jose
  0 siblings, 1 reply; 72+ messages in thread
From: Imre Deak @ 2021-09-28 20:38 UTC (permalink / raw)
  To: Souza, Jose; +Cc: intel-gfx

On Tue, Sep 28, 2021 at 11:29:49PM +0300, Souza, Jose wrote:
> On Tue, 2021-09-28 at 23:08 +0300, Imre Deak wrote:
> > On Tue, Sep 28, 2021 at 11:02:37PM +0300, Souza, Jose wrote:
> > > On Tue, 2021-09-28 at 22:55 +0300, Imre Deak wrote:
> > > > On Tue, Sep 28, 2021 at 10:45:50PM +0300, Souza, Jose wrote:
> > > > > > > [...]
> > > > > > > Would not be possible to use TC_PORT_DISCONNECTED when really
> > > > > > > disconnected and dropping the use of TC_PORT_TBT_ALT for it?
> > > > > > 
> > > > > > TC_PORT_DISCONNECTED is the state when the PHY ownership is not held and
> > > > > > we don't hold any power domains.
> > > > > > 
> > > > > > TC_PORT_TBT_ALT is the state when the PHY ownership is not held (like
> > > > > > above), and we hold the power domain needed to block TC-cold.
> > > > > 
> > > > > Swapping it would make modes names do what their names intend to.
> > > > > 
> > > > > Up to the point that we only had TBT, TC alt and legacy it was fine to
> > > > > keep into TBT mode when disconnected but now with a disconnected state
> > > > > it do not make sense to keep it in TBT mode when disconnected.
> > > > > 
> > > > > Or you rename it to TC_PORT_UNKNOWN, as it sets to
> > > > > TC_PORT_DISCONNECTED mode during tc_init() and when going to suspend.
> > > > 
> > > > Not sure what you mean, because what you describe is what actually
> > > > happens. From all states icl_tc_phy_disconnect() will change to
> > > > the disconnected state, which is the state at init time and during
> > > > suspend or after unloading the driver.
> > > 
> > > I'm talking about the state when system is up without anything
> > > connected to the port, after icl_tc_phy_disconnect() sets
> > > dig_port->tc_mode = TC_PORT_DISCONNECTED, icl_tc_phy_connect() goes
> > > and set it back to TC_PORT_TBT_ALT.
> > 
> > Yes, when the port is locked we are in one of TBT-alt, DP-alt or legacy
> > mode. These are the only modes that make sense for an AUX transfer or a
> > modeset, for which the lock was taken.
> 
> Okay at the end of the series mode goes to TC_PORT_DISCONNECTED if no
> reference is held.

Yes.

--Imre

^ permalink raw reply	[flat|nested] 72+ messages in thread

* Re: [Intel-gfx] [PATCH 10/13] drm/i915/icl/tc: Remove the ICL special casing during TC-cold blocking
  2021-09-28 10:52     ` Imre Deak
@ 2021-09-28 20:50       ` Souza, Jose
  0 siblings, 0 replies; 72+ messages in thread
From: Souza, Jose @ 2021-09-28 20:50 UTC (permalink / raw)
  To: Deak, Imre; +Cc: intel-gfx

On Tue, 2021-09-28 at 13:52 +0300, Imre Deak wrote:
> On Tue, Sep 28, 2021 at 01:02:21AM +0300, Souza, Jose wrote:
> > On Tue, 2021-09-21 at 03:23 +0300, Imre Deak wrote:
> > > While a TypeC port mode is locked a DISPLAY_CORE power domain reference
> > > is held, which implies a runtime PM ref. By removing the ICL !legacy
> > > port special casing, a TC_COLD_OFF power domain reference will be taken
> > > for such ports, which also translates to a runtime PM ref on that
> > > platform. A follow-up change will stop holding the DISPLAY_CORE power
> > > domain while the port is locked.
> > 
> > This should be squashed to 'drm/i915/tc: Refactor TC-cold
> > block/unblock helpers' otherwise domain is not initialized for this
> > case.
> 
> domain is always only valid with a non-zero wakeref, so no need to init
> domain if the returned wakeref is zero.

Reviewed-by: José Roberto de Souza <jose.souza@intel.com>

> 
> > > Cc: José Roberto de Souza <jose.souza@intel.com>
> > > Signed-off-by: Imre Deak <imre.deak@intel.com>
> > > ---
> > >  drivers/gpu/drm/i915/display/intel_tc.c | 6 ------
> > >  1 file changed, 6 deletions(-)
> > > 
> > > diff --git a/drivers/gpu/drm/i915/display/intel_tc.c b/drivers/gpu/drm/i915/display/intel_tc.c
> > > index b2a3d297bfc19..8d799cf7ccefd 100644
> > > --- a/drivers/gpu/drm/i915/display/intel_tc.c
> > > +++ b/drivers/gpu/drm/i915/display/intel_tc.c
> > > @@ -71,9 +71,6 @@ tc_cold_block_in_mode(struct intel_digital_port *dig_port, enum tc_port_mode mod
> > >  {
> > >  	struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev);
> > >  
> > > -	if (DISPLAY_VER(i915) == 11 && !dig_port->tc_legacy_port)
> > > -		return 0;
> > > -
> > >  	*domain = tc_cold_get_power_domain(dig_port, mode);
> > >  
> > >  	return intel_display_power_get(i915, *domain);
> > > @@ -108,9 +105,6 @@ assert_tc_cold_blocked(struct intel_digital_port *dig_port)
> > >  	struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev);
> > >  	bool enabled;
> > >  
> > > -	if (DISPLAY_VER(i915) == 11 && !dig_port->tc_legacy_port)
> > > -		return;
> > > -
> > >  	enabled = intel_display_power_is_enabled(i915,
> > >  						 tc_cold_get_power_domain(dig_port,
> > >  									  dig_port->tc_mode));
> > 


^ permalink raw reply	[flat|nested] 72+ messages in thread

* Re: [Intel-gfx] [PATCH 11/13] drm/i915/tc: Fix TypeC PHY connect/disconnect logic on ADL-P
  2021-09-21  0:23 ` [Intel-gfx] [PATCH 11/13] drm/i915/tc: Fix TypeC PHY connect/disconnect logic on ADL-P Imre Deak
@ 2021-09-28 20:51   ` Souza, Jose
  2021-09-29 13:28   ` [Intel-gfx] [PATCH v2 " Imre Deak
  1 sibling, 0 replies; 72+ messages in thread
From: Souza, Jose @ 2021-09-28 20:51 UTC (permalink / raw)
  To: intel-gfx, Deak, Imre

On Tue, 2021-09-21 at 03:23 +0300, Imre Deak wrote:
> So far TC-cold was blocked only for the duration of TypeC mode resets.
> The DP-alt and legacy modes require TC-cold to be blocked also whenever
> the port is in use (AUX transfers, enable modeset), and this was ensured
> by the held PHY ownership flag. On ADL-P this doesn't work, since the
> PHY ownership flag is in a register backed by the PW#2 power well.
> Whenever this power well is disabled the ownership flag is cleared by
> the HW under the driver.
> 
> The only way to cleanly release and re-acquire the PHY ownership flag
> and also allow for power saving (by disabling the display power wells
> and reaching DC5/6 states) is to hold the TC-cold blocking power domains
> while the PHY is connected and disconnect/reconnect the PHY on-demand
> around AUX transfers and modeset enable/disables. Let's do that,
> disconnecting a PHY with a 1 sec delay after it becomes idle. For
> consistency do this on all platforms and TypeC modes.

Reviewed-by: José Roberto de Souza <jose.souza@intel.com>

> 
> Cc: José Roberto de Souza <jose.souza@intel.com>
> Signed-off-by: Imre Deak <imre.deak@intel.com>
> ---
>  drivers/gpu/drm/i915/display/intel_ddi.c      |  7 +-
>  .../drm/i915/display/intel_display_types.h    |  1 +
>  drivers/gpu/drm/i915/display/intel_tc.c       | 87 +++++++++++--------
>  drivers/gpu/drm/i915/display/intel_tc.h       |  2 +-
>  4 files changed, 60 insertions(+), 37 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c b/drivers/gpu/drm/i915/display/intel_ddi.c
> index b9194d6a4dfe7..b509d5f2d5f0e 100644
> --- a/drivers/gpu/drm/i915/display/intel_ddi.c
> +++ b/drivers/gpu/drm/i915/display/intel_ddi.c
> @@ -4019,8 +4019,11 @@ static void intel_ddi_encoder_destroy(struct drm_encoder *encoder)
>  {
>  	struct drm_i915_private *i915 = to_i915(encoder->dev);
>  	struct intel_digital_port *dig_port = enc_to_dig_port(to_intel_encoder(encoder));
> +	enum phy phy = intel_port_to_phy(i915, dig_port->base.port);
>  
>  	intel_dp_encoder_flush_work(encoder);
> +	if (intel_phy_is_tc(i915, phy))
> +		intel_tc_port_flush_work(dig_port);
>  	intel_display_power_flush_work(i915);
>  
>  	drm_encoder_cleanup(encoder);
> @@ -4445,7 +4448,7 @@ static void intel_ddi_encoder_suspend(struct intel_encoder *encoder)
>  	if (!intel_phy_is_tc(i915, phy))
>  		return;
>  
> -	intel_tc_port_disconnect_phy(dig_port);
> +	intel_tc_port_flush_work(dig_port);
>  }
>  
>  static void intel_ddi_encoder_shutdown(struct intel_encoder *encoder)
> @@ -4460,7 +4463,7 @@ static void intel_ddi_encoder_shutdown(struct intel_encoder *encoder)
>  	if (!intel_phy_is_tc(i915, phy))
>  		return;
>  
> -	intel_tc_port_disconnect_phy(dig_port);
> +	intel_tc_port_flush_work(dig_port);
>  }
>  
>  #define port_tc_name(port) ((port) - PORT_TC1 + '1')
> diff --git a/drivers/gpu/drm/i915/display/intel_display_types.h b/drivers/gpu/drm/i915/display/intel_display_types.h
> index 08a73ffded957..53509f6ae3d10 100644
> --- a/drivers/gpu/drm/i915/display/intel_display_types.h
> +++ b/drivers/gpu/drm/i915/display/intel_display_types.h
> @@ -1667,6 +1667,7 @@ struct intel_digital_port {
>  	struct mutex tc_lock;	/* protects the TypeC port mode */
>  	intel_wakeref_t tc_lock_wakeref;
>  	enum intel_display_power_domain tc_lock_power_domain;
> +	struct delayed_work tc_disconnect_phy_work;
>  	int tc_link_refcount;
>  	bool tc_legacy_port:1;
>  	char tc_port_name[8];
> diff --git a/drivers/gpu/drm/i915/display/intel_tc.c b/drivers/gpu/drm/i915/display/intel_tc.c
> index 8d799cf7ccefd..3fefd00e04685 100644
> --- a/drivers/gpu/drm/i915/display/intel_tc.c
> +++ b/drivers/gpu/drm/i915/display/intel_tc.c
> @@ -645,6 +645,13 @@ static void intel_tc_port_update_mode(struct intel_digital_port *dig_port,
>  
>  	intel_tc_port_reset_mode(dig_port, required_lanes, force_disconnect);
>  
> +	/* Get power domain matching the new mode after reset. */
> +	tc_cold_unblock(dig_port, dig_port->tc_lock_power_domain,
> +			fetch_and_zero(&dig_port->tc_lock_wakeref));
> +	if (dig_port->tc_mode != TC_PORT_DISCONNECTED)
> +		dig_port->tc_lock_wakeref = tc_cold_block(dig_port,
> +							  &dig_port->tc_lock_power_domain);
> +
>  	tc_cold_unblock(dig_port, domain, wref);
>  }
>  
> @@ -672,6 +679,7 @@ void intel_tc_port_sanitize(struct intel_digital_port *dig_port)
>  		active_links = to_intel_crtc(encoder->base.crtc)->active;
>  
>  	drm_WARN_ON(&i915->drm, dig_port->tc_mode != TC_PORT_DISCONNECTED);
> +	drm_WARN_ON(&i915->drm, dig_port->tc_lock_wakeref);
>  	if (active_links) {
>  		enum intel_display_power_domain domain;
>  		intel_wakeref_t tc_cold_wref = tc_cold_block(dig_port, &domain);
> @@ -684,6 +692,9 @@ void intel_tc_port_sanitize(struct intel_digital_port *dig_port)
>  				    dig_port->tc_port_name, active_links);
>  		intel_tc_port_link_init_refcount(dig_port, active_links);
>  
> +		dig_port->tc_lock_wakeref = tc_cold_block(dig_port,
> +							  &dig_port->tc_lock_power_domain);
> +
>  		tc_cold_unblock(dig_port, domain, tc_cold_wref);
>  	}
>  
> @@ -724,60 +735,67 @@ bool intel_tc_port_connected(struct intel_encoder *encoder)
>  }
>  
>  static void __intel_tc_port_lock(struct intel_digital_port *dig_port,
> -				 int required_lanes, bool force_disconnect)
> +				 int required_lanes)
>  {
>  	struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev);
> -	intel_wakeref_t wakeref;
> -
> -	wakeref = intel_display_power_get(i915, POWER_DOMAIN_DISPLAY_CORE);
>  
>  	mutex_lock(&dig_port->tc_lock);
>  
> +	cancel_delayed_work(&dig_port->tc_disconnect_phy_work);
>  
>  	if (!dig_port->tc_link_refcount)
>  		intel_tc_port_update_mode(dig_port, required_lanes,
> -					  force_disconnect);
> +					  false);
>  
>  	drm_WARN_ON(&i915->drm, dig_port->tc_mode == TC_PORT_DISCONNECTED);
>  	drm_WARN_ON(&i915->drm, dig_port->tc_mode != TC_PORT_TBT_ALT &&
>  				!tc_phy_is_owned(dig_port));
> -
> -	drm_WARN_ON(&i915->drm, dig_port->tc_lock_wakeref);
> -	dig_port->tc_lock_wakeref = wakeref;
>  }
>  
>  void intel_tc_port_lock(struct intel_digital_port *dig_port)
>  {
> -	__intel_tc_port_lock(dig_port, 1, false);
> -}
> -
> -void intel_tc_port_unlock(struct intel_digital_port *dig_port)
> -{
> -	struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev);
> -	intel_wakeref_t wakeref = fetch_and_zero(&dig_port->tc_lock_wakeref);
> -
> -	mutex_unlock(&dig_port->tc_lock);
> -
> -	intel_display_power_put_async(i915, POWER_DOMAIN_DISPLAY_CORE,
> -				      wakeref);
> +	__intel_tc_port_lock(dig_port, 1);
>  }
>  
>  /**
> - * intel_tc_port_disconnect_phy: disconnect TypeC PHY from display port
> + * intel_tc_port_disconnect_phy_work: disconnect TypeC PHY from display port
>   * @dig_port: digital port
>   *
>   * Disconnect the given digital port from its TypeC PHY (handing back the
> - * control of the PHY to the TypeC subsystem). The only purpose of this
> - * function is to force the disconnect even with a TypeC display output still
> - * plugged to the TypeC connector, which is required by the TypeC firmwares
> - * during system suspend and shutdown. Otherwise - during the unplug event
> - * handling - the PHY ownership is released automatically by
> - * intel_tc_port_reset_mode(), when calling this function is not required.
> + * control of the PHY to the TypeC subsystem). This will happen in a delayed
> + * manner after each aux transactions and modeset disables.
>   */
> -void intel_tc_port_disconnect_phy(struct intel_digital_port *dig_port)
> +static void intel_tc_port_disconnect_phy_work(struct work_struct *work)
>  {
> -	__intel_tc_port_lock(dig_port, 1, true);
> -	intel_tc_port_unlock(dig_port);
> +	struct intel_digital_port *dig_port =
> +		container_of(work, struct intel_digital_port, tc_disconnect_phy_work.work);
> +
> +	mutex_lock(&dig_port->tc_lock);
> +
> +	if (!dig_port->tc_link_refcount)
> +		intel_tc_port_update_mode(dig_port, 1, true);
> +
> +	mutex_unlock(&dig_port->tc_lock);
> +}
> +
> +/**
> + * intel_tc_port_flush_work: flush the work disconnecting the PHY
> + * @dig_port: digital port
> + *
> + * Flush the delayed work disconnecting an idle PHY.
> + */
> +void intel_tc_port_flush_work(struct intel_digital_port *dig_port)
> +{
> +	flush_delayed_work(&dig_port->tc_disconnect_phy_work);
> +}
> +
> +void intel_tc_port_unlock(struct intel_digital_port *dig_port)
> +{
> +	if (!dig_port->tc_link_refcount && dig_port->tc_mode != TC_PORT_DISCONNECTED)
> +		queue_delayed_work(system_unbound_wq, &dig_port->tc_disconnect_phy_work,
> +				   msecs_to_jiffies(1000));
> +
> +	mutex_unlock(&dig_port->tc_lock);
>  }
>  
>  bool intel_tc_port_ref_held(struct intel_digital_port *dig_port)
> @@ -789,16 +807,16 @@ bool intel_tc_port_ref_held(struct intel_digital_port *dig_port)
>  void intel_tc_port_get_link(struct intel_digital_port *dig_port,
>  			    int required_lanes)
>  {
> -	__intel_tc_port_lock(dig_port, required_lanes, false);
> +	__intel_tc_port_lock(dig_port, required_lanes);
>  	dig_port->tc_link_refcount++;
>  	intel_tc_port_unlock(dig_port);
>  }
>  
>  void intel_tc_port_put_link(struct intel_digital_port *dig_port)
>  {
> -	mutex_lock(&dig_port->tc_lock);
> -	dig_port->tc_link_refcount--;
> -	mutex_unlock(&dig_port->tc_lock);
> +	intel_tc_port_lock(dig_port);
> +	--dig_port->tc_link_refcount;
> +	intel_tc_port_unlock(dig_port);
>  }
>  
>  static bool
> @@ -854,6 +872,7 @@ void intel_tc_port_init(struct intel_digital_port *dig_port, bool is_legacy)
>  		 "%c/TC#%d", port_name(port), tc_port + 1);
>  
>  	mutex_init(&dig_port->tc_lock);
> +	INIT_DELAYED_WORK(&dig_port->tc_disconnect_phy_work, intel_tc_port_disconnect_phy_work);
>  	dig_port->tc_legacy_port = is_legacy;
>  	dig_port->tc_mode = TC_PORT_DISCONNECTED;
>  	dig_port->tc_link_refcount = 0;
> diff --git a/drivers/gpu/drm/i915/display/intel_tc.h b/drivers/gpu/drm/i915/display/intel_tc.h
> index 0fdcddb4fc870..6b47b29f551c9 100644
> --- a/drivers/gpu/drm/i915/display/intel_tc.h
> +++ b/drivers/gpu/drm/i915/display/intel_tc.h
> @@ -17,7 +17,6 @@ bool intel_tc_port_in_dp_alt_mode(struct intel_digital_port *dig_port);
>  bool intel_tc_port_in_legacy_mode(struct intel_digital_port *dig_port);
>  
>  bool intel_tc_port_connected(struct intel_encoder *encoder);
> -void intel_tc_port_disconnect_phy(struct intel_digital_port *dig_port);
>  
>  u32 intel_tc_port_get_lane_mask(struct intel_digital_port *dig_port);
>  u32 intel_tc_port_get_pin_assignment_mask(struct intel_digital_port *dig_port);
> @@ -28,6 +27,7 @@ void intel_tc_port_set_fia_lane_count(struct intel_digital_port *dig_port,
>  void intel_tc_port_sanitize(struct intel_digital_port *dig_port);
>  void intel_tc_port_lock(struct intel_digital_port *dig_port);
>  void intel_tc_port_unlock(struct intel_digital_port *dig_port);
> +void intel_tc_port_flush_work(struct intel_digital_port *dig_port);
>  void intel_tc_port_get_link(struct intel_digital_port *dig_port,
>  			    int required_lanes);
>  void intel_tc_port_put_link(struct intel_digital_port *dig_port);


^ permalink raw reply	[flat|nested] 72+ messages in thread

* Re: [Intel-gfx] [PATCH 12/13] drm/i915/tc: Drop extra TC cold blocking from intel_tc_port_connected()
  2021-09-21  0:23 ` [Intel-gfx] [PATCH 12/13] drm/i915/tc: Drop extra TC cold blocking from intel_tc_port_connected() Imre Deak
@ 2021-09-28 20:51   ` Souza, Jose
  0 siblings, 0 replies; 72+ messages in thread
From: Souza, Jose @ 2021-09-28 20:51 UTC (permalink / raw)
  To: intel-gfx, Deak, Imre

On Tue, 2021-09-21 at 03:23 +0300, Imre Deak wrote:
> After the previous patch the driver holds a power domain blocking
> TC-cold whenever the port is locked, so we can remove the extra blocking
> around the lock/unlock sequence.

Reviewed-by: José Roberto de Souza <jose.souza@intel.com>

> 
> Cc: José Roberto de Souza <jose.souza@intel.com>
> Signed-off-by: Imre Deak <imre.deak@intel.com>
> ---
>  drivers/gpu/drm/i915/display/intel_tc.c | 4 ----
>  1 file changed, 4 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_tc.c b/drivers/gpu/drm/i915/display/intel_tc.c
> index 3fefd00e04685..99b66c2852e53 100644
> --- a/drivers/gpu/drm/i915/display/intel_tc.c
> +++ b/drivers/gpu/drm/i915/display/intel_tc.c
> @@ -719,16 +719,12 @@ bool intel_tc_port_connected(struct intel_encoder *encoder)
>  {
>  	struct intel_digital_port *dig_port = enc_to_dig_port(encoder);
>  	bool is_connected;
> -	enum intel_display_power_domain domain;
> -	intel_wakeref_t tc_cold_wref;
>  
>  	intel_tc_port_lock(dig_port);
> -	tc_cold_wref = tc_cold_block(dig_port, &domain);
>  
>  	is_connected = tc_port_live_status_mask(dig_port) &
>  		       BIT(dig_port->tc_mode);
>  
> -	tc_cold_unblock(dig_port, domain, tc_cold_wref);
>  	intel_tc_port_unlock(dig_port);
>  
>  	return is_connected;


^ permalink raw reply	[flat|nested] 72+ messages in thread

* Re: [Intel-gfx] [PATCH 13/13] drm/i915/tc: Fix system hang on ADL-P during TypeC PHY disconnect
  2021-09-21  0:23 ` [Intel-gfx] [PATCH 13/13] drm/i915/tc: Fix system hang on ADL-P during TypeC PHY disconnect Imre Deak
@ 2021-09-28 20:55   ` Souza, Jose
  2021-09-29 13:28   ` [Intel-gfx] [PATCH v2 " Imre Deak
  1 sibling, 0 replies; 72+ messages in thread
From: Souza, Jose @ 2021-09-28 20:55 UTC (permalink / raw)
  To: intel-gfx, Deak, Imre

On Tue, 2021-09-21 at 03:23 +0300, Imre Deak wrote:
> The PHY ownership release->AUX PW disable steps during a modeset
> disable->PHY disconnect sequence can hang the system if the PHY
> disconnect happens after disabling the PHY's PLL. The spec doesn't
> require a specific order for these two steps, so this issue is still
> being root caused by HW/FW teams. Until that is found, let's make
> sure the disconnect happens before the PLL is disabled, and do this on
> all platforms for consistency.
> 
> Cc: José Roberto de Souza <jose.souza@intel.com>
> Signed-off-by: Imre Deak <imre.deak@intel.com>
> ---
>  drivers/gpu/drm/i915/display/intel_tc.c | 6 ++++++
>  1 file changed, 6 insertions(+)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_tc.c b/drivers/gpu/drm/i915/display/intel_tc.c
> index 99b66c2852e53..dc52b76bd57e2 100644
> --- a/drivers/gpu/drm/i915/display/intel_tc.c
> +++ b/drivers/gpu/drm/i915/display/intel_tc.c
> @@ -813,6 +813,12 @@ void intel_tc_port_put_link(struct intel_digital_port *dig_port)
>  	intel_tc_port_lock(dig_port);
>  	--dig_port->tc_link_refcount;
>  	intel_tc_port_unlock(dig_port);
> +
> +	/*
> +	 * Disconnecting the PHY after the PHY's PLL gets disabled may
> +	 * hang the system on ADL-P, so disconnect the PHY here synchronously.
> +	 */

Please at to the comment that this is temporary while HW/FW teaams root cause it.

With that:
Reviewed-by: José Roberto de Souza <jose.souza@intel.com>

> +	intel_tc_port_flush_work(dig_port);
>  }
>  
>  static bool


^ permalink raw reply	[flat|nested] 72+ messages in thread

* Re: [Intel-gfx] [PATCH 07/13] drm/i915/tc: Add a mode for the TypeC PHY's disconnected state
  2021-09-28 20:38                     ` Imre Deak
@ 2021-09-28 20:56                       ` Souza, Jose
  0 siblings, 0 replies; 72+ messages in thread
From: Souza, Jose @ 2021-09-28 20:56 UTC (permalink / raw)
  To: Deak, Imre; +Cc: intel-gfx

On Tue, 2021-09-28 at 23:38 +0300, Imre Deak wrote:
> On Tue, Sep 28, 2021 at 11:29:49PM +0300, Souza, Jose wrote:
> > On Tue, 2021-09-28 at 23:08 +0300, Imre Deak wrote:
> > > On Tue, Sep 28, 2021 at 11:02:37PM +0300, Souza, Jose wrote:
> > > > On Tue, 2021-09-28 at 22:55 +0300, Imre Deak wrote:
> > > > > On Tue, Sep 28, 2021 at 10:45:50PM +0300, Souza, Jose wrote:
> > > > > > > > [...]
> > > > > > > > Would not be possible to use TC_PORT_DISCONNECTED when really
> > > > > > > > disconnected and dropping the use of TC_PORT_TBT_ALT for it?
> > > > > > > 
> > > > > > > TC_PORT_DISCONNECTED is the state when the PHY ownership is not held and
> > > > > > > we don't hold any power domains.
> > > > > > > 
> > > > > > > TC_PORT_TBT_ALT is the state when the PHY ownership is not held (like
> > > > > > > above), and we hold the power domain needed to block TC-cold.
> > > > > > 
> > > > > > Swapping it would make modes names do what their names intend to.
> > > > > > 
> > > > > > Up to the point that we only had TBT, TC alt and legacy it was fine to
> > > > > > keep into TBT mode when disconnected but now with a disconnected state
> > > > > > it do not make sense to keep it in TBT mode when disconnected.
> > > > > > 
> > > > > > Or you rename it to TC_PORT_UNKNOWN, as it sets to
> > > > > > TC_PORT_DISCONNECTED mode during tc_init() and when going to suspend.
> > > > > 
> > > > > Not sure what you mean, because what you describe is what actually
> > > > > happens. From all states icl_tc_phy_disconnect() will change to
> > > > > the disconnected state, which is the state at init time and during
> > > > > suspend or after unloading the driver.
> > > > 
> > > > I'm talking about the state when system is up without anything
> > > > connected to the port, after icl_tc_phy_disconnect() sets
> > > > dig_port->tc_mode = TC_PORT_DISCONNECTED, icl_tc_phy_connect() goes
> > > > and set it back to TC_PORT_TBT_ALT.
> > > 
> > > Yes, when the port is locked we are in one of TBT-alt, DP-alt or legacy
> > > mode. These are the only modes that make sense for an AUX transfer or a
> > > modeset, for which the lock was taken.
> > 
> > Okay at the end of the series mode goes to TC_PORT_DISCONNECTED if no
> > reference is held.
> 
> Yes.

With the warn_on fixed:

Reviewed-by: José Roberto de Souza <jose.souza@intel.com>

> 
> --Imre


^ permalink raw reply	[flat|nested] 72+ messages in thread

* [Intel-gfx] [PATCH v2 01/13] drm/i915/tc: Fix TypeC port init/resume time sanitization
  2021-09-21  0:23 ` [Intel-gfx] [PATCH 01/13] drm/i915/tc: Fix TypeC port init/resume time sanitization Imre Deak
  2021-09-23 23:10   ` Souza, Jose
@ 2021-09-29 13:28   ` Imre Deak
  2021-09-29 19:19     ` Souza, Jose
  1 sibling, 1 reply; 72+ messages in thread
From: Imre Deak @ 2021-09-29 13:28 UTC (permalink / raw)
  To: intel-gfx; +Cc: José Roberto de Souza, Ville Syrjälä

Atm during driver loading and system resume TypeC ports are accessed
before their HW/SW state is synced. Move the TypeC port sanitization to
the encoder's sync_state hook to fix this.

v2: Handle the encoder disabled case in gen11_dsi_sync_state() as well
    (Jose, Jani)

Fixes: f9e76a6e68d3 ("drm/i915: Add an encoder hook to sanitize its state during init/resume")
Cc: José Roberto de Souza <jose.souza@intel.com>
Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Imre Deak <imre.deak@intel.com>
---
 drivers/gpu/drm/i915/display/icl_dsi.c       | 10 ++++++++--
 drivers/gpu/drm/i915/display/intel_ddi.c     |  8 +++++++-
 drivers/gpu/drm/i915/display/intel_display.c | 20 +++++---------------
 3 files changed, 20 insertions(+), 18 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/icl_dsi.c b/drivers/gpu/drm/i915/display/icl_dsi.c
index 060bc8fb0d307..bd210166b0793 100644
--- a/drivers/gpu/drm/i915/display/icl_dsi.c
+++ b/drivers/gpu/drm/i915/display/icl_dsi.c
@@ -1599,8 +1599,14 @@ static void gen11_dsi_sync_state(struct intel_encoder *encoder,
 				 const struct intel_crtc_state *crtc_state)
 {
 	struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
-	struct intel_crtc *intel_crtc = to_intel_crtc(crtc_state->uapi.crtc);
-	enum pipe pipe = intel_crtc->pipe;
+	struct intel_crtc *intel_crtc;
+	enum pipe pipe;
+
+	if (!crtc_state)
+		return;
+
+	intel_crtc = to_intel_crtc(crtc_state->uapi.crtc);
+	pipe = intel_crtc->pipe;
 
 	/* wa verify 1409054076:icl,jsl,ehl */
 	if (DISPLAY_VER(dev_priv) == 11 && pipe == PIPE_B &&
diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c b/drivers/gpu/drm/i915/display/intel_ddi.c
index a4667741d3548..04572ce6630f9 100644
--- a/drivers/gpu/drm/i915/display/intel_ddi.c
+++ b/drivers/gpu/drm/i915/display/intel_ddi.c
@@ -3838,7 +3838,13 @@ void hsw_ddi_get_config(struct intel_encoder *encoder,
 static void intel_ddi_sync_state(struct intel_encoder *encoder,
 				 const struct intel_crtc_state *crtc_state)
 {
-	if (intel_crtc_has_dp_encoder(crtc_state))
+	struct drm_i915_private *i915 = to_i915(encoder->base.dev);
+	enum phy phy = intel_port_to_phy(i915, encoder->port);
+
+	if (intel_phy_is_tc(i915, phy))
+		intel_tc_port_sanitize(enc_to_dig_port(encoder));
+
+	if (crtc_state && intel_crtc_has_dp_encoder(crtc_state))
 		intel_dp_sync_state(encoder, crtc_state);
 }
 
diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
index 9e407760e51f6..5f241e2415cea 100644
--- a/drivers/gpu/drm/i915/display/intel_display.c
+++ b/drivers/gpu/drm/i915/display/intel_display.c
@@ -12285,18 +12285,16 @@ static void intel_modeset_readout_hw_state(struct drm_device *dev)
 	readout_plane_state(dev_priv);
 
 	for_each_intel_encoder(dev, encoder) {
+		struct intel_crtc_state *crtc_state = NULL;
+
 		pipe = 0;
 
 		if (encoder->get_hw_state(encoder, &pipe)) {
-			struct intel_crtc_state *crtc_state;
-
 			crtc = intel_get_crtc_for_pipe(dev_priv, pipe);
 			crtc_state = to_intel_crtc_state(crtc->base.state);
 
 			encoder->base.crtc = &crtc->base;
 			intel_encoder_get_config(encoder, crtc_state);
-			if (encoder->sync_state)
-				encoder->sync_state(encoder, crtc_state);
 
 			/* read out to slave crtc as well for bigjoiner */
 			if (crtc_state->bigjoiner) {
@@ -12311,6 +12309,9 @@ static void intel_modeset_readout_hw_state(struct drm_device *dev)
 			encoder->base.crtc = NULL;
 		}
 
+		if (encoder->sync_state)
+			encoder->sync_state(encoder, crtc_state);
+
 		drm_dbg_kms(&dev_priv->drm,
 			    "[ENCODER:%d:%s] hw state readout: %s, pipe %c\n",
 			    encoder->base.base.id, encoder->base.name,
@@ -12593,17 +12594,6 @@ intel_modeset_setup_hw_state(struct drm_device *dev,
 	intel_modeset_readout_hw_state(dev);
 
 	/* HW state is read out, now we need to sanitize this mess. */
-
-	/* Sanitize the TypeC port mode upfront, encoders depend on this */
-	for_each_intel_encoder(dev, encoder) {
-		enum phy phy = intel_port_to_phy(dev_priv, encoder->port);
-
-		/* We need to sanitize only the MST primary port. */
-		if (encoder->type != INTEL_OUTPUT_DP_MST &&
-		    intel_phy_is_tc(dev_priv, phy))
-			intel_tc_port_sanitize(enc_to_dig_port(encoder));
-	}
-
 	get_encoder_power_domains(dev_priv);
 
 	if (HAS_PCH_IBX(dev_priv))
-- 
2.27.0


^ permalink raw reply related	[flat|nested] 72+ messages in thread

* [Intel-gfx] [PATCH v2 04/13] drm/i915/tc: Check for DP-alt, legacy sinks before taking PHY ownership
  2021-09-21  0:23 ` [Intel-gfx] [PATCH 04/13] drm/i915/tc: Check for DP-alt, legacy sinks before taking PHY ownership Imre Deak
  2021-09-24  0:30   ` Souza, Jose
@ 2021-09-29 13:28   ` Imre Deak
  1 sibling, 0 replies; 72+ messages in thread
From: Imre Deak @ 2021-09-29 13:28 UTC (permalink / raw)
  To: intel-gfx; +Cc: José Roberto de Souza

On ADL-P the PHY ready/complete flag is always set even in TBT-alt mode.
To avoid taking the PHY ownership and the following spurious "PHY sudden
disconnect" messages on this platform when connecting the PHY in TBT
mode, check if there is any DP-alt or legacy sink connected before
taking the ownership.

v2: (Jose)
- Fix debug message clarifying that a TBT sink can be connected.
- Add comments describing the PHY complete HW flag semantic differences
  between adl-p and other platforms.

Cc: José Roberto de Souza <jose.souza@intel.com>
Signed-off-by: Imre Deak <imre.deak@intel.com>
Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
---
 drivers/gpu/drm/i915/display/intel_tc.c | 23 +++++++++++++++++++++++
 1 file changed, 23 insertions(+)

diff --git a/drivers/gpu/drm/i915/display/intel_tc.c b/drivers/gpu/drm/i915/display/intel_tc.c
index 0d3555437b0b1..4e5ff823a3a30 100644
--- a/drivers/gpu/drm/i915/display/intel_tc.c
+++ b/drivers/gpu/drm/i915/display/intel_tc.c
@@ -270,6 +270,14 @@ static u32 tc_port_live_status_mask(struct intel_digital_port *dig_port)
 	return icl_tc_port_live_status_mask(dig_port);
 }
 
+/*
+ * Return the PHY status complete flag indicating that display can acquire the
+ * PHY ownership. The IOM firmware sets this flag when a DP-alt or legacy sink
+ * is connected and it's ready to switch the ownership to display. The flag
+ * will be left cleared when a TBT-alt sink is connected, where the PHY is
+ * owned by the TBT subsystem and so switching the ownership to display is not
+ * required.
+ */
 static bool icl_tc_phy_status_complete(struct intel_digital_port *dig_port)
 {
 	struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev);
@@ -288,6 +296,13 @@ static bool icl_tc_phy_status_complete(struct intel_digital_port *dig_port)
 	return val & DP_PHY_MODE_STATUS_COMPLETED(dig_port->tc_phy_fia_idx);
 }
 
+/*
+ * Return the PHY status complete flag indicating that display can acquire the
+ * PHY ownership. The IOM firmware sets this flag when it's ready to switch
+ * the ownership to display, regardless of what sink is connected (TBT-alt,
+ * DP-alt, legacy or nothing). For TBT-alt sinks the PHY is owned by the TBT
+ * subsystem and so switching the ownership to display is not required.
+ */
 static bool adl_tc_phy_status_complete(struct intel_digital_port *dig_port)
 {
 	struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev);
@@ -424,6 +439,7 @@ static void icl_tc_phy_connect(struct intel_digital_port *dig_port,
 			       int required_lanes)
 {
 	struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev);
+	u32 live_status_mask;
 	int max_lanes;
 
 	if (!tc_phy_status_complete(dig_port)) {
@@ -432,6 +448,13 @@ static void icl_tc_phy_connect(struct intel_digital_port *dig_port,
 		goto out_set_tbt_alt_mode;
 	}
 
+	live_status_mask = tc_port_live_status_mask(dig_port);
+	if (!(live_status_mask & (BIT(TC_PORT_DP_ALT) | BIT(TC_PORT_LEGACY)))) {
+		drm_dbg_kms(&i915->drm, "Port %s: PHY ownership not required (live status %02x)\n",
+			    dig_port->tc_port_name, live_status_mask);
+		goto out_set_tbt_alt_mode;
+	}
+
 	if (!tc_phy_take_ownership(dig_port, true) &&
 	    !drm_WARN_ON(&i915->drm, dig_port->tc_legacy_port))
 		goto out_set_tbt_alt_mode;
-- 
2.27.0


^ permalink raw reply related	[flat|nested] 72+ messages in thread

* [Intel-gfx] [PATCH v2 07/13] drm/i915/tc: Add a mode for the TypeC PHY's disconnected state
  2021-09-21  0:23 ` [Intel-gfx] [PATCH 07/13] drm/i915/tc: Add a mode for the TypeC PHY's disconnected state Imre Deak
  2021-09-27 21:16   ` Souza, Jose
@ 2021-09-29 13:28   ` Imre Deak
  1 sibling, 0 replies; 72+ messages in thread
From: Imre Deak @ 2021-09-29 13:28 UTC (permalink / raw)
  To: intel-gfx; +Cc: José Roberto de Souza

A follow-up change will start to disconnect/re-connect PHYs around AUX
transfers and modeset enable/disables. To prepare for that add a new
TypeC PHY disconnected mode, to help tracking the TC-cold blocking power
domain status (no power domain in disconnected state, mode dependent
power domain in connected state).

v2: Move the !disconnected mode and phy-owned asserts in
    __intel_tc_port_lock() later in the patchset, when the asserts will
    hold. (Jose)

Cc: José Roberto de Souza <jose.souza@intel.com>
Signed-off-by: Imre Deak <imre.deak@intel.com>
Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
---
 drivers/gpu/drm/i915/display/intel_display.h |  1 +
 drivers/gpu/drm/i915/display/intel_tc.c      | 22 +++++++++++++-------
 2 files changed, 15 insertions(+), 8 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_display.h b/drivers/gpu/drm/i915/display/intel_display.h
index d425ee77aad71..87b96fed5e0ba 100644
--- a/drivers/gpu/drm/i915/display/intel_display.h
+++ b/drivers/gpu/drm/i915/display/intel_display.h
@@ -270,6 +270,7 @@ enum tc_port {
 };
 
 enum tc_port_mode {
+	TC_PORT_DISCONNECTED,
 	TC_PORT_TBT_ALT,
 	TC_PORT_DP_ALT,
 	TC_PORT_LEGACY,
diff --git a/drivers/gpu/drm/i915/display/intel_tc.c b/drivers/gpu/drm/i915/display/intel_tc.c
index 6d0a1b376767a..62a3070abf0a6 100644
--- a/drivers/gpu/drm/i915/display/intel_tc.c
+++ b/drivers/gpu/drm/i915/display/intel_tc.c
@@ -12,13 +12,14 @@
 static const char *tc_port_mode_name(enum tc_port_mode mode)
 {
 	static const char * const names[] = {
+		[TC_PORT_DISCONNECTED] = "disconnected",
 		[TC_PORT_TBT_ALT] = "tbt-alt",
 		[TC_PORT_DP_ALT] = "dp-alt",
 		[TC_PORT_LEGACY] = "legacy",
 	};
 
 	if (WARN_ON(mode >= ARRAY_SIZE(names)))
-		mode = TC_PORT_TBT_ALT;
+		mode = TC_PORT_DISCONNECTED;
 
 	return names[mode];
 }
@@ -529,10 +530,11 @@ static void icl_tc_phy_disconnect(struct intel_digital_port *dig_port)
 	case TC_PORT_LEGACY:
 	case TC_PORT_DP_ALT:
 		tc_phy_take_ownership(dig_port, false);
-		dig_port->tc_mode = TC_PORT_TBT_ALT;
-		break;
+		fallthrough;
 	case TC_PORT_TBT_ALT:
-		/* Nothing to do, we stay in TBT-alt mode */
+		dig_port->tc_mode = TC_PORT_DISCONNECTED;
+		fallthrough;
+	case TC_PORT_DISCONNECTED:
 		break;
 	default:
 		MISSING_CASE(dig_port->tc_mode);
@@ -637,31 +639,34 @@ void intel_tc_port_sanitize(struct intel_digital_port *dig_port)
 {
 	struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev);
 	struct intel_encoder *encoder = &dig_port->base;
-	intel_wakeref_t tc_cold_wref;
 	int active_links = 0;
 
 	mutex_lock(&dig_port->tc_lock);
-	tc_cold_wref = tc_cold_block(dig_port);
 
-	dig_port->tc_mode = intel_tc_port_get_current_mode(dig_port);
 	if (dig_port->dp.is_mst)
 		active_links = intel_dp_mst_encoder_active_links(dig_port);
 	else if (encoder->base.crtc)
 		active_links = to_intel_crtc(encoder->base.crtc)->active;
 
+	drm_WARN_ON(&i915->drm, dig_port->tc_mode != TC_PORT_DISCONNECTED);
 	if (active_links) {
+		intel_wakeref_t tc_cold_wref = tc_cold_block(dig_port);
+
+		dig_port->tc_mode = intel_tc_port_get_current_mode(dig_port);
+
 		if (!icl_tc_phy_is_connected(dig_port))
 			drm_dbg_kms(&i915->drm,
 				    "Port %s: PHY disconnected with %d active link(s)\n",
 				    dig_port->tc_port_name, active_links);
 		intel_tc_port_link_init_refcount(dig_port, active_links);
+
+		tc_cold_unblock(dig_port, tc_cold_wref);
 	}
 
 	drm_dbg_kms(&i915->drm, "Port %s: sanitize mode (%s)\n",
 		    dig_port->tc_port_name,
 		    tc_port_mode_name(dig_port->tc_mode));
 
-	tc_cold_unblock(dig_port, tc_cold_wref);
 	mutex_unlock(&dig_port->tc_lock);
 }
 
@@ -832,6 +837,7 @@ void intel_tc_port_init(struct intel_digital_port *dig_port, bool is_legacy)
 
 	mutex_init(&dig_port->tc_lock);
 	dig_port->tc_legacy_port = is_legacy;
+	dig_port->tc_mode = TC_PORT_DISCONNECTED;
 	dig_port->tc_link_refcount = 0;
 	tc_port_load_fia_params(i915, dig_port);
 }
-- 
2.27.0


^ permalink raw reply related	[flat|nested] 72+ messages in thread

* [Intel-gfx] [PATCH v2 08/13] drm/i915/tc: Refactor TC-cold block/unblock helpers
  2021-09-21  0:23 ` [Intel-gfx] [PATCH 08/13] drm/i915/tc: Refactor TC-cold block/unblock helpers Imre Deak
  2021-09-27 21:56   ` Souza, Jose
@ 2021-09-29 13:28   ` Imre Deak
  1 sibling, 0 replies; 72+ messages in thread
From: Imre Deak @ 2021-09-29 13:28 UTC (permalink / raw)
  To: intel-gfx; +Cc: José Roberto de Souza

A follow-up change will select the TC-cold blocking power domain based
on the TypeC mode, prepare for that here.

Also bring intel_tc_cold_requires_aux_pw() earlier to its logical place
for readability.

No functional change.

v2: Add code comment about IOM reg accesses in TCCOLD. (Jose)

Cc: José Roberto de Souza <jose.souza@intel.com>
Signed-off-by: Imre Deak <imre.deak@intel.com>
Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
---
 .../drm/i915/display/intel_display_types.h    |  2 +
 drivers/gpu/drm/i915/display/intel_tc.c       | 68 ++++++++++++-------
 2 files changed, 44 insertions(+), 26 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_display_types.h b/drivers/gpu/drm/i915/display/intel_display_types.h
index 9413ebae15f57..f41fdc376a516 100644
--- a/drivers/gpu/drm/i915/display/intel_display_types.h
+++ b/drivers/gpu/drm/i915/display/intel_display_types.h
@@ -1662,8 +1662,10 @@ struct intel_digital_port {
 	enum intel_display_power_domain ddi_io_power_domain;
 	intel_wakeref_t ddi_io_wakeref;
 	intel_wakeref_t aux_wakeref;
+
 	struct mutex tc_lock;	/* protects the TypeC port mode */
 	intel_wakeref_t tc_lock_wakeref;
+	enum intel_display_power_domain tc_lock_power_domain;
 	int tc_link_refcount;
 	bool tc_legacy_port:1;
 	char tc_port_name[8];
diff --git a/drivers/gpu/drm/i915/display/intel_tc.c b/drivers/gpu/drm/i915/display/intel_tc.c
index 62a3070abf0a6..69c917fce03e4 100644
--- a/drivers/gpu/drm/i915/display/intel_tc.c
+++ b/drivers/gpu/drm/i915/display/intel_tc.c
@@ -48,8 +48,16 @@ bool intel_tc_port_in_legacy_mode(struct intel_digital_port *dig_port)
 	return intel_tc_port_in_mode(dig_port, TC_PORT_LEGACY);
 }
 
+bool intel_tc_cold_requires_aux_pw(struct intel_digital_port *dig_port)
+{
+	struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev);
+
+	return (DISPLAY_VER(i915) == 11 && dig_port->tc_legacy_port) ||
+		IS_ALDERLAKE_P(i915);
+}
+
 static enum intel_display_power_domain
-tc_cold_get_power_domain(struct intel_digital_port *dig_port)
+tc_cold_get_power_domain(struct intel_digital_port *dig_port, enum tc_port_mode mode)
 {
 	if (intel_tc_cold_requires_aux_pw(dig_port))
 		return intel_legacy_aux_to_power_domain(dig_port->aux_ch);
@@ -58,23 +66,30 @@ tc_cold_get_power_domain(struct intel_digital_port *dig_port)
 }
 
 static intel_wakeref_t
-tc_cold_block(struct intel_digital_port *dig_port)
+tc_cold_block_in_mode(struct intel_digital_port *dig_port, enum tc_port_mode mode,
+		      enum intel_display_power_domain *domain)
 {
 	struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev);
-	enum intel_display_power_domain domain;
 
 	if (DISPLAY_VER(i915) == 11 && !dig_port->tc_legacy_port)
 		return 0;
 
-	domain = tc_cold_get_power_domain(dig_port);
-	return intel_display_power_get(i915, domain);
+	*domain = tc_cold_get_power_domain(dig_port, mode);
+
+	return intel_display_power_get(i915, *domain);
+}
+
+static intel_wakeref_t
+tc_cold_block(struct intel_digital_port *dig_port, enum intel_display_power_domain *domain)
+{
+	return tc_cold_block_in_mode(dig_port, dig_port->tc_mode, domain);
 }
 
 static void
-tc_cold_unblock(struct intel_digital_port *dig_port, intel_wakeref_t wakeref)
+tc_cold_unblock(struct intel_digital_port *dig_port, enum intel_display_power_domain domain,
+		intel_wakeref_t wakeref)
 {
 	struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev);
-	enum intel_display_power_domain domain;
 
 	/*
 	 * wakeref == -1, means some error happened saving save_depot_stack but
@@ -84,8 +99,7 @@ tc_cold_unblock(struct intel_digital_port *dig_port, intel_wakeref_t wakeref)
 	if (wakeref == 0)
 		return;
 
-	domain = tc_cold_get_power_domain(dig_port);
-	intel_display_power_put_async(i915, domain, wakeref);
+	intel_display_power_put(i915, domain, wakeref);
 }
 
 static void
@@ -98,7 +112,8 @@ assert_tc_cold_blocked(struct intel_digital_port *dig_port)
 		return;
 
 	enabled = intel_display_power_is_enabled(i915,
-						 tc_cold_get_power_domain(dig_port));
+						 tc_cold_get_power_domain(dig_port,
+									  dig_port->tc_mode));
 	drm_WARN_ON(&i915->drm, !enabled);
 }
 
@@ -269,6 +284,11 @@ static u32 adl_tc_port_live_status_mask(struct intel_digital_port *dig_port)
 	struct intel_uncore *uncore = &i915->uncore;
 	u32 val, mask = 0;
 
+	/*
+	 * On ADL-P HW/FW will wake from TCCOLD to complete the read access of
+	 * registers in IOM. Note that this doesn't apply to PHY and FIA
+	 * registers.
+	 */
 	val = intel_uncore_read(uncore, TCSS_DDI_STATUS(tc_port));
 	if (val & TCSS_DDI_STATUS_HPD_LIVE_STATUS_ALT)
 		mask |= BIT(TC_PORT_DP_ALT);
@@ -650,7 +670,8 @@ void intel_tc_port_sanitize(struct intel_digital_port *dig_port)
 
 	drm_WARN_ON(&i915->drm, dig_port->tc_mode != TC_PORT_DISCONNECTED);
 	if (active_links) {
-		intel_wakeref_t tc_cold_wref = tc_cold_block(dig_port);
+		enum intel_display_power_domain domain;
+		intel_wakeref_t tc_cold_wref = tc_cold_block(dig_port, &domain);
 
 		dig_port->tc_mode = intel_tc_port_get_current_mode(dig_port);
 
@@ -660,7 +681,7 @@ void intel_tc_port_sanitize(struct intel_digital_port *dig_port)
 				    dig_port->tc_port_name, active_links);
 		intel_tc_port_link_init_refcount(dig_port, active_links);
 
-		tc_cold_unblock(dig_port, tc_cold_wref);
+		tc_cold_unblock(dig_port, domain, tc_cold_wref);
 	}
 
 	drm_dbg_kms(&i915->drm, "Port %s: sanitize mode (%s)\n",
@@ -689,15 +710,16 @@ bool intel_tc_port_connected(struct intel_encoder *encoder)
 {
 	struct intel_digital_port *dig_port = enc_to_dig_port(encoder);
 	bool is_connected;
+	enum intel_display_power_domain domain;
 	intel_wakeref_t tc_cold_wref;
 
 	intel_tc_port_lock(dig_port);
-	tc_cold_wref = tc_cold_block(dig_port);
+	tc_cold_wref = tc_cold_block(dig_port, &domain);
 
 	is_connected = tc_port_live_status_mask(dig_port) &
 		       BIT(dig_port->tc_mode);
 
-	tc_cold_unblock(dig_port, tc_cold_wref);
+	tc_cold_unblock(dig_port, domain, tc_cold_wref);
 	intel_tc_port_unlock(dig_port);
 
 	return is_connected;
@@ -714,15 +736,16 @@ static void __intel_tc_port_lock(struct intel_digital_port *dig_port,
 	mutex_lock(&dig_port->tc_lock);
 
 	if (!dig_port->tc_link_refcount) {
+		enum intel_display_power_domain domain;
 		intel_wakeref_t tc_cold_wref;
 
-		tc_cold_wref = tc_cold_block(dig_port);
+		tc_cold_wref = tc_cold_block(dig_port, &domain);
 
 		if (force_disconnect || intel_tc_port_needs_reset(dig_port))
 			intel_tc_port_reset_mode(dig_port, required_lanes,
 						 force_disconnect);
 
-		tc_cold_unblock(dig_port, tc_cold_wref);
+		tc_cold_unblock(dig_port, domain, tc_cold_wref);
 	}
 
 	drm_WARN_ON(&i915->drm, dig_port->tc_lock_wakeref);
@@ -787,6 +810,7 @@ void intel_tc_port_put_link(struct intel_digital_port *dig_port)
 static bool
 tc_has_modular_fia(struct drm_i915_private *i915, struct intel_digital_port *dig_port)
 {
+	enum intel_display_power_domain domain;
 	intel_wakeref_t wakeref;
 	u32 val;
 
@@ -794,9 +818,9 @@ tc_has_modular_fia(struct drm_i915_private *i915, struct intel_digital_port *dig
 		return false;
 
 	mutex_lock(&dig_port->tc_lock);
-	wakeref = tc_cold_block(dig_port);
+	wakeref = tc_cold_block(dig_port, &domain);
 	val = intel_uncore_read(&i915->uncore, PORT_TX_DFLEXDPSP(FIA1));
-	tc_cold_unblock(dig_port, wakeref);
+	tc_cold_unblock(dig_port, domain, wakeref);
 	mutex_unlock(&dig_port->tc_lock);
 
 	drm_WARN_ON(&i915->drm, val == 0xffffffff);
@@ -841,11 +865,3 @@ void intel_tc_port_init(struct intel_digital_port *dig_port, bool is_legacy)
 	dig_port->tc_link_refcount = 0;
 	tc_port_load_fia_params(i915, dig_port);
 }
-
-bool intel_tc_cold_requires_aux_pw(struct intel_digital_port *dig_port)
-{
-	struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev);
-
-	return (DISPLAY_VER(i915) == 11 && dig_port->tc_legacy_port) ||
-		IS_ALDERLAKE_P(i915);
-}
-- 
2.27.0


^ permalink raw reply related	[flat|nested] 72+ messages in thread

* [Intel-gfx] [PATCH v2 09/13] drm/i915/tc: Avoid using legacy AUX PW in TBT mode
  2021-09-21  0:23 ` [Intel-gfx] [PATCH 09/13] drm/i915/tc: Avoid using legacy AUX PW in TBT mode Imre Deak
  2021-09-28 20:31   ` Souza, Jose
@ 2021-09-29 13:28   ` Imre Deak
  1 sibling, 0 replies; 72+ messages in thread
From: Imre Deak @ 2021-09-29 13:28 UTC (permalink / raw)
  To: intel-gfx; +Cc: José Roberto de Souza

For the ADL-P TBT mode the spec doesn't require blocking TC-cold by
using the legacy AUX power domain. To avoid the timeouts that this would
cause during PHY disconnect/reconnect sequences (which will be more
frequent after a follow-up change) use the TC_COLD_OFF power domain in
TBT mode on all platforms. On TGL this power domain blocks TC-cold via a
PUNIT command, while on other platforms the domain just takes a runtime
PM reference.

If the HPD live status indicates that the port mode needs to be reset
- for instance after switching from TBT to a DP-alt sink - still take
the AUX domain, since the IOM firmware handshake requires this.

v2: Rebased on v2 of the previous patch.

Cc: José Roberto de Souza <jose.souza@intel.com>
Signed-off-by: Imre Deak <imre.deak@intel.com>
Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
---
 drivers/gpu/drm/i915/display/intel_tc.c | 55 ++++++++++++++++---------
 1 file changed, 36 insertions(+), 19 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_tc.c b/drivers/gpu/drm/i915/display/intel_tc.c
index 69c917fce03e4..2df4d0beb6368 100644
--- a/drivers/gpu/drm/i915/display/intel_tc.c
+++ b/drivers/gpu/drm/i915/display/intel_tc.c
@@ -59,10 +59,10 @@ bool intel_tc_cold_requires_aux_pw(struct intel_digital_port *dig_port)
 static enum intel_display_power_domain
 tc_cold_get_power_domain(struct intel_digital_port *dig_port, enum tc_port_mode mode)
 {
-	if (intel_tc_cold_requires_aux_pw(dig_port))
-		return intel_legacy_aux_to_power_domain(dig_port->aux_ch);
-	else
+	if (mode == TC_PORT_TBT_ALT || !intel_tc_cold_requires_aux_pw(dig_port))
 		return POWER_DOMAIN_TC_COLD_OFF;
+
+	return intel_legacy_aux_to_power_domain(dig_port->aux_ch);
 }
 
 static intel_wakeref_t
@@ -645,6 +645,36 @@ static void intel_tc_port_reset_mode(struct intel_digital_port *dig_port,
 		    tc_port_mode_name(dig_port->tc_mode));
 }
 
+static bool intel_tc_port_needs_reset(struct intel_digital_port *dig_port)
+{
+	return intel_tc_port_get_target_mode(dig_port) != dig_port->tc_mode;
+}
+
+static void intel_tc_port_update_mode(struct intel_digital_port *dig_port,
+				      int required_lanes, bool force_disconnect)
+{
+	enum intel_display_power_domain domain;
+	intel_wakeref_t wref;
+	bool needs_reset = force_disconnect;
+
+	if (!needs_reset) {
+		/* Get power domain required to check the hotplug live status. */
+		wref = tc_cold_block(dig_port, &domain);
+		needs_reset = intel_tc_port_needs_reset(dig_port);
+		tc_cold_unblock(dig_port, domain, wref);
+	}
+
+	if (!needs_reset)
+		return;
+
+	/* Get power domain required for resetting the mode. */
+	wref = tc_cold_block_in_mode(dig_port, TC_PORT_DISCONNECTED, &domain);
+
+	intel_tc_port_reset_mode(dig_port, required_lanes, force_disconnect);
+
+	tc_cold_unblock(dig_port, domain, wref);
+}
+
 static void
 intel_tc_port_link_init_refcount(struct intel_digital_port *dig_port,
 				 int refcount)
@@ -691,11 +721,6 @@ void intel_tc_port_sanitize(struct intel_digital_port *dig_port)
 	mutex_unlock(&dig_port->tc_lock);
 }
 
-static bool intel_tc_port_needs_reset(struct intel_digital_port *dig_port)
-{
-	return intel_tc_port_get_target_mode(dig_port) != dig_port->tc_mode;
-}
-
 /*
  * The type-C ports are different because even when they are connected, they may
  * not be available/usable by the graphics driver: see the comment on
@@ -735,18 +760,10 @@ static void __intel_tc_port_lock(struct intel_digital_port *dig_port,
 
 	mutex_lock(&dig_port->tc_lock);
 
-	if (!dig_port->tc_link_refcount) {
-		enum intel_display_power_domain domain;
-		intel_wakeref_t tc_cold_wref;
 
-		tc_cold_wref = tc_cold_block(dig_port, &domain);
-
-		if (force_disconnect || intel_tc_port_needs_reset(dig_port))
-			intel_tc_port_reset_mode(dig_port, required_lanes,
-						 force_disconnect);
-
-		tc_cold_unblock(dig_port, domain, tc_cold_wref);
-	}
+	if (!dig_port->tc_link_refcount)
+		intel_tc_port_update_mode(dig_port, required_lanes,
+					  force_disconnect);
 
 	drm_WARN_ON(&i915->drm, dig_port->tc_lock_wakeref);
 	dig_port->tc_lock_wakeref = wakeref;
-- 
2.27.0


^ permalink raw reply related	[flat|nested] 72+ messages in thread

* [Intel-gfx] [PATCH v2 11/13] drm/i915/tc: Fix TypeC PHY connect/disconnect logic on ADL-P
  2021-09-21  0:23 ` [Intel-gfx] [PATCH 11/13] drm/i915/tc: Fix TypeC PHY connect/disconnect logic on ADL-P Imre Deak
  2021-09-28 20:51   ` Souza, Jose
@ 2021-09-29 13:28   ` Imre Deak
  1 sibling, 0 replies; 72+ messages in thread
From: Imre Deak @ 2021-09-29 13:28 UTC (permalink / raw)
  To: intel-gfx; +Cc: José Roberto de Souza

So far TC-cold was blocked only for the duration of TypeC mode resets.
The DP-alt and legacy modes require TC-cold to be blocked also whenever
the port is in use (AUX transfers, enable modeset), and this was ensured
by the held PHY ownership flag. On ADL-P this doesn't work, since the
PHY ownership flag is in a register backed by the PW#2 power well.
Whenever this power well is disabled the ownership flag is cleared by
the HW under the driver.

The only way to cleanly release and re-acquire the PHY ownership flag
and also allow for power saving (by disabling the display power wells
and reaching DC5/6 states) is to hold the TC-cold blocking power domains
while the PHY is connected and disconnect/reconnect the PHY on-demand
around AUX transfers and modeset enable/disables. Let's do that,
disconnecting a PHY with a 1 sec delay after it becomes idle. For
consistency do this on all platforms and TypeC modes.

v2: Add tc_mode!=disconnected and phy_is_owned asserts to
    __intel_tc_port_lock().

Cc: José Roberto de Souza <jose.souza@intel.com>
Signed-off-by: Imre Deak <imre.deak@intel.com>
Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
---
 drivers/gpu/drm/i915/display/intel_ddi.c      |  7 +-
 .../drm/i915/display/intel_display_types.h    |  1 +
 drivers/gpu/drm/i915/display/intel_tc.c       | 89 ++++++++++++-------
 drivers/gpu/drm/i915/display/intel_tc.h       |  2 +-
 4 files changed, 63 insertions(+), 36 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c b/drivers/gpu/drm/i915/display/intel_ddi.c
index 0fe77854b4557..51d07e9af9f3d 100644
--- a/drivers/gpu/drm/i915/display/intel_ddi.c
+++ b/drivers/gpu/drm/i915/display/intel_ddi.c
@@ -4017,8 +4017,11 @@ static void intel_ddi_encoder_destroy(struct drm_encoder *encoder)
 {
 	struct drm_i915_private *i915 = to_i915(encoder->dev);
 	struct intel_digital_port *dig_port = enc_to_dig_port(to_intel_encoder(encoder));
+	enum phy phy = intel_port_to_phy(i915, dig_port->base.port);
 
 	intel_dp_encoder_flush_work(encoder);
+	if (intel_phy_is_tc(i915, phy))
+		intel_tc_port_flush_work(dig_port);
 	intel_display_power_flush_work(i915);
 
 	drm_encoder_cleanup(encoder);
@@ -4443,7 +4446,7 @@ static void intel_ddi_encoder_suspend(struct intel_encoder *encoder)
 	if (!intel_phy_is_tc(i915, phy))
 		return;
 
-	intel_tc_port_disconnect_phy(dig_port);
+	intel_tc_port_flush_work(dig_port);
 }
 
 static void intel_ddi_encoder_shutdown(struct intel_encoder *encoder)
@@ -4458,7 +4461,7 @@ static void intel_ddi_encoder_shutdown(struct intel_encoder *encoder)
 	if (!intel_phy_is_tc(i915, phy))
 		return;
 
-	intel_tc_port_disconnect_phy(dig_port);
+	intel_tc_port_flush_work(dig_port);
 }
 
 #define port_tc_name(port) ((port) - PORT_TC1 + '1')
diff --git a/drivers/gpu/drm/i915/display/intel_display_types.h b/drivers/gpu/drm/i915/display/intel_display_types.h
index f41fdc376a516..6323911979373 100644
--- a/drivers/gpu/drm/i915/display/intel_display_types.h
+++ b/drivers/gpu/drm/i915/display/intel_display_types.h
@@ -1666,6 +1666,7 @@ struct intel_digital_port {
 	struct mutex tc_lock;	/* protects the TypeC port mode */
 	intel_wakeref_t tc_lock_wakeref;
 	enum intel_display_power_domain tc_lock_power_domain;
+	struct delayed_work tc_disconnect_phy_work;
 	int tc_link_refcount;
 	bool tc_legacy_port:1;
 	char tc_port_name[8];
diff --git a/drivers/gpu/drm/i915/display/intel_tc.c b/drivers/gpu/drm/i915/display/intel_tc.c
index 9367770de5d79..66cb321a4488d 100644
--- a/drivers/gpu/drm/i915/display/intel_tc.c
+++ b/drivers/gpu/drm/i915/display/intel_tc.c
@@ -666,6 +666,13 @@ static void intel_tc_port_update_mode(struct intel_digital_port *dig_port,
 
 	intel_tc_port_reset_mode(dig_port, required_lanes, force_disconnect);
 
+	/* Get power domain matching the new mode after reset. */
+	tc_cold_unblock(dig_port, dig_port->tc_lock_power_domain,
+			fetch_and_zero(&dig_port->tc_lock_wakeref));
+	if (dig_port->tc_mode != TC_PORT_DISCONNECTED)
+		dig_port->tc_lock_wakeref = tc_cold_block(dig_port,
+							  &dig_port->tc_lock_power_domain);
+
 	tc_cold_unblock(dig_port, domain, wref);
 }
 
@@ -693,6 +700,7 @@ void intel_tc_port_sanitize(struct intel_digital_port *dig_port)
 		active_links = to_intel_crtc(encoder->base.crtc)->active;
 
 	drm_WARN_ON(&i915->drm, dig_port->tc_mode != TC_PORT_DISCONNECTED);
+	drm_WARN_ON(&i915->drm, dig_port->tc_lock_wakeref);
 	if (active_links) {
 		enum intel_display_power_domain domain;
 		intel_wakeref_t tc_cold_wref = tc_cold_block(dig_port, &domain);
@@ -705,6 +713,9 @@ void intel_tc_port_sanitize(struct intel_digital_port *dig_port)
 				    dig_port->tc_port_name, active_links);
 		intel_tc_port_link_init_refcount(dig_port, active_links);
 
+		dig_port->tc_lock_wakeref = tc_cold_block(dig_port,
+							  &dig_port->tc_lock_power_domain);
+
 		tc_cold_unblock(dig_port, domain, tc_cold_wref);
 	}
 
@@ -745,56 +756,67 @@ bool intel_tc_port_connected(struct intel_encoder *encoder)
 }
 
 static void __intel_tc_port_lock(struct intel_digital_port *dig_port,
-				 int required_lanes, bool force_disconnect)
+				 int required_lanes)
 {
 	struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev);
-	intel_wakeref_t wakeref;
-
-	wakeref = intel_display_power_get(i915, POWER_DOMAIN_DISPLAY_CORE);
 
 	mutex_lock(&dig_port->tc_lock);
 
+	cancel_delayed_work(&dig_port->tc_disconnect_phy_work);
 
 	if (!dig_port->tc_link_refcount)
 		intel_tc_port_update_mode(dig_port, required_lanes,
-					  force_disconnect);
+					  false);
 
-	drm_WARN_ON(&i915->drm, dig_port->tc_lock_wakeref);
-	dig_port->tc_lock_wakeref = wakeref;
+	drm_WARN_ON(&i915->drm, dig_port->tc_mode == TC_PORT_DISCONNECTED);
+	drm_WARN_ON(&i915->drm, dig_port->tc_mode != TC_PORT_TBT_ALT &&
+				!tc_phy_is_owned(dig_port));
 }
 
 void intel_tc_port_lock(struct intel_digital_port *dig_port)
 {
-	__intel_tc_port_lock(dig_port, 1, false);
-}
-
-void intel_tc_port_unlock(struct intel_digital_port *dig_port)
-{
-	struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev);
-	intel_wakeref_t wakeref = fetch_and_zero(&dig_port->tc_lock_wakeref);
-
-	mutex_unlock(&dig_port->tc_lock);
-
-	intel_display_power_put_async(i915, POWER_DOMAIN_DISPLAY_CORE,
-				      wakeref);
+	__intel_tc_port_lock(dig_port, 1);
 }
 
 /**
- * intel_tc_port_disconnect_phy: disconnect TypeC PHY from display port
+ * intel_tc_port_disconnect_phy_work: disconnect TypeC PHY from display port
  * @dig_port: digital port
  *
  * Disconnect the given digital port from its TypeC PHY (handing back the
- * control of the PHY to the TypeC subsystem). The only purpose of this
- * function is to force the disconnect even with a TypeC display output still
- * plugged to the TypeC connector, which is required by the TypeC firmwares
- * during system suspend and shutdown. Otherwise - during the unplug event
- * handling - the PHY ownership is released automatically by
- * intel_tc_port_reset_mode(), when calling this function is not required.
+ * control of the PHY to the TypeC subsystem). This will happen in a delayed
+ * manner after each aux transactions and modeset disables.
  */
-void intel_tc_port_disconnect_phy(struct intel_digital_port *dig_port)
+static void intel_tc_port_disconnect_phy_work(struct work_struct *work)
 {
-	__intel_tc_port_lock(dig_port, 1, true);
-	intel_tc_port_unlock(dig_port);
+	struct intel_digital_port *dig_port =
+		container_of(work, struct intel_digital_port, tc_disconnect_phy_work.work);
+
+	mutex_lock(&dig_port->tc_lock);
+
+	if (!dig_port->tc_link_refcount)
+		intel_tc_port_update_mode(dig_port, 1, true);
+
+	mutex_unlock(&dig_port->tc_lock);
+}
+
+/**
+ * intel_tc_port_flush_work: flush the work disconnecting the PHY
+ * @dig_port: digital port
+ *
+ * Flush the delayed work disconnecting an idle PHY.
+ */
+void intel_tc_port_flush_work(struct intel_digital_port *dig_port)
+{
+	flush_delayed_work(&dig_port->tc_disconnect_phy_work);
+}
+
+void intel_tc_port_unlock(struct intel_digital_port *dig_port)
+{
+	if (!dig_port->tc_link_refcount && dig_port->tc_mode != TC_PORT_DISCONNECTED)
+		queue_delayed_work(system_unbound_wq, &dig_port->tc_disconnect_phy_work,
+				   msecs_to_jiffies(1000));
+
+	mutex_unlock(&dig_port->tc_lock);
 }
 
 bool intel_tc_port_ref_held(struct intel_digital_port *dig_port)
@@ -806,16 +828,16 @@ bool intel_tc_port_ref_held(struct intel_digital_port *dig_port)
 void intel_tc_port_get_link(struct intel_digital_port *dig_port,
 			    int required_lanes)
 {
-	__intel_tc_port_lock(dig_port, required_lanes, false);
+	__intel_tc_port_lock(dig_port, required_lanes);
 	dig_port->tc_link_refcount++;
 	intel_tc_port_unlock(dig_port);
 }
 
 void intel_tc_port_put_link(struct intel_digital_port *dig_port)
 {
-	mutex_lock(&dig_port->tc_lock);
-	dig_port->tc_link_refcount--;
-	mutex_unlock(&dig_port->tc_lock);
+	intel_tc_port_lock(dig_port);
+	--dig_port->tc_link_refcount;
+	intel_tc_port_unlock(dig_port);
 }
 
 static bool
@@ -871,6 +893,7 @@ void intel_tc_port_init(struct intel_digital_port *dig_port, bool is_legacy)
 		 "%c/TC#%d", port_name(port), tc_port + 1);
 
 	mutex_init(&dig_port->tc_lock);
+	INIT_DELAYED_WORK(&dig_port->tc_disconnect_phy_work, intel_tc_port_disconnect_phy_work);
 	dig_port->tc_legacy_port = is_legacy;
 	dig_port->tc_mode = TC_PORT_DISCONNECTED;
 	dig_port->tc_link_refcount = 0;
diff --git a/drivers/gpu/drm/i915/display/intel_tc.h b/drivers/gpu/drm/i915/display/intel_tc.h
index 0fdcddb4fc870..6b47b29f551c9 100644
--- a/drivers/gpu/drm/i915/display/intel_tc.h
+++ b/drivers/gpu/drm/i915/display/intel_tc.h
@@ -17,7 +17,6 @@ bool intel_tc_port_in_dp_alt_mode(struct intel_digital_port *dig_port);
 bool intel_tc_port_in_legacy_mode(struct intel_digital_port *dig_port);
 
 bool intel_tc_port_connected(struct intel_encoder *encoder);
-void intel_tc_port_disconnect_phy(struct intel_digital_port *dig_port);
 
 u32 intel_tc_port_get_lane_mask(struct intel_digital_port *dig_port);
 u32 intel_tc_port_get_pin_assignment_mask(struct intel_digital_port *dig_port);
@@ -28,6 +27,7 @@ void intel_tc_port_set_fia_lane_count(struct intel_digital_port *dig_port,
 void intel_tc_port_sanitize(struct intel_digital_port *dig_port);
 void intel_tc_port_lock(struct intel_digital_port *dig_port);
 void intel_tc_port_unlock(struct intel_digital_port *dig_port);
+void intel_tc_port_flush_work(struct intel_digital_port *dig_port);
 void intel_tc_port_get_link(struct intel_digital_port *dig_port,
 			    int required_lanes);
 void intel_tc_port_put_link(struct intel_digital_port *dig_port);
-- 
2.27.0


^ permalink raw reply related	[flat|nested] 72+ messages in thread

* [Intel-gfx] [PATCH v2 13/13] drm/i915/tc: Fix system hang on ADL-P during TypeC PHY disconnect
  2021-09-21  0:23 ` [Intel-gfx] [PATCH 13/13] drm/i915/tc: Fix system hang on ADL-P during TypeC PHY disconnect Imre Deak
  2021-09-28 20:55   ` Souza, Jose
@ 2021-09-29 13:28   ` Imre Deak
  1 sibling, 0 replies; 72+ messages in thread
From: Imre Deak @ 2021-09-29 13:28 UTC (permalink / raw)
  To: intel-gfx; +Cc: José Roberto de Souza

The PHY ownership release->AUX PW disable steps during a modeset
disable->PHY disconnect sequence can hang the system if the PHY
disconnect happens after disabling the PHY's PLL. The spec doesn't
require a specific order for these two steps, so this issue is still
being root caused by HW/FW teams. Until that is found, let's make
sure the disconnect happens before the PLL is disabled, and do this on
all platforms for consistency.

v2: Add a TODO comment to remove the w/a once the issue is root
    caused/fixed. (Jose)

Cc: José Roberto de Souza <jose.souza@intel.com>
Signed-off-by: Imre Deak <imre.deak@intel.com>
Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
---
 drivers/gpu/drm/i915/display/intel_tc.c | 8 ++++++++
 1 file changed, 8 insertions(+)

diff --git a/drivers/gpu/drm/i915/display/intel_tc.c b/drivers/gpu/drm/i915/display/intel_tc.c
index 4a14db604cbae..40faa18947c99 100644
--- a/drivers/gpu/drm/i915/display/intel_tc.c
+++ b/drivers/gpu/drm/i915/display/intel_tc.c
@@ -834,6 +834,14 @@ void intel_tc_port_put_link(struct intel_digital_port *dig_port)
 	intel_tc_port_lock(dig_port);
 	--dig_port->tc_link_refcount;
 	intel_tc_port_unlock(dig_port);
+
+	/*
+	 * Disconnecting the PHY after the PHY's PLL gets disabled may
+	 * hang the system on ADL-P, so disconnect the PHY here synchronously.
+	 * TODO: remove this once the root cause of the ordering requirement
+	 * is found/fixed.
+	 */
+	intel_tc_port_flush_work(dig_port);
 }
 
 static bool
-- 
2.27.0


^ permalink raw reply related	[flat|nested] 72+ messages in thread

* [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915/tc: Fix TypeC connect/disconnect sequences (rev8)
  2021-09-21  0:23 [Intel-gfx] [PATCH 00/13] drm/i915/tc: Fix TypeC connect/disconnect sequences Imre Deak
                   ` (16 preceding siblings ...)
  2021-09-21  3:01 ` [Intel-gfx] ✓ Fi.CI.IGT: " Patchwork
@ 2021-09-29 13:42 ` Patchwork
  2021-09-29 13:43 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork
                   ` (5 subsequent siblings)
  23 siblings, 0 replies; 72+ messages in thread
From: Patchwork @ 2021-09-29 13:42 UTC (permalink / raw)
  To: Imre Deak; +Cc: intel-gfx

== Series Details ==

Series: drm/i915/tc: Fix TypeC connect/disconnect sequences (rev8)
URL   : https://patchwork.freedesktop.org/series/94878/
State : warning

== Summary ==

$ dim checkpatch origin/drm-tip
7a1594f1ced8 drm/i915/tc: Fix TypeC port init/resume time sanitization
c01091513a71 drm/i915/adlp/tc: Fix PHY connected check for Thunderbolt mode
606f377a7dcc drm/i915/tc: Remove waiting for PHY complete during releasing ownership
-:13: WARNING:COMMIT_LOG_LONG_LINE: Possible unwrapped commit description (prefer a maximum 75 chars per line)
#13: 
commit ddec362724f9 ("drm/i915: Wait for TypeC PHY complete flag to clear in safe mode")

total: 0 errors, 1 warnings, 0 checks, 11 lines checked
adb7ecaceb9b drm/i915/tc: Check for DP-alt, legacy sinks before taking PHY ownership
03ba5a3c3391 drm/i915/tc: Add/use helpers to retrieve TypeC port properties
560710f22702 drm/i915/tc: Don't keep legacy TypeC ports in connected state w/o a sink
980d79eb09d2 drm/i915/tc: Add a mode for the TypeC PHY's disconnected state
9868a17a5a37 drm/i915/tc: Refactor TC-cold block/unblock helpers
43107536a80f drm/i915/tc: Avoid using legacy AUX PW in TBT mode
aa72ab7dada7 drm/i915/icl/tc: Remove the ICL special casing during TC-cold blocking
e39e52ba5422 drm/i915/tc: Fix TypeC PHY connect/disconnect logic on ADL-P
-:139: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis
#139: FILE: drivers/gpu/drm/i915/display/intel_tc.c:773:
+	drm_WARN_ON(&i915->drm, dig_port->tc_mode != TC_PORT_TBT_ALT &&
+				!tc_phy_is_owned(dig_port));

total: 0 errors, 0 warnings, 1 checks, 196 lines checked
76ecfcf236e0 drm/i915/tc: Drop extra TC cold blocking from intel_tc_port_connected()
6e3ad889b1c9 drm/i915/tc: Fix system hang on ADL-P during TypeC PHY disconnect



^ permalink raw reply	[flat|nested] 72+ messages in thread

* [Intel-gfx] ✗ Fi.CI.SPARSE: warning for drm/i915/tc: Fix TypeC connect/disconnect sequences (rev8)
  2021-09-21  0:23 [Intel-gfx] [PATCH 00/13] drm/i915/tc: Fix TypeC connect/disconnect sequences Imre Deak
                   ` (17 preceding siblings ...)
  2021-09-29 13:42 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915/tc: Fix TypeC connect/disconnect sequences (rev8) Patchwork
@ 2021-09-29 13:43 ` Patchwork
  2021-09-29 14:11 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
                   ` (4 subsequent siblings)
  23 siblings, 0 replies; 72+ messages in thread
From: Patchwork @ 2021-09-29 13:43 UTC (permalink / raw)
  To: Imre Deak; +Cc: intel-gfx

== Series Details ==

Series: drm/i915/tc: Fix TypeC connect/disconnect sequences (rev8)
URL   : https://patchwork.freedesktop.org/series/94878/
State : warning

== Summary ==

$ dim sparse --fast origin/drm-tip
Sparse version: v0.6.2
Fast mode used, each commit won't be checked separately.
-
+drivers/gpu/drm/i915/gt/intel_engine_stats.h:27:9: warning: trying to copy expression type 31
+drivers/gpu/drm/i915/gt/intel_engine_stats.h:27:9: warning: trying to copy expression type 31
+drivers/gpu/drm/i915/gt/intel_engine_stats.h:27:9: warning: trying to copy expression type 31
+drivers/gpu/drm/i915/gt/intel_engine_stats.h:32:9: warning: trying to copy expression type 31
+drivers/gpu/drm/i915/gt/intel_engine_stats.h:32:9: warning: trying to copy expression type 31
+drivers/gpu/drm/i915/gt/intel_engine_stats.h:49:9: warning: trying to copy expression type 31
+drivers/gpu/drm/i915/gt/intel_engine_stats.h:49:9: warning: trying to copy expression type 31
+drivers/gpu/drm/i915/gt/intel_engine_stats.h:49:9: warning: trying to copy expression type 31
+drivers/gpu/drm/i915/gt/intel_engine_stats.h:56:9: warning: trying to copy expression type 31
+drivers/gpu/drm/i915/gt/intel_engine_stats.h:56:9: warning: trying to copy expression type 31
+drivers/gpu/drm/i915/gt/intel_reset.c:1392:5: warning: context imbalance in 'intel_gt_reset_trylock' - different lock contexts for basic block
+drivers/gpu/drm/i915/i915_perf.c:1442:15: warning: memset with byte count of 16777216
+drivers/gpu/drm/i915/i915_perf.c:1496:15: warning: memset with byte count of 16777216
+./include/asm-generic/bitops/find.h:112:45: warning: shift count is negative (-262080)
+./include/asm-generic/bitops/find.h:32:31: warning: shift count is negative (-262080)
+./include/linux/spinlock.h:418:9: warning: context imbalance in 'fwtable_read16' - different lock contexts for basic block
+./include/linux/spinlock.h:418:9: warning: context imbalance in 'fwtable_read32' - different lock contexts for basic block
+./include/linux/spinlock.h:418:9: warning: context imbalance in 'fwtable_read64' - different lock contexts for basic block
+./include/linux/spinlock.h:418:9: warning: context imbalance in 'fwtable_read8' - different lock contexts for basic block
+./include/linux/spinlock.h:418:9: warning: context imbalance in 'fwtable_write16' - different lock contexts for basic block
+./include/linux/spinlock.h:418:9: warning: context imbalance in 'fwtable_write32' - different lock contexts for basic block
+./include/linux/spinlock.h:418:9: warning: context imbalance in 'fwtable_write8' - different lock contexts for basic block
+./include/linux/spinlock.h:418:9: warning: context imbalance in 'gen6_write16' - different lock contexts for basic block
+./include/linux/spinlock.h:418:9: warning: context imbalance in 'gen6_write32' - different lock contexts for basic block
+./include/linux/spinlock.h:418:9: warning: context imbalance in 'gen6_write8' - different lock contexts for basic block



^ permalink raw reply	[flat|nested] 72+ messages in thread

* [Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/tc: Fix TypeC connect/disconnect sequences (rev8)
  2021-09-21  0:23 [Intel-gfx] [PATCH 00/13] drm/i915/tc: Fix TypeC connect/disconnect sequences Imre Deak
                   ` (18 preceding siblings ...)
  2021-09-29 13:43 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork
@ 2021-09-29 14:11 ` Patchwork
  2021-09-29 16:58 ` [Intel-gfx] ✗ Fi.CI.IGT: failure " Patchwork
                   ` (3 subsequent siblings)
  23 siblings, 0 replies; 72+ messages in thread
From: Patchwork @ 2021-09-29 14:11 UTC (permalink / raw)
  To: Imre Deak; +Cc: intel-gfx

[-- Attachment #1: Type: text/plain, Size: 2647 bytes --]

== Series Details ==

Series: drm/i915/tc: Fix TypeC connect/disconnect sequences (rev8)
URL   : https://patchwork.freedesktop.org/series/94878/
State : success

== Summary ==

CI Bug Log - changes from CI_DRM_10660 -> Patchwork_21189
====================================================

Summary
-------

  **SUCCESS**

  No regressions found.

  External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/index.html

Known issues
------------

  Here are the changes found in Patchwork_21189 that come from known issues:

### IGT changes ###

#### Issues hit ####

  * igt@gem_exec_suspend@basic-s3:
    - fi-tgl-1115g4:      [PASS][1] -> [FAIL][2] ([i915#1888])
   [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10660/fi-tgl-1115g4/igt@gem_exec_suspend@basic-s3.html
   [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/fi-tgl-1115g4/igt@gem_exec_suspend@basic-s3.html

  
  [i915#1888]: https://gitlab.freedesktop.org/drm/intel/issues/1888


Participating hosts (33 -> 29)
------------------------------

  Missing    (4): fi-bsw-cyan bat-jsl-1 bat-dg1-6 bat-adlp-4 


Build changes
-------------

  * Linux: CI_DRM_10660 -> Patchwork_21189

  CI-20190529: 20190529
  CI_DRM_10660: 05888a7b7b4aec560d6692e5e9173adc7e76c0df @ git://anongit.freedesktop.org/gfx-ci/linux
  IGT_6227: 6ac2da7fd6b13f04f9aa0ec10f86b831d2756946 @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
  Patchwork_21189: 6e3ad889b1c988e7dcb7b3604f73e458576f928a @ git://anongit.freedesktop.org/gfx-ci/linux


== Linux commits ==

6e3ad889b1c9 drm/i915/tc: Fix system hang on ADL-P during TypeC PHY disconnect
76ecfcf236e0 drm/i915/tc: Drop extra TC cold blocking from intel_tc_port_connected()
e39e52ba5422 drm/i915/tc: Fix TypeC PHY connect/disconnect logic on ADL-P
aa72ab7dada7 drm/i915/icl/tc: Remove the ICL special casing during TC-cold blocking
43107536a80f drm/i915/tc: Avoid using legacy AUX PW in TBT mode
9868a17a5a37 drm/i915/tc: Refactor TC-cold block/unblock helpers
980d79eb09d2 drm/i915/tc: Add a mode for the TypeC PHY's disconnected state
560710f22702 drm/i915/tc: Don't keep legacy TypeC ports in connected state w/o a sink
03ba5a3c3391 drm/i915/tc: Add/use helpers to retrieve TypeC port properties
adb7ecaceb9b drm/i915/tc: Check for DP-alt, legacy sinks before taking PHY ownership
606f377a7dcc drm/i915/tc: Remove waiting for PHY complete during releasing ownership
c01091513a71 drm/i915/adlp/tc: Fix PHY connected check for Thunderbolt mode
7a1594f1ced8 drm/i915/tc: Fix TypeC port init/resume time sanitization

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/index.html

[-- Attachment #2: Type: text/html, Size: 3311 bytes --]

^ permalink raw reply	[flat|nested] 72+ messages in thread

* [Intel-gfx] ✗ Fi.CI.IGT: failure for drm/i915/tc: Fix TypeC connect/disconnect sequences (rev8)
  2021-09-21  0:23 [Intel-gfx] [PATCH 00/13] drm/i915/tc: Fix TypeC connect/disconnect sequences Imre Deak
                   ` (19 preceding siblings ...)
  2021-09-29 14:11 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
@ 2021-09-29 16:58 ` Patchwork
  2021-09-29 21:16   ` Imre Deak
  2021-09-29 21:47 ` Patchwork
                   ` (2 subsequent siblings)
  23 siblings, 1 reply; 72+ messages in thread
From: Patchwork @ 2021-09-29 16:58 UTC (permalink / raw)
  To: Imre Deak; +Cc: intel-gfx

[-- Attachment #1: Type: text/plain, Size: 30281 bytes --]

== Series Details ==

Series: drm/i915/tc: Fix TypeC connect/disconnect sequences (rev8)
URL   : https://patchwork.freedesktop.org/series/94878/
State : failure

== Summary ==

CI Bug Log - changes from CI_DRM_10660_full -> Patchwork_21189_full
====================================================

Summary
-------

  **FAILURE**

  Serious unknown changes coming with Patchwork_21189_full absolutely need to be
  verified manually.
  
  If you think the reported changes have nothing to do with the changes
  introduced in Patchwork_21189_full, please notify your bug team to allow them
  to document this new failure mode, which will reduce false positives in CI.

  

Possible new issues
-------------------

  Here are the unknown changes that may have been introduced in Patchwork_21189_full:

### IGT changes ###

#### Possible regressions ####

  * igt@fbdev@unaligned-read:
    - shard-glk:          [PASS][1] -> [FAIL][2]
   [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10660/shard-glk3/igt@fbdev@unaligned-read.html
   [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-glk4/igt@fbdev@unaligned-read.html

  * igt@gem_eio@reset-stress:
    - shard-skl:          [PASS][3] -> [FAIL][4]
   [3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10660/shard-skl1/igt@gem_eio@reset-stress.html
   [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-skl2/igt@gem_eio@reset-stress.html

  * igt@kms_async_flips@crc:
    - shard-skl:          NOTRUN -> [FAIL][5]
   [5]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-skl7/igt@kms_async_flips@crc.html

  
Known issues
------------

  Here are the changes found in Patchwork_21189_full that come from known issues:

### IGT changes ###

#### Issues hit ####

  * igt@gem_create@create-massive:
    - shard-apl:          NOTRUN -> [DMESG-WARN][6] ([i915#3002])
   [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-apl6/igt@gem_create@create-massive.html

  * igt@gem_ctx_sseu@mmap-args:
    - shard-tglb:         NOTRUN -> [SKIP][7] ([i915#280])
   [7]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-tglb2/igt@gem_ctx_sseu@mmap-args.html

  * igt@gem_eio@unwedge-stress:
    - shard-iclb:         [PASS][8] -> [TIMEOUT][9] ([i915#2369] / [i915#2481] / [i915#3070])
   [8]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10660/shard-iclb7/igt@gem_eio@unwedge-stress.html
   [9]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-iclb3/igt@gem_eio@unwedge-stress.html

  * igt@gem_exec_fair@basic-deadline:
    - shard-glk:          [PASS][10] -> [FAIL][11] ([i915#2846])
   [10]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10660/shard-glk8/igt@gem_exec_fair@basic-deadline.html
   [11]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-glk1/igt@gem_exec_fair@basic-deadline.html

  * igt@gem_exec_fair@basic-flow@rcs0:
    - shard-skl:          NOTRUN -> [SKIP][12] ([fdo#109271]) +106 similar issues
   [12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-skl1/igt@gem_exec_fair@basic-flow@rcs0.html

  * igt@gem_exec_fair@basic-none-share@rcs0:
    - shard-tglb:         [PASS][13] -> [FAIL][14] ([i915#2842]) +1 similar issue
   [13]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10660/shard-tglb1/igt@gem_exec_fair@basic-none-share@rcs0.html
   [14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-tglb6/igt@gem_exec_fair@basic-none-share@rcs0.html

  * igt@gem_exec_fair@basic-none-vip@rcs0:
    - shard-kbl:          [PASS][15] -> [FAIL][16] ([i915#2842])
   [15]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10660/shard-kbl2/igt@gem_exec_fair@basic-none-vip@rcs0.html
   [16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-kbl2/igt@gem_exec_fair@basic-none-vip@rcs0.html

  * igt@gem_exec_fair@basic-none@vcs1:
    - shard-iclb:         NOTRUN -> [FAIL][17] ([i915#2842])
   [17]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-iclb4/igt@gem_exec_fair@basic-none@vcs1.html

  * igt@gem_exec_fair@basic-pace@rcs0:
    - shard-iclb:         [PASS][18] -> [FAIL][19] ([i915#2842])
   [18]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10660/shard-iclb1/igt@gem_exec_fair@basic-pace@rcs0.html
   [19]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-iclb7/igt@gem_exec_fair@basic-pace@rcs0.html

  * igt@gem_exec_gttfill@basic:
    - shard-glk:          [PASS][20] -> [DMESG-WARN][21] ([i915#118] / [i915#95]) +1 similar issue
   [20]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10660/shard-glk1/igt@gem_exec_gttfill@basic.html
   [21]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-glk4/igt@gem_exec_gttfill@basic.html

  * igt@gem_exec_params@no-blt:
    - shard-tglb:         NOTRUN -> [SKIP][22] ([fdo#109283])
   [22]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-tglb3/igt@gem_exec_params@no-blt.html

  * igt@gem_exec_params@secure-non-master:
    - shard-tglb:         NOTRUN -> [SKIP][23] ([fdo#112283])
   [23]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-tglb3/igt@gem_exec_params@secure-non-master.html

  * igt@gem_ppgtt@flink-and-close-vma-leak:
    - shard-skl:          [PASS][24] -> [FAIL][25] ([i915#644])
   [24]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10660/shard-skl2/igt@gem_ppgtt@flink-and-close-vma-leak.html
   [25]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-skl3/igt@gem_ppgtt@flink-and-close-vma-leak.html

  * igt@gen3_render_tiledy_blits:
    - shard-tglb:         NOTRUN -> [SKIP][26] ([fdo#109289]) +2 similar issues
   [26]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-tglb8/igt@gen3_render_tiledy_blits.html

  * igt@gen9_exec_parse@unaligned-jump:
    - shard-tglb:         NOTRUN -> [SKIP][27] ([i915#2856])
   [27]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-tglb3/igt@gen9_exec_parse@unaligned-jump.html

  * igt@i915_pm_lpsp@kms-lpsp@kms-lpsp-dp:
    - shard-apl:          NOTRUN -> [SKIP][28] ([fdo#109271] / [i915#1937])
   [28]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-apl6/igt@i915_pm_lpsp@kms-lpsp@kms-lpsp-dp.html

  * igt@i915_pm_rpm@gem-execbuf-stress-pc8:
    - shard-tglb:         NOTRUN -> [SKIP][29] ([fdo#109506] / [i915#2411])
   [29]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-tglb3/igt@i915_pm_rpm@gem-execbuf-stress-pc8.html

  * igt@i915_selftest@live@gt_lrc:
    - shard-tglb:         NOTRUN -> [DMESG-FAIL][30] ([i915#2373])
   [30]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-tglb3/igt@i915_selftest@live@gt_lrc.html

  * igt@i915_selftest@live@gt_pm:
    - shard-tglb:         NOTRUN -> [DMESG-FAIL][31] ([i915#1759] / [i915#2291])
   [31]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-tglb3/igt@i915_selftest@live@gt_pm.html

  * igt@i915_suspend@forcewake:
    - shard-apl:          NOTRUN -> [DMESG-WARN][32] ([i915#180]) +1 similar issue
   [32]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-apl6/igt@i915_suspend@forcewake.html

  * igt@kms_big_fb@linear-16bpp-rotate-90:
    - shard-apl:          NOTRUN -> [SKIP][33] ([fdo#109271]) +195 similar issues
   [33]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-apl6/igt@kms_big_fb@linear-16bpp-rotate-90.html

  * igt@kms_big_fb@linear-32bpp-rotate-270:
    - shard-tglb:         NOTRUN -> [SKIP][34] ([fdo#111614])
   [34]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-tglb8/igt@kms_big_fb@linear-32bpp-rotate-270.html

  * igt@kms_big_fb@x-tiled-max-hw-stride-64bpp-rotate-180-async-flip:
    - shard-skl:          NOTRUN -> [FAIL][35] ([i915#3722]) +1 similar issue
   [35]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-skl8/igt@kms_big_fb@x-tiled-max-hw-stride-64bpp-rotate-180-async-flip.html

  * igt@kms_big_fb@yf-tiled-8bpp-rotate-90:
    - shard-tglb:         NOTRUN -> [SKIP][36] ([fdo#111615]) +1 similar issue
   [36]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-tglb3/igt@kms_big_fb@yf-tiled-8bpp-rotate-90.html

  * igt@kms_big_fb@yf-tiled-max-hw-stride-32bpp-rotate-0-hflip:
    - shard-apl:          NOTRUN -> [SKIP][37] ([fdo#109271] / [i915#3777]) +2 similar issues
   [37]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-apl3/igt@kms_big_fb@yf-tiled-max-hw-stride-32bpp-rotate-0-hflip.html

  * igt@kms_big_fb@yf-tiled-max-hw-stride-32bpp-rotate-180-hflip:
    - shard-kbl:          NOTRUN -> [SKIP][38] ([fdo#109271] / [i915#3777])
   [38]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-kbl3/igt@kms_big_fb@yf-tiled-max-hw-stride-32bpp-rotate-180-hflip.html
    - shard-skl:          NOTRUN -> [SKIP][39] ([fdo#109271] / [i915#3777])
   [39]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-skl8/igt@kms_big_fb@yf-tiled-max-hw-stride-32bpp-rotate-180-hflip.html

  * igt@kms_ccs@pipe-a-ccs-on-another-bo-yf_tiled_ccs:
    - shard-tglb:         NOTRUN -> [SKIP][40] ([i915#3689]) +3 similar issues
   [40]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-tglb3/igt@kms_ccs@pipe-a-ccs-on-another-bo-yf_tiled_ccs.html

  * igt@kms_ccs@pipe-b-ccs-on-another-bo-y_tiled_gen12_mc_ccs:
    - shard-skl:          NOTRUN -> [SKIP][41] ([fdo#109271] / [i915#3886]) +5 similar issues
   [41]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-skl9/igt@kms_ccs@pipe-b-ccs-on-another-bo-y_tiled_gen12_mc_ccs.html

  * igt@kms_ccs@pipe-b-random-ccs-data-y_tiled_gen12_mc_ccs:
    - shard-kbl:          NOTRUN -> [SKIP][42] ([fdo#109271] / [i915#3886]) +5 similar issues
   [42]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-kbl7/igt@kms_ccs@pipe-b-random-ccs-data-y_tiled_gen12_mc_ccs.html

  * igt@kms_ccs@pipe-c-ccs-on-another-bo-y_tiled_gen12_rc_ccs_cc:
    - shard-apl:          NOTRUN -> [SKIP][43] ([fdo#109271] / [i915#3886]) +14 similar issues
   [43]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-apl3/igt@kms_ccs@pipe-c-ccs-on-another-bo-y_tiled_gen12_rc_ccs_cc.html

  * igt@kms_ccs@pipe-c-missing-ccs-buffer-y_tiled_gen12_mc_ccs:
    - shard-tglb:         NOTRUN -> [SKIP][44] ([i915#3689] / [i915#3886]) +1 similar issue
   [44]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-tglb8/igt@kms_ccs@pipe-c-missing-ccs-buffer-y_tiled_gen12_mc_ccs.html

  * igt@kms_chamelium@vga-hpd-after-suspend:
    - shard-apl:          NOTRUN -> [SKIP][45] ([fdo#109271] / [fdo#111827]) +18 similar issues
   [45]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-apl3/igt@kms_chamelium@vga-hpd-after-suspend.html

  * igt@kms_color_chamelium@pipe-a-ctm-blue-to-red:
    - shard-kbl:          NOTRUN -> [SKIP][46] ([fdo#109271] / [fdo#111827]) +5 similar issues
   [46]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-kbl3/igt@kms_color_chamelium@pipe-a-ctm-blue-to-red.html

  * igt@kms_color_chamelium@pipe-b-ctm-max:
    - shard-skl:          NOTRUN -> [SKIP][47] ([fdo#109271] / [fdo#111827]) +6 similar issues
   [47]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-skl3/igt@kms_color_chamelium@pipe-b-ctm-max.html

  * igt@kms_color_chamelium@pipe-c-ctm-red-to-blue:
    - shard-tglb:         NOTRUN -> [SKIP][48] ([fdo#109284] / [fdo#111827]) +3 similar issues
   [48]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-tglb3/igt@kms_color_chamelium@pipe-c-ctm-red-to-blue.html

  * igt@kms_content_protection@lic:
    - shard-apl:          NOTRUN -> [TIMEOUT][49] ([i915#1319]) +1 similar issue
   [49]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-apl6/igt@kms_content_protection@lic.html

  * igt@kms_content_protection@mei_interface:
    - shard-tglb:         NOTRUN -> [SKIP][50] ([fdo#111828])
   [50]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-tglb3/igt@kms_content_protection@mei_interface.html

  * igt@kms_cursor_crc@pipe-a-cursor-512x170-random:
    - shard-tglb:         NOTRUN -> [SKIP][51] ([fdo#109279] / [i915#3359]) +1 similar issue
   [51]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-tglb8/igt@kms_cursor_crc@pipe-a-cursor-512x170-random.html

  * igt@kms_cursor_crc@pipe-a-cursor-suspend:
    - shard-skl:          NOTRUN -> [INCOMPLETE][52] ([i915#2828] / [i915#300])
   [52]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-skl9/igt@kms_cursor_crc@pipe-a-cursor-suspend.html

  * igt@kms_cursor_crc@pipe-c-cursor-32x10-rapid-movement:
    - shard-tglb:         NOTRUN -> [SKIP][53] ([i915#3359]) +3 similar issues
   [53]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-tglb3/igt@kms_cursor_crc@pipe-c-cursor-32x10-rapid-movement.html

  * igt@kms_cursor_crc@pipe-c-cursor-32x32-onscreen:
    - shard-tglb:         NOTRUN -> [SKIP][54] ([i915#3319])
   [54]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-tglb3/igt@kms_cursor_crc@pipe-c-cursor-32x32-onscreen.html

  * igt@kms_cursor_crc@pipe-d-cursor-suspend:
    - shard-kbl:          NOTRUN -> [SKIP][55] ([fdo#109271]) +79 similar issues
   [55]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-kbl7/igt@kms_cursor_crc@pipe-d-cursor-suspend.html
    - shard-tglb:         [PASS][56] -> [INCOMPLETE][57] ([i915#4211])
   [56]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10660/shard-tglb2/igt@kms_cursor_crc@pipe-d-cursor-suspend.html
   [57]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-tglb7/igt@kms_cursor_crc@pipe-d-cursor-suspend.html

  * igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions:
    - shard-skl:          [PASS][58] -> [FAIL][59] ([i915#2346])
   [58]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10660/shard-skl1/igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions.html
   [59]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-skl2/igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions.html

  * igt@kms_cursor_legacy@pipe-d-single-bo:
    - shard-kbl:          NOTRUN -> [SKIP][60] ([fdo#109271] / [i915#533]) +1 similar issue
   [60]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-kbl7/igt@kms_cursor_legacy@pipe-d-single-bo.html

  * igt@kms_flip@2x-plain-flip-ts-check:
    - shard-tglb:         NOTRUN -> [SKIP][61] ([fdo#111825]) +12 similar issues
   [61]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-tglb8/igt@kms_flip@2x-plain-flip-ts-check.html

  * igt@kms_flip@flip-vs-expired-vblank-interruptible@b-edp1:
    - shard-skl:          [PASS][62] -> [FAIL][63] ([i915#79])
   [62]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10660/shard-skl3/igt@kms_flip@flip-vs-expired-vblank-interruptible@b-edp1.html
   [63]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-skl7/igt@kms_flip@flip-vs-expired-vblank-interruptible@b-edp1.html

  * igt@kms_flip@flip-vs-suspend-interruptible@a-dp1:
    - shard-apl:          [PASS][64] -> [DMESG-WARN][65] ([i915#180])
   [64]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10660/shard-apl3/igt@kms_flip@flip-vs-suspend-interruptible@a-dp1.html
   [65]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-apl2/igt@kms_flip@flip-vs-suspend-interruptible@a-dp1.html

  * igt@kms_flip_scaled_crc@flip-32bpp-ytile-to-64bpp-ytile:
    - shard-iclb:         [PASS][66] -> [SKIP][67] ([i915#3701])
   [66]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10660/shard-iclb4/igt@kms_flip_scaled_crc@flip-32bpp-ytile-to-64bpp-ytile.html
   [67]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-iclb2/igt@kms_flip_scaled_crc@flip-32bpp-ytile-to-64bpp-ytile.html

  * igt@kms_flip_scaled_crc@flip-32bpp-ytileccs-to-64bpp-ytile:
    - shard-tglb:         NOTRUN -> [SKIP][68] ([i915#2587])
   [68]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-tglb8/igt@kms_flip_scaled_crc@flip-32bpp-ytileccs-to-64bpp-ytile.html

  * igt@kms_flip_scaled_crc@flip-64bpp-ytile-to-32bpp-ytilercccs:
    - shard-apl:          NOTRUN -> [SKIP][69] ([fdo#109271] / [i915#2672])
   [69]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-apl2/igt@kms_flip_scaled_crc@flip-64bpp-ytile-to-32bpp-ytilercccs.html

  * igt@kms_frontbuffer_tracking@fbc-suspend:
    - shard-kbl:          [PASS][70] -> [DMESG-WARN][71] ([i915#180]) +6 similar issues
   [70]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10660/shard-kbl4/igt@kms_frontbuffer_tracking@fbc-suspend.html
   [71]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-kbl1/igt@kms_frontbuffer_tracking@fbc-suspend.html

  * igt@kms_pipe_crc_basic@compare-crc-sanitycheck-pipe-d:
    - shard-apl:          NOTRUN -> [SKIP][72] ([fdo#109271] / [i915#533]) +1 similar issue
   [72]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-apl6/igt@kms_pipe_crc_basic@compare-crc-sanitycheck-pipe-d.html

  * igt@kms_pipe_crc_basic@suspend-read-crc-pipe-d:
    - shard-skl:          NOTRUN -> [SKIP][73] ([fdo#109271] / [i915#533])
   [73]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-skl8/igt@kms_pipe_crc_basic@suspend-read-crc-pipe-d.html

  * igt@kms_plane_alpha_blend@pipe-a-alpha-opaque-fb:
    - shard-apl:          NOTRUN -> [FAIL][74] ([fdo#108145] / [i915#265]) +2 similar issues
   [74]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-apl1/igt@kms_plane_alpha_blend@pipe-a-alpha-opaque-fb.html

  * igt@kms_plane_alpha_blend@pipe-a-coverage-7efc:
    - shard-skl:          [PASS][75] -> [FAIL][76] ([fdo#108145] / [i915#265])
   [75]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10660/shard-skl8/igt@kms_plane_alpha_blend@pipe-a-coverage-7efc.html
   [76]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-skl4/igt@kms_plane_alpha_blend@pipe-a-coverage-7efc.html

  * igt@kms_plane_alpha_blend@pipe-b-constant-alpha-max:
    - shard-kbl:          NOTRUN -> [FAIL][77] ([fdo#108145] / [i915#265])
   [77]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-kbl7/igt@kms_plane_alpha_blend@pipe-b-constant-alpha-max.html

  * igt@kms_plane_lowres@pipe-b-tiling-x:
    - shard-tglb:         NOTRUN -> [SKIP][78] ([i915#3536]) +1 similar issue
   [78]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-tglb3/igt@kms_plane_lowres@pipe-b-tiling-x.html

  * igt@kms_psr2_sf@overlay-plane-update-sf-dmg-area-4:
    - shard-kbl:          NOTRUN -> [SKIP][79] ([fdo#109271] / [i915#658]) +1 similar issue
   [79]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-kbl3/igt@kms_psr2_sf@overlay-plane-update-sf-dmg-area-4.html

  * igt@kms_psr2_sf@overlay-primary-update-sf-dmg-area-4:
    - shard-apl:          NOTRUN -> [SKIP][80] ([fdo#109271] / [i915#658]) +5 similar issues
   [80]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-apl1/igt@kms_psr2_sf@overlay-primary-update-sf-dmg-area-4.html

  * igt@kms_psr2_sf@primary-plane-update-sf-dmg-area-1:
    - shard-skl:          NOTRUN -> [SKIP][81] ([fdo#109271] / [i915#658]) +1 similar issue
   [81]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-skl1/igt@kms_psr2_sf@primary-plane-update-sf-dmg-area-1.html

  * igt@kms_psr@psr2_primary_mmap_gtt:
    - shard-tglb:         NOTRUN -> [FAIL][82] ([i915#132] / [i915#3467]) +1 similar issue
   [82]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-tglb8/igt@kms_psr@psr2_primary_mmap_gtt.html

  * igt@kms_psr@psr2_sprite_blt:
    - shard-iclb:         [PASS][83] -> [SKIP][84] ([fdo#109441]) +1 similar issue
   [83]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10660/shard-iclb2/igt@kms_psr@psr2_sprite_blt.html
   [84]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-iclb7/igt@kms_psr@psr2_sprite_blt.html

  * igt@kms_sysfs_edid_timing:
    - shard-kbl:          NOTRUN -> [FAIL][85] ([IGT#2])
   [85]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-kbl3/igt@kms_sysfs_edid_timing.html
    - shard-skl:          NOTRUN -> [FAIL][86] ([IGT#2])
   [86]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-skl8/igt@kms_sysfs_edid_timing.html

  * igt@kms_vblank@pipe-d-ts-continuation-suspend:
    - shard-tglb:         [PASS][87] -> [INCOMPLETE][88] ([i915#3896])
   [87]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10660/shard-tglb1/igt@kms_vblank@pipe-d-ts-continuation-suspend.html
   [88]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-tglb7/igt@kms_vblank@pipe-d-ts-continuation-suspend.html

  * igt@kms_writeback@writeback-check-output:
    - shard-tglb:         NOTRUN -> [SKIP][89] ([i915#2437]) +1 similar issue
   [89]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-tglb3/igt@kms_writeback@writeback-check-output.html

  * igt@prime_nv_api@i915_self_import_to_different_fd:
    - shard-tglb:         NOTRUN -> [SKIP][90] ([fdo#109291]) +1 similar issue
   [90]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-tglb8/igt@prime_nv_api@i915_self_import_to_different_fd.html

  * igt@syncobj_basic@bad-destroy:
    - shard-skl:          [PASS][91] -> [DMESG-WARN][92] ([i915#1982]) +1 similar issue
   [91]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10660/shard-skl5/igt@syncobj_basic@bad-destroy.html
   [92]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-skl5/igt@syncobj_basic@bad-destroy.html

  * igt@sysfs_clients@recycle-many:
    - shard-apl:          NOTRUN -> [SKIP][93] ([fdo#109271] / [i915#2994]) +3 similar issues
   [93]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-apl6/igt@sysfs_clients@recycle-many.html

  * igt@sysfs_clients@sema-50:
    - shard-kbl:          NOTRUN -> [SKIP][94] ([fdo#109271] / [i915#2994])
   [94]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-kbl7/igt@sysfs_clients@sema-50.html

  * igt@sysfs_clients@split-25:
    - shard-tglb:         NOTRUN -> [SKIP][95] ([i915#2994])
   [95]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-tglb3/igt@sysfs_clients@split-25.html

  
#### Possible fixes ####

  * igt@gem_exec_fair@basic-none-share@rcs0:
    - shard-iclb:         [FAIL][96] ([i915#2842]) -> [PASS][97]
   [96]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10660/shard-iclb2/igt@gem_exec_fair@basic-none-share@rcs0.html
   [97]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-iclb7/igt@gem_exec_fair@basic-none-share@rcs0.html

  * igt@gem_exec_fair@basic-pace-solo@rcs0:
    - shard-glk:          [FAIL][98] ([i915#2842]) -> [PASS][99]
   [98]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10660/shard-glk8/igt@gem_exec_fair@basic-pace-solo@rcs0.html
   [99]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-glk9/igt@gem_exec_fair@basic-pace-solo@rcs0.html

  * igt@gem_exec_fair@basic-pace@rcs0:
    - shard-tglb:         [FAIL][100] ([i915#2842]) -> [PASS][101]
   [100]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10660/shard-tglb5/igt@gem_exec_fair@basic-pace@rcs0.html
   [101]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-tglb6/igt@gem_exec_fair@basic-pace@rcs0.html

  * igt@gem_exec_fair@basic-pace@vcs1:
    - shard-kbl:          [FAIL][102] ([i915#2842]) -> [PASS][103]
   [102]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10660/shard-kbl6/igt@gem_exec_fair@basic-pace@vcs1.html
   [103]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-kbl2/igt@gem_exec_fair@basic-pace@vcs1.html

  * igt@gem_exec_params@dr1-dirt:
    - shard-skl:          [DMESG-WARN][104] ([i915#1982]) -> [PASS][105]
   [104]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10660/shard-skl4/igt@gem_exec_params@dr1-dirt.html
   [105]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-skl5/igt@gem_exec_params@dr1-dirt.html

  * igt@gem_ppgtt@flink-and-close-vma-leak:
    - shard-glk:          [FAIL][106] ([i915#644]) -> [PASS][107]
   [106]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10660/shard-glk6/igt@gem_ppgtt@flink-and-close-vma-leak.html
   [107]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-glk5/igt@gem_ppgtt@flink-and-close-vma-leak.html

  * igt@gem_softpin@noreloc-s3:
    - shard-kbl:          [DMESG-WARN][108] ([i915#180]) -> [PASS][109] +1 similar issue
   [108]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10660/shard-kbl1/igt@gem_softpin@noreloc-s3.html
   [109]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-kbl7/igt@gem_softpin@noreloc-s3.html

  * igt@gem_workarounds@suspend-resume-context:
    - shard-skl:          [INCOMPLETE][110] ([i915#198] / [i915#4173]) -> [PASS][111]
   [110]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10660/shard-skl2/igt@gem_workarounds@suspend-resume-context.html
   [111]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-skl8/igt@gem_workarounds@suspend-resume-context.html

  * igt@gen9_exec_parse@allowed-single:
    - shard-skl:          [DMESG-WARN][112] ([i915#1436] / [i915#716]) -> [PASS][113]
   [112]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10660/shard-skl9/igt@gen9_exec_parse@allowed-single.html
   [113]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-skl1/igt@gen9_exec_parse@allowed-single.html

  * igt@i915_pm_dc@dc6-dpms:
    - shard-iclb:         [FAIL][114] ([i915#454]) -> [PASS][115]
   [114]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10660/shard-iclb3/igt@i915_pm_dc@dc6-dpms.html
   [115]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-iclb4/igt@i915_pm_dc@dc6-dpms.html

  * igt@kms_big_fb@x-tiled-32bpp-rotate-0:
    - shard-glk:          [DMESG-WARN][116] ([i915#118] / [i915#95]) -> [PASS][117]
   [116]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10660/shard-glk4/igt@kms_big_fb@x-tiled-32bpp-rotate-0.html
   [117]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-glk7/igt@kms_big_fb@x-tiled-32bpp-rotate-0.html

  * igt@kms_flip@plain-flip-fb-recreate-interruptible@a-edp1:
    - shard-skl:          [FAIL][118] ([i915#2122]) -> [PASS][119]
   [118]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10660/shard-skl6/igt@kms_flip@plain-flip-fb-recreate-interruptible@a-edp1.html
   [119]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-skl1/igt@kms_flip@plain-flip-fb-recreate-interruptible@a-edp1.html

  * igt@kms_frontbuffer_tracking@psr-suspend:
    - shard-tglb:         [INCOMPLETE][120] ([i915#2411] / [i915#456]) -> [PASS][121] +1 similar issue
   [120]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10660/shard-tglb7/igt@kms_frontbuffer_tracking@psr-suspend.html
   [121]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-tglb3/igt@kms_frontbuffer_tracking@psr-suspend.html

  * igt@kms_hdr@bpc-switch:
    - shard-skl:          [FAIL][122] ([i915#1188]) -> [PASS][123]
   [122]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10660/shard-skl1/igt@kms_hdr@bpc-switch.html
   [123]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-skl2/igt@kms_hdr@bpc-switch.html

  * igt@kms_plane@plane-panning-bottom-right-suspend@pipe-a-planes:
    - shard-apl:          [DMESG-WARN][124] ([i915#180]) -> [PASS][125]
   [124]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10660/shard-apl6/igt@kms_plane@plane-panning-bottom-right-suspend@pipe-a-planes.html
   [125]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-apl2/igt@kms_plane@plane-panning-bottom-right-suspend@pipe-a-planes.html

  * igt@kms_plane_alpha_blend@pipe-b-constant-alpha-min:
    - shard-skl:          [FAIL][126] ([fdo#108145] / [i915#265]) -> [PASS][127]
   [126]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10660/shard-skl10/igt@kms_plane_alpha_blend@pipe-b-constant-alpha-min.html
   [127]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-skl10/igt@kms_plane_alpha_blend@pipe-b-constant-alpha-min.html

  * igt@kms_psr@psr2_cursor_mmap_cpu:
    - shard-iclb:         [SKIP][128] ([fdo#109441]) -> [PASS][129] +2 similar issues
   [128]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10660/shard-iclb4/igt@kms_psr@psr2_cursor_mmap_cpu.html
   [129]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-iclb2/igt@kms_psr@psr2_cursor_mmap_cpu.html

  * igt@perf@polling-parameterized:
    - shard-skl:          [FAIL][130] ([i915#1542]) -> [PASS][131]
   [130]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10660/shard-skl3/igt@perf@polling-parameterized.html
   [131]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-skl8/igt@perf@polling-parameterized.html

  
#### Warnings ####

  * igt@kms_psr2_sf@primary-plane-update-sf-dmg-area-2:
    - shard-iclb:         [SKIP][132] ([i915#658]) -> [SKIP][133] ([i915#2920]) +1 similar issue
   [132]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10660/shard-iclb4/igt@kms_psr2_sf@primary-plane-update-sf-dmg-area-2.html
   [133]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-iclb2/igt@kms_psr2_sf@primary-plane-update-sf-dmg-area-2.html

  * igt@kms_psr2_sf@primary-plane-update-sf-dmg-area-4:
    - shard-iclb:         [SKIP][134] ([i915#2920]) -> [SKIP][135] ([i915#658]) +2 similar issues
   [134]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10660/shard-iclb2/igt@kms_psr2_sf@primary-plane-update-sf-dmg-area-4.html
   [135]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-iclb7/igt@kms_psr2_sf@primary-plane-update-sf-dmg-area-4.html

  * igt@runner@aborted:
    - shard-kbl:          ([FAIL][136], [FAIL][137], [FAIL][138], [FAIL][139], [FAIL][140]) ([i915#180] / [i915#1814] / [i915#3002] / [i915#3363]) -> ([FAIL][141], [FAIL][142], [FAIL][143], [FAIL][144], [FAIL][145], [FAIL][146], [FAIL][147], [FAIL][148]) ([fdo#109271] / [i915#180] / [i915#1814] / [i915#3002] / [i915#3363] / [i915#602])
   [136]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10660/shard-kbl1/igt@runner@aborted.html
   [137]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10660/shard-kbl1/igt@runner@aborted.html
   [138]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10660/shard-kbl4/igt@runner@aborted.html
   [139]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10660/shard-kbl4/igt@runner@aborted.html
   [140]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10660/shard-kbl6/igt@runner@aborted.ht

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/index.html

[-- Attachment #2: Type: text/html, Size: 33540 bytes --]

^ permalink raw reply	[flat|nested] 72+ messages in thread

* Re: [Intel-gfx] [PATCH v2 01/13] drm/i915/tc: Fix TypeC port init/resume time sanitization
  2021-09-29 13:28   ` [Intel-gfx] [PATCH v2 " Imre Deak
@ 2021-09-29 19:19     ` Souza, Jose
  0 siblings, 0 replies; 72+ messages in thread
From: Souza, Jose @ 2021-09-29 19:19 UTC (permalink / raw)
  To: intel-gfx, Deak, Imre; +Cc: ville.syrjala

On Wed, 2021-09-29 at 16:28 +0300, Imre Deak wrote:
> Atm during driver loading and system resume TypeC ports are accessed
> before their HW/SW state is synced. Move the TypeC port sanitization to
> the encoder's sync_state hook to fix this.
> 
> v2: Handle the encoder disabled case in gen11_dsi_sync_state() as well
>     (Jose, Jani)

Reviewed-by: José Roberto de Souza <jose.souza@intel.com>

> 
> Fixes: f9e76a6e68d3 ("drm/i915: Add an encoder hook to sanitize its state during init/resume")
> Cc: José Roberto de Souza <jose.souza@intel.com>
> Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
> Signed-off-by: Imre Deak <imre.deak@intel.com>
> ---
>  drivers/gpu/drm/i915/display/icl_dsi.c       | 10 ++++++++--
>  drivers/gpu/drm/i915/display/intel_ddi.c     |  8 +++++++-
>  drivers/gpu/drm/i915/display/intel_display.c | 20 +++++---------------
>  3 files changed, 20 insertions(+), 18 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/display/icl_dsi.c b/drivers/gpu/drm/i915/display/icl_dsi.c
> index 060bc8fb0d307..bd210166b0793 100644
> --- a/drivers/gpu/drm/i915/display/icl_dsi.c
> +++ b/drivers/gpu/drm/i915/display/icl_dsi.c
> @@ -1599,8 +1599,14 @@ static void gen11_dsi_sync_state(struct intel_encoder *encoder,
>  				 const struct intel_crtc_state *crtc_state)
>  {
>  	struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
> -	struct intel_crtc *intel_crtc = to_intel_crtc(crtc_state->uapi.crtc);
> -	enum pipe pipe = intel_crtc->pipe;
> +	struct intel_crtc *intel_crtc;
> +	enum pipe pipe;
> +
> +	if (!crtc_state)
> +		return;
> +
> +	intel_crtc = to_intel_crtc(crtc_state->uapi.crtc);
> +	pipe = intel_crtc->pipe;
>  
>  	/* wa verify 1409054076:icl,jsl,ehl */
>  	if (DISPLAY_VER(dev_priv) == 11 && pipe == PIPE_B &&
> diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c b/drivers/gpu/drm/i915/display/intel_ddi.c
> index a4667741d3548..04572ce6630f9 100644
> --- a/drivers/gpu/drm/i915/display/intel_ddi.c
> +++ b/drivers/gpu/drm/i915/display/intel_ddi.c
> @@ -3838,7 +3838,13 @@ void hsw_ddi_get_config(struct intel_encoder *encoder,
>  static void intel_ddi_sync_state(struct intel_encoder *encoder,
>  				 const struct intel_crtc_state *crtc_state)
>  {
> -	if (intel_crtc_has_dp_encoder(crtc_state))
> +	struct drm_i915_private *i915 = to_i915(encoder->base.dev);
> +	enum phy phy = intel_port_to_phy(i915, encoder->port);
> +
> +	if (intel_phy_is_tc(i915, phy))
> +		intel_tc_port_sanitize(enc_to_dig_port(encoder));
> +
> +	if (crtc_state && intel_crtc_has_dp_encoder(crtc_state))
>  		intel_dp_sync_state(encoder, crtc_state);
>  }
>  
> diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
> index 9e407760e51f6..5f241e2415cea 100644
> --- a/drivers/gpu/drm/i915/display/intel_display.c
> +++ b/drivers/gpu/drm/i915/display/intel_display.c
> @@ -12285,18 +12285,16 @@ static void intel_modeset_readout_hw_state(struct drm_device *dev)
>  	readout_plane_state(dev_priv);
>  
>  	for_each_intel_encoder(dev, encoder) {
> +		struct intel_crtc_state *crtc_state = NULL;
> +
>  		pipe = 0;
>  
>  		if (encoder->get_hw_state(encoder, &pipe)) {
> -			struct intel_crtc_state *crtc_state;
> -
>  			crtc = intel_get_crtc_for_pipe(dev_priv, pipe);
>  			crtc_state = to_intel_crtc_state(crtc->base.state);
>  
>  			encoder->base.crtc = &crtc->base;
>  			intel_encoder_get_config(encoder, crtc_state);
> -			if (encoder->sync_state)
> -				encoder->sync_state(encoder, crtc_state);
>  
>  			/* read out to slave crtc as well for bigjoiner */
>  			if (crtc_state->bigjoiner) {
> @@ -12311,6 +12309,9 @@ static void intel_modeset_readout_hw_state(struct drm_device *dev)
>  			encoder->base.crtc = NULL;
>  		}
>  
> +		if (encoder->sync_state)
> +			encoder->sync_state(encoder, crtc_state);
> +
>  		drm_dbg_kms(&dev_priv->drm,
>  			    "[ENCODER:%d:%s] hw state readout: %s, pipe %c\n",
>  			    encoder->base.base.id, encoder->base.name,
> @@ -12593,17 +12594,6 @@ intel_modeset_setup_hw_state(struct drm_device *dev,
>  	intel_modeset_readout_hw_state(dev);
>  
>  	/* HW state is read out, now we need to sanitize this mess. */
> -
> -	/* Sanitize the TypeC port mode upfront, encoders depend on this */
> -	for_each_intel_encoder(dev, encoder) {
> -		enum phy phy = intel_port_to_phy(dev_priv, encoder->port);
> -
> -		/* We need to sanitize only the MST primary port. */
> -		if (encoder->type != INTEL_OUTPUT_DP_MST &&
> -		    intel_phy_is_tc(dev_priv, phy))
> -			intel_tc_port_sanitize(enc_to_dig_port(encoder));
> -	}
> -
>  	get_encoder_power_domains(dev_priv);
>  
>  	if (HAS_PCH_IBX(dev_priv))


^ permalink raw reply	[flat|nested] 72+ messages in thread

* Re: [Intel-gfx]  ✗ Fi.CI.IGT: failure for drm/i915/tc: Fix TypeC connect/disconnect sequences (rev8)
  2021-09-29 16:58 ` [Intel-gfx] ✗ Fi.CI.IGT: failure " Patchwork
@ 2021-09-29 21:16   ` Imre Deak
  2021-09-29 22:23     ` Vudum, Lakshminarayana
  0 siblings, 1 reply; 72+ messages in thread
From: Imre Deak @ 2021-09-29 21:16 UTC (permalink / raw)
  To: intel-gfx, Jose Souza, Lakshminarayana Vudum

On Wed, Sep 29, 2021 at 04:58:46PM +0000, Patchwork wrote:
> == Series Details ==
> 
> Series: drm/i915/tc: Fix TypeC connect/disconnect sequences (rev8)
> URL   : https://patchwork.freedesktop.org/series/94878/
> State : failure
> 
> == Summary ==
> 
> CI Bug Log - changes from CI_DRM_10660_full -> Patchwork_21189_full
> ====================================================
> 
> Summary
> -------
> 
>   **FAILURE**
> 
>   Serious unknown changes coming with Patchwork_21189_full absolutely need to be
>   verified manually.
>   
>   If you think the reported changes have nothing to do with the changes
>   introduced in Patchwork_21189_full, please notify your bug team to allow them
>   to document this new failure mode, which will reduce false positives in CI.
> 
> Possible new issues
> -------------------
> 
>   Here are the unknown changes that may have been introduced in Patchwork_21189_full:
> 
> ### IGT changes ###
> 
> #### Possible regressions ####
> 
>   * igt@fbdev@unaligned-read:
>     - shard-glk:          [PASS][1] -> [FAIL][2]
>    [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10660/shard-glk3/igt@fbdev@unaligned-read.html
>    [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-glk4/igt@fbdev@unaligned-read.html
> 
>   * igt@gem_eio@reset-stress:
>     - shard-skl:          [PASS][3] -> [FAIL][4]
>    [3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10660/shard-skl1/igt@gem_eio@reset-stress.html
>    [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-skl2/igt@gem_eio@reset-stress.html
> 
>   * igt@kms_async_flips@crc:
>     - shard-skl:          NOTRUN -> [FAIL][5]
>    [5]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-skl7/igt@kms_async_flips@crc.html

The above platforms don't have any TypeC ports, so the failures are
unrelated.

Thanks for the review, I pushed the patchset to drm-intel-next.

> Known issues
> ------------
> 
>   Here are the changes found in Patchwork_21189_full that come from known issues:
> 
> ### IGT changes ###
> 
> #### Issues hit ####
> 
>   * igt@gem_create@create-massive:
>     - shard-apl:          NOTRUN -> [DMESG-WARN][6] ([i915#3002])
>    [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-apl6/igt@gem_create@create-massive.html
> 
>   * igt@gem_ctx_sseu@mmap-args:
>     - shard-tglb:         NOTRUN -> [SKIP][7] ([i915#280])
>    [7]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-tglb2/igt@gem_ctx_sseu@mmap-args.html
> 
>   * igt@gem_eio@unwedge-stress:
>     - shard-iclb:         [PASS][8] -> [TIMEOUT][9] ([i915#2369] / [i915#2481] / [i915#3070])
>    [8]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10660/shard-iclb7/igt@gem_eio@unwedge-stress.html
>    [9]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-iclb3/igt@gem_eio@unwedge-stress.html
> 
>   * igt@gem_exec_fair@basic-deadline:
>     - shard-glk:          [PASS][10] -> [FAIL][11] ([i915#2846])
>    [10]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10660/shard-glk8/igt@gem_exec_fair@basic-deadline.html
>    [11]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-glk1/igt@gem_exec_fair@basic-deadline.html
> 
>   * igt@gem_exec_fair@basic-flow@rcs0:
>     - shard-skl:          NOTRUN -> [SKIP][12] ([fdo#109271]) +106 similar issues
>    [12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-skl1/igt@gem_exec_fair@basic-flow@rcs0.html
> 
>   * igt@gem_exec_fair@basic-none-share@rcs0:
>     - shard-tglb:         [PASS][13] -> [FAIL][14] ([i915#2842]) +1 similar issue
>    [13]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10660/shard-tglb1/igt@gem_exec_fair@basic-none-share@rcs0.html
>    [14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-tglb6/igt@gem_exec_fair@basic-none-share@rcs0.html
> 
>   * igt@gem_exec_fair@basic-none-vip@rcs0:
>     - shard-kbl:          [PASS][15] -> [FAIL][16] ([i915#2842])
>    [15]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10660/shard-kbl2/igt@gem_exec_fair@basic-none-vip@rcs0.html
>    [16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-kbl2/igt@gem_exec_fair@basic-none-vip@rcs0.html
> 
>   * igt@gem_exec_fair@basic-none@vcs1:
>     - shard-iclb:         NOTRUN -> [FAIL][17] ([i915#2842])
>    [17]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-iclb4/igt@gem_exec_fair@basic-none@vcs1.html
> 
>   * igt@gem_exec_fair@basic-pace@rcs0:
>     - shard-iclb:         [PASS][18] -> [FAIL][19] ([i915#2842])
>    [18]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10660/shard-iclb1/igt@gem_exec_fair@basic-pace@rcs0.html
>    [19]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-iclb7/igt@gem_exec_fair@basic-pace@rcs0.html
> 
>   * igt@gem_exec_gttfill@basic:
>     - shard-glk:          [PASS][20] -> [DMESG-WARN][21] ([i915#118] / [i915#95]) +1 similar issue
>    [20]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10660/shard-glk1/igt@gem_exec_gttfill@basic.html
>    [21]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-glk4/igt@gem_exec_gttfill@basic.html
> 
>   * igt@gem_exec_params@no-blt:
>     - shard-tglb:         NOTRUN -> [SKIP][22] ([fdo#109283])
>    [22]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-tglb3/igt@gem_exec_params@no-blt.html
> 
>   * igt@gem_exec_params@secure-non-master:
>     - shard-tglb:         NOTRUN -> [SKIP][23] ([fdo#112283])
>    [23]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-tglb3/igt@gem_exec_params@secure-non-master.html
> 
>   * igt@gem_ppgtt@flink-and-close-vma-leak:
>     - shard-skl:          [PASS][24] -> [FAIL][25] ([i915#644])
>    [24]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10660/shard-skl2/igt@gem_ppgtt@flink-and-close-vma-leak.html
>    [25]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-skl3/igt@gem_ppgtt@flink-and-close-vma-leak.html
> 
>   * igt@gen3_render_tiledy_blits:
>     - shard-tglb:         NOTRUN -> [SKIP][26] ([fdo#109289]) +2 similar issues
>    [26]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-tglb8/igt@gen3_render_tiledy_blits.html
> 
>   * igt@gen9_exec_parse@unaligned-jump:
>     - shard-tglb:         NOTRUN -> [SKIP][27] ([i915#2856])
>    [27]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-tglb3/igt@gen9_exec_parse@unaligned-jump.html
> 
>   * igt@i915_pm_lpsp@kms-lpsp@kms-lpsp-dp:
>     - shard-apl:          NOTRUN -> [SKIP][28] ([fdo#109271] / [i915#1937])
>    [28]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-apl6/igt@i915_pm_lpsp@kms-lpsp@kms-lpsp-dp.html
> 
>   * igt@i915_pm_rpm@gem-execbuf-stress-pc8:
>     - shard-tglb:         NOTRUN -> [SKIP][29] ([fdo#109506] / [i915#2411])
>    [29]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-tglb3/igt@i915_pm_rpm@gem-execbuf-stress-pc8.html
> 
>   * igt@i915_selftest@live@gt_lrc:
>     - shard-tglb:         NOTRUN -> [DMESG-FAIL][30] ([i915#2373])
>    [30]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-tglb3/igt@i915_selftest@live@gt_lrc.html
> 
>   * igt@i915_selftest@live@gt_pm:
>     - shard-tglb:         NOTRUN -> [DMESG-FAIL][31] ([i915#1759] / [i915#2291])
>    [31]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-tglb3/igt@i915_selftest@live@gt_pm.html
> 
>   * igt@i915_suspend@forcewake:
>     - shard-apl:          NOTRUN -> [DMESG-WARN][32] ([i915#180]) +1 similar issue
>    [32]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-apl6/igt@i915_suspend@forcewake.html
> 
>   * igt@kms_big_fb@linear-16bpp-rotate-90:
>     - shard-apl:          NOTRUN -> [SKIP][33] ([fdo#109271]) +195 similar issues
>    [33]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-apl6/igt@kms_big_fb@linear-16bpp-rotate-90.html
> 
>   * igt@kms_big_fb@linear-32bpp-rotate-270:
>     - shard-tglb:         NOTRUN -> [SKIP][34] ([fdo#111614])
>    [34]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-tglb8/igt@kms_big_fb@linear-32bpp-rotate-270.html
> 
>   * igt@kms_big_fb@x-tiled-max-hw-stride-64bpp-rotate-180-async-flip:
>     - shard-skl:          NOTRUN -> [FAIL][35] ([i915#3722]) +1 similar issue
>    [35]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-skl8/igt@kms_big_fb@x-tiled-max-hw-stride-64bpp-rotate-180-async-flip.html
> 
>   * igt@kms_big_fb@yf-tiled-8bpp-rotate-90:
>     - shard-tglb:         NOTRUN -> [SKIP][36] ([fdo#111615]) +1 similar issue
>    [36]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-tglb3/igt@kms_big_fb@yf-tiled-8bpp-rotate-90.html
> 
>   * igt@kms_big_fb@yf-tiled-max-hw-stride-32bpp-rotate-0-hflip:
>     - shard-apl:          NOTRUN -> [SKIP][37] ([fdo#109271] / [i915#3777]) +2 similar issues
>    [37]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-apl3/igt@kms_big_fb@yf-tiled-max-hw-stride-32bpp-rotate-0-hflip.html
> 
>   * igt@kms_big_fb@yf-tiled-max-hw-stride-32bpp-rotate-180-hflip:
>     - shard-kbl:          NOTRUN -> [SKIP][38] ([fdo#109271] / [i915#3777])
>    [38]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-kbl3/igt@kms_big_fb@yf-tiled-max-hw-stride-32bpp-rotate-180-hflip.html
>     - shard-skl:          NOTRUN -> [SKIP][39] ([fdo#109271] / [i915#3777])
>    [39]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-skl8/igt@kms_big_fb@yf-tiled-max-hw-stride-32bpp-rotate-180-hflip.html
> 
>   * igt@kms_ccs@pipe-a-ccs-on-another-bo-yf_tiled_ccs:
>     - shard-tglb:         NOTRUN -> [SKIP][40] ([i915#3689]) +3 similar issues
>    [40]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-tglb3/igt@kms_ccs@pipe-a-ccs-on-another-bo-yf_tiled_ccs.html
> 
>   * igt@kms_ccs@pipe-b-ccs-on-another-bo-y_tiled_gen12_mc_ccs:
>     - shard-skl:          NOTRUN -> [SKIP][41] ([fdo#109271] / [i915#3886]) +5 similar issues
>    [41]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-skl9/igt@kms_ccs@pipe-b-ccs-on-another-bo-y_tiled_gen12_mc_ccs.html
> 
>   * igt@kms_ccs@pipe-b-random-ccs-data-y_tiled_gen12_mc_ccs:
>     - shard-kbl:          NOTRUN -> [SKIP][42] ([fdo#109271] / [i915#3886]) +5 similar issues
>    [42]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-kbl7/igt@kms_ccs@pipe-b-random-ccs-data-y_tiled_gen12_mc_ccs.html
> 
>   * igt@kms_ccs@pipe-c-ccs-on-another-bo-y_tiled_gen12_rc_ccs_cc:
>     - shard-apl:          NOTRUN -> [SKIP][43] ([fdo#109271] / [i915#3886]) +14 similar issues
>    [43]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-apl3/igt@kms_ccs@pipe-c-ccs-on-another-bo-y_tiled_gen12_rc_ccs_cc.html
> 
>   * igt@kms_ccs@pipe-c-missing-ccs-buffer-y_tiled_gen12_mc_ccs:
>     - shard-tglb:         NOTRUN -> [SKIP][44] ([i915#3689] / [i915#3886]) +1 similar issue
>    [44]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-tglb8/igt@kms_ccs@pipe-c-missing-ccs-buffer-y_tiled_gen12_mc_ccs.html
> 
>   * igt@kms_chamelium@vga-hpd-after-suspend:
>     - shard-apl:          NOTRUN -> [SKIP][45] ([fdo#109271] / [fdo#111827]) +18 similar issues
>    [45]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-apl3/igt@kms_chamelium@vga-hpd-after-suspend.html
> 
>   * igt@kms_color_chamelium@pipe-a-ctm-blue-to-red:
>     - shard-kbl:          NOTRUN -> [SKIP][46] ([fdo#109271] / [fdo#111827]) +5 similar issues
>    [46]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-kbl3/igt@kms_color_chamelium@pipe-a-ctm-blue-to-red.html
> 
>   * igt@kms_color_chamelium@pipe-b-ctm-max:
>     - shard-skl:          NOTRUN -> [SKIP][47] ([fdo#109271] / [fdo#111827]) +6 similar issues
>    [47]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-skl3/igt@kms_color_chamelium@pipe-b-ctm-max.html
> 
>   * igt@kms_color_chamelium@pipe-c-ctm-red-to-blue:
>     - shard-tglb:         NOTRUN -> [SKIP][48] ([fdo#109284] / [fdo#111827]) +3 similar issues
>    [48]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-tglb3/igt@kms_color_chamelium@pipe-c-ctm-red-to-blue.html
> 
>   * igt@kms_content_protection@lic:
>     - shard-apl:          NOTRUN -> [TIMEOUT][49] ([i915#1319]) +1 similar issue
>    [49]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-apl6/igt@kms_content_protection@lic.html
> 
>   * igt@kms_content_protection@mei_interface:
>     - shard-tglb:         NOTRUN -> [SKIP][50] ([fdo#111828])
>    [50]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-tglb3/igt@kms_content_protection@mei_interface.html
> 
>   * igt@kms_cursor_crc@pipe-a-cursor-512x170-random:
>     - shard-tglb:         NOTRUN -> [SKIP][51] ([fdo#109279] / [i915#3359]) +1 similar issue
>    [51]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-tglb8/igt@kms_cursor_crc@pipe-a-cursor-512x170-random.html
> 
>   * igt@kms_cursor_crc@pipe-a-cursor-suspend:
>     - shard-skl:          NOTRUN -> [INCOMPLETE][52] ([i915#2828] / [i915#300])
>    [52]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-skl9/igt@kms_cursor_crc@pipe-a-cursor-suspend.html
> 
>   * igt@kms_cursor_crc@pipe-c-cursor-32x10-rapid-movement:
>     - shard-tglb:         NOTRUN -> [SKIP][53] ([i915#3359]) +3 similar issues
>    [53]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-tglb3/igt@kms_cursor_crc@pipe-c-cursor-32x10-rapid-movement.html
> 
>   * igt@kms_cursor_crc@pipe-c-cursor-32x32-onscreen:
>     - shard-tglb:         NOTRUN -> [SKIP][54] ([i915#3319])
>    [54]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-tglb3/igt@kms_cursor_crc@pipe-c-cursor-32x32-onscreen.html
> 
>   * igt@kms_cursor_crc@pipe-d-cursor-suspend:
>     - shard-kbl:          NOTRUN -> [SKIP][55] ([fdo#109271]) +79 similar issues
>    [55]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-kbl7/igt@kms_cursor_crc@pipe-d-cursor-suspend.html
>     - shard-tglb:         [PASS][56] -> [INCOMPLETE][57] ([i915#4211])
>    [56]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10660/shard-tglb2/igt@kms_cursor_crc@pipe-d-cursor-suspend.html
>    [57]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-tglb7/igt@kms_cursor_crc@pipe-d-cursor-suspend.html
> 
>   * igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions:
>     - shard-skl:          [PASS][58] -> [FAIL][59] ([i915#2346])
>    [58]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10660/shard-skl1/igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions.html
>    [59]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-skl2/igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions.html
> 
>   * igt@kms_cursor_legacy@pipe-d-single-bo:
>     - shard-kbl:          NOTRUN -> [SKIP][60] ([fdo#109271] / [i915#533]) +1 similar issue
>    [60]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-kbl7/igt@kms_cursor_legacy@pipe-d-single-bo.html
> 
>   * igt@kms_flip@2x-plain-flip-ts-check:
>     - shard-tglb:         NOTRUN -> [SKIP][61] ([fdo#111825]) +12 similar issues
>    [61]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-tglb8/igt@kms_flip@2x-plain-flip-ts-check.html
> 
>   * igt@kms_flip@flip-vs-expired-vblank-interruptible@b-edp1:
>     - shard-skl:          [PASS][62] -> [FAIL][63] ([i915#79])
>    [62]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10660/shard-skl3/igt@kms_flip@flip-vs-expired-vblank-interruptible@b-edp1.html
>    [63]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-skl7/igt@kms_flip@flip-vs-expired-vblank-interruptible@b-edp1.html
> 
>   * igt@kms_flip@flip-vs-suspend-interruptible@a-dp1:
>     - shard-apl:          [PASS][64] -> [DMESG-WARN][65] ([i915#180])
>    [64]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10660/shard-apl3/igt@kms_flip@flip-vs-suspend-interruptible@a-dp1.html
>    [65]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-apl2/igt@kms_flip@flip-vs-suspend-interruptible@a-dp1.html
> 
>   * igt@kms_flip_scaled_crc@flip-32bpp-ytile-to-64bpp-ytile:
>     - shard-iclb:         [PASS][66] -> [SKIP][67] ([i915#3701])
>    [66]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10660/shard-iclb4/igt@kms_flip_scaled_crc@flip-32bpp-ytile-to-64bpp-ytile.html
>    [67]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-iclb2/igt@kms_flip_scaled_crc@flip-32bpp-ytile-to-64bpp-ytile.html
> 
>   * igt@kms_flip_scaled_crc@flip-32bpp-ytileccs-to-64bpp-ytile:
>     - shard-tglb:         NOTRUN -> [SKIP][68] ([i915#2587])
>    [68]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-tglb8/igt@kms_flip_scaled_crc@flip-32bpp-ytileccs-to-64bpp-ytile.html
> 
>   * igt@kms_flip_scaled_crc@flip-64bpp-ytile-to-32bpp-ytilercccs:
>     - shard-apl:          NOTRUN -> [SKIP][69] ([fdo#109271] / [i915#2672])
>    [69]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-apl2/igt@kms_flip_scaled_crc@flip-64bpp-ytile-to-32bpp-ytilercccs.html
> 
>   * igt@kms_frontbuffer_tracking@fbc-suspend:
>     - shard-kbl:          [PASS][70] -> [DMESG-WARN][71] ([i915#180]) +6 similar issues
>    [70]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10660/shard-kbl4/igt@kms_frontbuffer_tracking@fbc-suspend.html
>    [71]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-kbl1/igt@kms_frontbuffer_tracking@fbc-suspend.html
> 
>   * igt@kms_pipe_crc_basic@compare-crc-sanitycheck-pipe-d:
>     - shard-apl:          NOTRUN -> [SKIP][72] ([fdo#109271] / [i915#533]) +1 similar issue
>    [72]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-apl6/igt@kms_pipe_crc_basic@compare-crc-sanitycheck-pipe-d.html
> 
>   * igt@kms_pipe_crc_basic@suspend-read-crc-pipe-d:
>     - shard-skl:          NOTRUN -> [SKIP][73] ([fdo#109271] / [i915#533])
>    [73]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-skl8/igt@kms_pipe_crc_basic@suspend-read-crc-pipe-d.html
> 
>   * igt@kms_plane_alpha_blend@pipe-a-alpha-opaque-fb:
>     - shard-apl:          NOTRUN -> [FAIL][74] ([fdo#108145] / [i915#265]) +2 similar issues
>    [74]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-apl1/igt@kms_plane_alpha_blend@pipe-a-alpha-opaque-fb.html
> 
>   * igt@kms_plane_alpha_blend@pipe-a-coverage-7efc:
>     - shard-skl:          [PASS][75] -> [FAIL][76] ([fdo#108145] / [i915#265])
>    [75]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10660/shard-skl8/igt@kms_plane_alpha_blend@pipe-a-coverage-7efc.html
>    [76]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-skl4/igt@kms_plane_alpha_blend@pipe-a-coverage-7efc.html
> 
>   * igt@kms_plane_alpha_blend@pipe-b-constant-alpha-max:
>     - shard-kbl:          NOTRUN -> [FAIL][77] ([fdo#108145] / [i915#265])
>    [77]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-kbl7/igt@kms_plane_alpha_blend@pipe-b-constant-alpha-max.html
> 
>   * igt@kms_plane_lowres@pipe-b-tiling-x:
>     - shard-tglb:         NOTRUN -> [SKIP][78] ([i915#3536]) +1 similar issue
>    [78]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-tglb3/igt@kms_plane_lowres@pipe-b-tiling-x.html
> 
>   * igt@kms_psr2_sf@overlay-plane-update-sf-dmg-area-4:
>     - shard-kbl:          NOTRUN -> [SKIP][79] ([fdo#109271] / [i915#658]) +1 similar issue
>    [79]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-kbl3/igt@kms_psr2_sf@overlay-plane-update-sf-dmg-area-4.html
> 
>   * igt@kms_psr2_sf@overlay-primary-update-sf-dmg-area-4:
>     - shard-apl:          NOTRUN -> [SKIP][80] ([fdo#109271] / [i915#658]) +5 similar issues
>    [80]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-apl1/igt@kms_psr2_sf@overlay-primary-update-sf-dmg-area-4.html
> 
>   * igt@kms_psr2_sf@primary-plane-update-sf-dmg-area-1:
>     - shard-skl:          NOTRUN -> [SKIP][81] ([fdo#109271] / [i915#658]) +1 similar issue
>    [81]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-skl1/igt@kms_psr2_sf@primary-plane-update-sf-dmg-area-1.html
> 
>   * igt@kms_psr@psr2_primary_mmap_gtt:
>     - shard-tglb:         NOTRUN -> [FAIL][82] ([i915#132] / [i915#3467]) +1 similar issue
>    [82]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-tglb8/igt@kms_psr@psr2_primary_mmap_gtt.html
> 
>   * igt@kms_psr@psr2_sprite_blt:
>     - shard-iclb:         [PASS][83] -> [SKIP][84] ([fdo#109441]) +1 similar issue
>    [83]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10660/shard-iclb2/igt@kms_psr@psr2_sprite_blt.html
>    [84]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-iclb7/igt@kms_psr@psr2_sprite_blt.html
> 
>   * igt@kms_sysfs_edid_timing:
>     - shard-kbl:          NOTRUN -> [FAIL][85] ([IGT#2])
>    [85]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-kbl3/igt@kms_sysfs_edid_timing.html
>     - shard-skl:          NOTRUN -> [FAIL][86] ([IGT#2])
>    [86]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-skl8/igt@kms_sysfs_edid_timing.html
> 
>   * igt@kms_vblank@pipe-d-ts-continuation-suspend:
>     - shard-tglb:         [PASS][87] -> [INCOMPLETE][88] ([i915#3896])
>    [87]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10660/shard-tglb1/igt@kms_vblank@pipe-d-ts-continuation-suspend.html
>    [88]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-tglb7/igt@kms_vblank@pipe-d-ts-continuation-suspend.html
> 
>   * igt@kms_writeback@writeback-check-output:
>     - shard-tglb:         NOTRUN -> [SKIP][89] ([i915#2437]) +1 similar issue
>    [89]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-tglb3/igt@kms_writeback@writeback-check-output.html
> 
>   * igt@prime_nv_api@i915_self_import_to_different_fd:
>     - shard-tglb:         NOTRUN -> [SKIP][90] ([fdo#109291]) +1 similar issue
>    [90]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-tglb8/igt@prime_nv_api@i915_self_import_to_different_fd.html
> 
>   * igt@syncobj_basic@bad-destroy:
>     - shard-skl:          [PASS][91] -> [DMESG-WARN][92] ([i915#1982]) +1 similar issue
>    [91]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10660/shard-skl5/igt@syncobj_basic@bad-destroy.html
>    [92]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-skl5/igt@syncobj_basic@bad-destroy.html
> 
>   * igt@sysfs_clients@recycle-many:
>     - shard-apl:          NOTRUN -> [SKIP][93] ([fdo#109271] / [i915#2994]) +3 similar issues
>    [93]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-apl6/igt@sysfs_clients@recycle-many.html
> 
>   * igt@sysfs_clients@sema-50:
>     - shard-kbl:          NOTRUN -> [SKIP][94] ([fdo#109271] / [i915#2994])
>    [94]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-kbl7/igt@sysfs_clients@sema-50.html
> 
>   * igt@sysfs_clients@split-25:
>     - shard-tglb:         NOTRUN -> [SKIP][95] ([i915#2994])
>    [95]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-tglb3/igt@sysfs_clients@split-25.html
> 
>   
> #### Possible fixes ####
> 
>   * igt@gem_exec_fair@basic-none-share@rcs0:
>     - shard-iclb:         [FAIL][96] ([i915#2842]) -> [PASS][97]
>    [96]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10660/shard-iclb2/igt@gem_exec_fair@basic-none-share@rcs0.html
>    [97]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-iclb7/igt@gem_exec_fair@basic-none-share@rcs0.html
> 
>   * igt@gem_exec_fair@basic-pace-solo@rcs0:
>     - shard-glk:          [FAIL][98] ([i915#2842]) -> [PASS][99]
>    [98]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10660/shard-glk8/igt@gem_exec_fair@basic-pace-solo@rcs0.html
>    [99]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-glk9/igt@gem_exec_fair@basic-pace-solo@rcs0.html
> 
>   * igt@gem_exec_fair@basic-pace@rcs0:
>     - shard-tglb:         [FAIL][100] ([i915#2842]) -> [PASS][101]
>    [100]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10660/shard-tglb5/igt@gem_exec_fair@basic-pace@rcs0.html
>    [101]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-tglb6/igt@gem_exec_fair@basic-pace@rcs0.html
> 
>   * igt@gem_exec_fair@basic-pace@vcs1:
>     - shard-kbl:          [FAIL][102] ([i915#2842]) -> [PASS][103]
>    [102]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10660/shard-kbl6/igt@gem_exec_fair@basic-pace@vcs1.html
>    [103]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-kbl2/igt@gem_exec_fair@basic-pace@vcs1.html
> 
>   * igt@gem_exec_params@dr1-dirt:
>     - shard-skl:          [DMESG-WARN][104] ([i915#1982]) -> [PASS][105]
>    [104]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10660/shard-skl4/igt@gem_exec_params@dr1-dirt.html
>    [105]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-skl5/igt@gem_exec_params@dr1-dirt.html
> 
>   * igt@gem_ppgtt@flink-and-close-vma-leak:
>     - shard-glk:          [FAIL][106] ([i915#644]) -> [PASS][107]
>    [106]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10660/shard-glk6/igt@gem_ppgtt@flink-and-close-vma-leak.html
>    [107]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-glk5/igt@gem_ppgtt@flink-and-close-vma-leak.html
> 
>   * igt@gem_softpin@noreloc-s3:
>     - shard-kbl:          [DMESG-WARN][108] ([i915#180]) -> [PASS][109] +1 similar issue
>    [108]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10660/shard-kbl1/igt@gem_softpin@noreloc-s3.html
>    [109]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-kbl7/igt@gem_softpin@noreloc-s3.html
> 
>   * igt@gem_workarounds@suspend-resume-context:
>     - shard-skl:          [INCOMPLETE][110] ([i915#198] / [i915#4173]) -> [PASS][111]
>    [110]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10660/shard-skl2/igt@gem_workarounds@suspend-resume-context.html
>    [111]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-skl8/igt@gem_workarounds@suspend-resume-context.html
> 
>   * igt@gen9_exec_parse@allowed-single:
>     - shard-skl:          [DMESG-WARN][112] ([i915#1436] / [i915#716]) -> [PASS][113]
>    [112]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10660/shard-skl9/igt@gen9_exec_parse@allowed-single.html
>    [113]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-skl1/igt@gen9_exec_parse@allowed-single.html
> 
>   * igt@i915_pm_dc@dc6-dpms:
>     - shard-iclb:         [FAIL][114] ([i915#454]) -> [PASS][115]
>    [114]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10660/shard-iclb3/igt@i915_pm_dc@dc6-dpms.html
>    [115]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-iclb4/igt@i915_pm_dc@dc6-dpms.html
> 
>   * igt@kms_big_fb@x-tiled-32bpp-rotate-0:
>     - shard-glk:          [DMESG-WARN][116] ([i915#118] / [i915#95]) -> [PASS][117]
>    [116]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10660/shard-glk4/igt@kms_big_fb@x-tiled-32bpp-rotate-0.html
>    [117]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-glk7/igt@kms_big_fb@x-tiled-32bpp-rotate-0.html
> 
>   * igt@kms_flip@plain-flip-fb-recreate-interruptible@a-edp1:
>     - shard-skl:          [FAIL][118] ([i915#2122]) -> [PASS][119]
>    [118]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10660/shard-skl6/igt@kms_flip@plain-flip-fb-recreate-interruptible@a-edp1.html
>    [119]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-skl1/igt@kms_flip@plain-flip-fb-recreate-interruptible@a-edp1.html
> 
>   * igt@kms_frontbuffer_tracking@psr-suspend:
>     - shard-tglb:         [INCOMPLETE][120] ([i915#2411] / [i915#456]) -> [PASS][121] +1 similar issue
>    [120]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10660/shard-tglb7/igt@kms_frontbuffer_tracking@psr-suspend.html
>    [121]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-tglb3/igt@kms_frontbuffer_tracking@psr-suspend.html
> 
>   * igt@kms_hdr@bpc-switch:
>     - shard-skl:          [FAIL][122] ([i915#1188]) -> [PASS][123]
>    [122]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10660/shard-skl1/igt@kms_hdr@bpc-switch.html
>    [123]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-skl2/igt@kms_hdr@bpc-switch.html
> 
>   * igt@kms_plane@plane-panning-bottom-right-suspend@pipe-a-planes:
>     - shard-apl:          [DMESG-WARN][124] ([i915#180]) -> [PASS][125]
>    [124]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10660/shard-apl6/igt@kms_plane@plane-panning-bottom-right-suspend@pipe-a-planes.html
>    [125]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-apl2/igt@kms_plane@plane-panning-bottom-right-suspend@pipe-a-planes.html
> 
>   * igt@kms_plane_alpha_blend@pipe-b-constant-alpha-min:
>     - shard-skl:          [FAIL][126] ([fdo#108145] / [i915#265]) -> [PASS][127]
>    [126]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10660/shard-skl10/igt@kms_plane_alpha_blend@pipe-b-constant-alpha-min.html
>    [127]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-skl10/igt@kms_plane_alpha_blend@pipe-b-constant-alpha-min.html
> 
>   * igt@kms_psr@psr2_cursor_mmap_cpu:
>     - shard-iclb:         [SKIP][128] ([fdo#109441]) -> [PASS][129] +2 similar issues
>    [128]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10660/shard-iclb4/igt@kms_psr@psr2_cursor_mmap_cpu.html
>    [129]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-iclb2/igt@kms_psr@psr2_cursor_mmap_cpu.html
> 
>   * igt@perf@polling-parameterized:
>     - shard-skl:          [FAIL][130] ([i915#1542]) -> [PASS][131]
>    [130]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10660/shard-skl3/igt@perf@polling-parameterized.html
>    [131]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-skl8/igt@perf@polling-parameterized.html
> 
>   
> #### Warnings ####
> 
>   * igt@kms_psr2_sf@primary-plane-update-sf-dmg-area-2:
>     - shard-iclb:         [SKIP][132] ([i915#658]) -> [SKIP][133] ([i915#2920]) +1 similar issue
>    [132]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10660/shard-iclb4/igt@kms_psr2_sf@primary-plane-update-sf-dmg-area-2.html
>    [133]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-iclb2/igt@kms_psr2_sf@primary-plane-update-sf-dmg-area-2.html
> 
>   * igt@kms_psr2_sf@primary-plane-update-sf-dmg-area-4:
>     - shard-iclb:         [SKIP][134] ([i915#2920]) -> [SKIP][135] ([i915#658]) +2 similar issues
>    [134]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10660/shard-iclb2/igt@kms_psr2_sf@primary-plane-update-sf-dmg-area-4.html
>    [135]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-iclb7/igt@kms_psr2_sf@primary-plane-update-sf-dmg-area-4.html
> 
>   * igt@runner@aborted:
>     - shard-kbl:          ([FAIL][136], [FAIL][137], [FAIL][138], [FAIL][139], [FAIL][140]) ([i915#180] / [i915#1814] / [i915#3002] / [i915#3363]) -> ([FAIL][141], [FAIL][142], [FAIL][143], [FAIL][144], [FAIL][145], [FAIL][146], [FAIL][147], [FAIL][148]) ([fdo#109271] / [i915#180] / [i915#1814] / [i915#3002] / [i915#3363] / [i915#602])
>    [136]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10660/shard-kbl1/igt@runner@aborted.html
>    [137]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10660/shard-kbl1/igt@runner@aborted.html
>    [138]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10660/shard-kbl4/igt@runner@aborted.html
>    [139]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10660/shard-kbl4/igt@runner@aborted.html
>    [140]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10660/shard-kbl6/igt@runner@aborted.ht
> 
> == Logs ==
> 
> For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/index.html

^ permalink raw reply	[flat|nested] 72+ messages in thread

* [Intel-gfx] ✗ Fi.CI.IGT: failure for drm/i915/tc: Fix TypeC connect/disconnect sequences (rev8)
  2021-09-21  0:23 [Intel-gfx] [PATCH 00/13] drm/i915/tc: Fix TypeC connect/disconnect sequences Imre Deak
                   ` (20 preceding siblings ...)
  2021-09-29 16:58 ` [Intel-gfx] ✗ Fi.CI.IGT: failure " Patchwork
@ 2021-09-29 21:47 ` Patchwork
  2021-09-29 21:54 ` Patchwork
  2021-09-29 22:21 ` [Intel-gfx] ✓ Fi.CI.IGT: success " Patchwork
  23 siblings, 0 replies; 72+ messages in thread
From: Patchwork @ 2021-09-29 21:47 UTC (permalink / raw)
  To: Imre Deak; +Cc: intel-gfx

[-- Attachment #1: Type: text/plain, Size: 30281 bytes --]

== Series Details ==

Series: drm/i915/tc: Fix TypeC connect/disconnect sequences (rev8)
URL   : https://patchwork.freedesktop.org/series/94878/
State : failure

== Summary ==

CI Bug Log - changes from CI_DRM_10660_full -> Patchwork_21189_full
====================================================

Summary
-------

  **FAILURE**

  Serious unknown changes coming with Patchwork_21189_full absolutely need to be
  verified manually.
  
  If you think the reported changes have nothing to do with the changes
  introduced in Patchwork_21189_full, please notify your bug team to allow them
  to document this new failure mode, which will reduce false positives in CI.

  

Possible new issues
-------------------

  Here are the unknown changes that may have been introduced in Patchwork_21189_full:

### IGT changes ###

#### Possible regressions ####

  * igt@gem_eio@reset-stress:
    - shard-skl:          [PASS][1] -> [FAIL][2]
   [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10660/shard-skl1/igt@gem_eio@reset-stress.html
   [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-skl2/igt@gem_eio@reset-stress.html

  
Known issues
------------

  Here are the changes found in Patchwork_21189_full that come from known issues:

### IGT changes ###

#### Issues hit ####

  * igt@fbdev@unaligned-read:
    - shard-glk:          [PASS][3] -> [FAIL][4] ([i915#4218])
   [3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10660/shard-glk3/igt@fbdev@unaligned-read.html
   [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-glk4/igt@fbdev@unaligned-read.html

  * igt@gem_create@create-massive:
    - shard-apl:          NOTRUN -> [DMESG-WARN][5] ([i915#3002])
   [5]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-apl6/igt@gem_create@create-massive.html

  * igt@gem_ctx_sseu@mmap-args:
    - shard-tglb:         NOTRUN -> [SKIP][6] ([i915#280])
   [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-tglb2/igt@gem_ctx_sseu@mmap-args.html

  * igt@gem_eio@unwedge-stress:
    - shard-iclb:         [PASS][7] -> [TIMEOUT][8] ([i915#2369] / [i915#2481] / [i915#3070])
   [7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10660/shard-iclb7/igt@gem_eio@unwedge-stress.html
   [8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-iclb3/igt@gem_eio@unwedge-stress.html

  * igt@gem_exec_fair@basic-deadline:
    - shard-glk:          [PASS][9] -> [FAIL][10] ([i915#2846])
   [9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10660/shard-glk8/igt@gem_exec_fair@basic-deadline.html
   [10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-glk1/igt@gem_exec_fair@basic-deadline.html

  * igt@gem_exec_fair@basic-flow@rcs0:
    - shard-skl:          NOTRUN -> [SKIP][11] ([fdo#109271]) +106 similar issues
   [11]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-skl1/igt@gem_exec_fair@basic-flow@rcs0.html

  * igt@gem_exec_fair@basic-none-share@rcs0:
    - shard-tglb:         [PASS][12] -> [FAIL][13] ([i915#2842]) +1 similar issue
   [12]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10660/shard-tglb1/igt@gem_exec_fair@basic-none-share@rcs0.html
   [13]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-tglb6/igt@gem_exec_fair@basic-none-share@rcs0.html

  * igt@gem_exec_fair@basic-none-vip@rcs0:
    - shard-kbl:          [PASS][14] -> [FAIL][15] ([i915#2842])
   [14]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10660/shard-kbl2/igt@gem_exec_fair@basic-none-vip@rcs0.html
   [15]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-kbl2/igt@gem_exec_fair@basic-none-vip@rcs0.html

  * igt@gem_exec_fair@basic-none@vcs1:
    - shard-iclb:         NOTRUN -> [FAIL][16] ([i915#2842])
   [16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-iclb4/igt@gem_exec_fair@basic-none@vcs1.html

  * igt@gem_exec_fair@basic-pace@rcs0:
    - shard-iclb:         [PASS][17] -> [FAIL][18] ([i915#2842])
   [17]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10660/shard-iclb1/igt@gem_exec_fair@basic-pace@rcs0.html
   [18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-iclb7/igt@gem_exec_fair@basic-pace@rcs0.html

  * igt@gem_exec_gttfill@basic:
    - shard-glk:          [PASS][19] -> [DMESG-WARN][20] ([i915#118] / [i915#95]) +1 similar issue
   [19]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10660/shard-glk1/igt@gem_exec_gttfill@basic.html
   [20]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-glk4/igt@gem_exec_gttfill@basic.html

  * igt@gem_exec_params@no-blt:
    - shard-tglb:         NOTRUN -> [SKIP][21] ([fdo#109283])
   [21]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-tglb3/igt@gem_exec_params@no-blt.html

  * igt@gem_exec_params@secure-non-master:
    - shard-tglb:         NOTRUN -> [SKIP][22] ([fdo#112283])
   [22]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-tglb3/igt@gem_exec_params@secure-non-master.html

  * igt@gem_ppgtt@flink-and-close-vma-leak:
    - shard-skl:          [PASS][23] -> [FAIL][24] ([i915#644])
   [23]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10660/shard-skl2/igt@gem_ppgtt@flink-and-close-vma-leak.html
   [24]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-skl3/igt@gem_ppgtt@flink-and-close-vma-leak.html

  * igt@gen3_render_tiledy_blits:
    - shard-tglb:         NOTRUN -> [SKIP][25] ([fdo#109289]) +2 similar issues
   [25]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-tglb8/igt@gen3_render_tiledy_blits.html

  * igt@gen9_exec_parse@unaligned-jump:
    - shard-tglb:         NOTRUN -> [SKIP][26] ([i915#2856])
   [26]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-tglb3/igt@gen9_exec_parse@unaligned-jump.html

  * igt@i915_pm_lpsp@kms-lpsp@kms-lpsp-dp:
    - shard-apl:          NOTRUN -> [SKIP][27] ([fdo#109271] / [i915#1937])
   [27]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-apl6/igt@i915_pm_lpsp@kms-lpsp@kms-lpsp-dp.html

  * igt@i915_pm_rpm@gem-execbuf-stress-pc8:
    - shard-tglb:         NOTRUN -> [SKIP][28] ([fdo#109506] / [i915#2411])
   [28]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-tglb3/igt@i915_pm_rpm@gem-execbuf-stress-pc8.html

  * igt@i915_selftest@live@gt_lrc:
    - shard-tglb:         NOTRUN -> [DMESG-FAIL][29] ([i915#2373])
   [29]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-tglb3/igt@i915_selftest@live@gt_lrc.html

  * igt@i915_selftest@live@gt_pm:
    - shard-tglb:         NOTRUN -> [DMESG-FAIL][30] ([i915#1759] / [i915#2291])
   [30]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-tglb3/igt@i915_selftest@live@gt_pm.html

  * igt@i915_suspend@forcewake:
    - shard-apl:          NOTRUN -> [DMESG-WARN][31] ([i915#180]) +1 similar issue
   [31]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-apl6/igt@i915_suspend@forcewake.html

  * igt@kms_async_flips@crc:
    - shard-skl:          NOTRUN -> [FAIL][32] ([i915#4224])
   [32]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-skl7/igt@kms_async_flips@crc.html

  * igt@kms_big_fb@linear-16bpp-rotate-90:
    - shard-apl:          NOTRUN -> [SKIP][33] ([fdo#109271]) +195 similar issues
   [33]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-apl6/igt@kms_big_fb@linear-16bpp-rotate-90.html

  * igt@kms_big_fb@linear-32bpp-rotate-270:
    - shard-tglb:         NOTRUN -> [SKIP][34] ([fdo#111614])
   [34]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-tglb8/igt@kms_big_fb@linear-32bpp-rotate-270.html

  * igt@kms_big_fb@x-tiled-max-hw-stride-64bpp-rotate-180-async-flip:
    - shard-skl:          NOTRUN -> [FAIL][35] ([i915#3722]) +1 similar issue
   [35]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-skl8/igt@kms_big_fb@x-tiled-max-hw-stride-64bpp-rotate-180-async-flip.html

  * igt@kms_big_fb@yf-tiled-8bpp-rotate-90:
    - shard-tglb:         NOTRUN -> [SKIP][36] ([fdo#111615]) +1 similar issue
   [36]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-tglb3/igt@kms_big_fb@yf-tiled-8bpp-rotate-90.html

  * igt@kms_big_fb@yf-tiled-max-hw-stride-32bpp-rotate-0-hflip:
    - shard-apl:          NOTRUN -> [SKIP][37] ([fdo#109271] / [i915#3777]) +2 similar issues
   [37]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-apl3/igt@kms_big_fb@yf-tiled-max-hw-stride-32bpp-rotate-0-hflip.html

  * igt@kms_big_fb@yf-tiled-max-hw-stride-32bpp-rotate-180-hflip:
    - shard-kbl:          NOTRUN -> [SKIP][38] ([fdo#109271] / [i915#3777])
   [38]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-kbl3/igt@kms_big_fb@yf-tiled-max-hw-stride-32bpp-rotate-180-hflip.html
    - shard-skl:          NOTRUN -> [SKIP][39] ([fdo#109271] / [i915#3777])
   [39]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-skl8/igt@kms_big_fb@yf-tiled-max-hw-stride-32bpp-rotate-180-hflip.html

  * igt@kms_ccs@pipe-a-ccs-on-another-bo-yf_tiled_ccs:
    - shard-tglb:         NOTRUN -> [SKIP][40] ([i915#3689]) +3 similar issues
   [40]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-tglb3/igt@kms_ccs@pipe-a-ccs-on-another-bo-yf_tiled_ccs.html

  * igt@kms_ccs@pipe-b-ccs-on-another-bo-y_tiled_gen12_mc_ccs:
    - shard-skl:          NOTRUN -> [SKIP][41] ([fdo#109271] / [i915#3886]) +5 similar issues
   [41]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-skl9/igt@kms_ccs@pipe-b-ccs-on-another-bo-y_tiled_gen12_mc_ccs.html

  * igt@kms_ccs@pipe-b-random-ccs-data-y_tiled_gen12_mc_ccs:
    - shard-kbl:          NOTRUN -> [SKIP][42] ([fdo#109271] / [i915#3886]) +5 similar issues
   [42]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-kbl7/igt@kms_ccs@pipe-b-random-ccs-data-y_tiled_gen12_mc_ccs.html

  * igt@kms_ccs@pipe-c-ccs-on-another-bo-y_tiled_gen12_rc_ccs_cc:
    - shard-apl:          NOTRUN -> [SKIP][43] ([fdo#109271] / [i915#3886]) +14 similar issues
   [43]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-apl3/igt@kms_ccs@pipe-c-ccs-on-another-bo-y_tiled_gen12_rc_ccs_cc.html

  * igt@kms_ccs@pipe-c-missing-ccs-buffer-y_tiled_gen12_mc_ccs:
    - shard-tglb:         NOTRUN -> [SKIP][44] ([i915#3689] / [i915#3886]) +1 similar issue
   [44]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-tglb8/igt@kms_ccs@pipe-c-missing-ccs-buffer-y_tiled_gen12_mc_ccs.html

  * igt@kms_chamelium@vga-hpd-after-suspend:
    - shard-apl:          NOTRUN -> [SKIP][45] ([fdo#109271] / [fdo#111827]) +18 similar issues
   [45]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-apl3/igt@kms_chamelium@vga-hpd-after-suspend.html

  * igt@kms_color_chamelium@pipe-a-ctm-blue-to-red:
    - shard-kbl:          NOTRUN -> [SKIP][46] ([fdo#109271] / [fdo#111827]) +5 similar issues
   [46]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-kbl3/igt@kms_color_chamelium@pipe-a-ctm-blue-to-red.html

  * igt@kms_color_chamelium@pipe-b-ctm-max:
    - shard-skl:          NOTRUN -> [SKIP][47] ([fdo#109271] / [fdo#111827]) +6 similar issues
   [47]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-skl3/igt@kms_color_chamelium@pipe-b-ctm-max.html

  * igt@kms_color_chamelium@pipe-c-ctm-red-to-blue:
    - shard-tglb:         NOTRUN -> [SKIP][48] ([fdo#109284] / [fdo#111827]) +3 similar issues
   [48]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-tglb3/igt@kms_color_chamelium@pipe-c-ctm-red-to-blue.html

  * igt@kms_content_protection@lic:
    - shard-apl:          NOTRUN -> [TIMEOUT][49] ([i915#1319]) +1 similar issue
   [49]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-apl6/igt@kms_content_protection@lic.html

  * igt@kms_content_protection@mei_interface:
    - shard-tglb:         NOTRUN -> [SKIP][50] ([fdo#111828])
   [50]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-tglb3/igt@kms_content_protection@mei_interface.html

  * igt@kms_cursor_crc@pipe-a-cursor-512x170-random:
    - shard-tglb:         NOTRUN -> [SKIP][51] ([fdo#109279] / [i915#3359]) +1 similar issue
   [51]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-tglb8/igt@kms_cursor_crc@pipe-a-cursor-512x170-random.html

  * igt@kms_cursor_crc@pipe-a-cursor-suspend:
    - shard-skl:          NOTRUN -> [INCOMPLETE][52] ([i915#2828] / [i915#300])
   [52]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-skl9/igt@kms_cursor_crc@pipe-a-cursor-suspend.html

  * igt@kms_cursor_crc@pipe-c-cursor-32x10-rapid-movement:
    - shard-tglb:         NOTRUN -> [SKIP][53] ([i915#3359]) +3 similar issues
   [53]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-tglb3/igt@kms_cursor_crc@pipe-c-cursor-32x10-rapid-movement.html

  * igt@kms_cursor_crc@pipe-c-cursor-32x32-onscreen:
    - shard-tglb:         NOTRUN -> [SKIP][54] ([i915#3319])
   [54]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-tglb3/igt@kms_cursor_crc@pipe-c-cursor-32x32-onscreen.html

  * igt@kms_cursor_crc@pipe-d-cursor-suspend:
    - shard-kbl:          NOTRUN -> [SKIP][55] ([fdo#109271]) +79 similar issues
   [55]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-kbl7/igt@kms_cursor_crc@pipe-d-cursor-suspend.html
    - shard-tglb:         [PASS][56] -> [INCOMPLETE][57] ([i915#4211])
   [56]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10660/shard-tglb2/igt@kms_cursor_crc@pipe-d-cursor-suspend.html
   [57]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-tglb7/igt@kms_cursor_crc@pipe-d-cursor-suspend.html

  * igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions:
    - shard-skl:          [PASS][58] -> [FAIL][59] ([i915#2346])
   [58]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10660/shard-skl1/igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions.html
   [59]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-skl2/igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions.html

  * igt@kms_cursor_legacy@pipe-d-single-bo:
    - shard-kbl:          NOTRUN -> [SKIP][60] ([fdo#109271] / [i915#533]) +1 similar issue
   [60]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-kbl7/igt@kms_cursor_legacy@pipe-d-single-bo.html

  * igt@kms_flip@2x-plain-flip-ts-check:
    - shard-tglb:         NOTRUN -> [SKIP][61] ([fdo#111825]) +12 similar issues
   [61]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-tglb8/igt@kms_flip@2x-plain-flip-ts-check.html

  * igt@kms_flip@flip-vs-expired-vblank-interruptible@b-edp1:
    - shard-skl:          [PASS][62] -> [FAIL][63] ([i915#79])
   [62]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10660/shard-skl3/igt@kms_flip@flip-vs-expired-vblank-interruptible@b-edp1.html
   [63]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-skl7/igt@kms_flip@flip-vs-expired-vblank-interruptible@b-edp1.html

  * igt@kms_flip@flip-vs-suspend-interruptible@a-dp1:
    - shard-apl:          [PASS][64] -> [DMESG-WARN][65] ([i915#180])
   [64]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10660/shard-apl3/igt@kms_flip@flip-vs-suspend-interruptible@a-dp1.html
   [65]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-apl2/igt@kms_flip@flip-vs-suspend-interruptible@a-dp1.html

  * igt@kms_flip_scaled_crc@flip-32bpp-ytile-to-64bpp-ytile:
    - shard-iclb:         [PASS][66] -> [SKIP][67] ([i915#3701])
   [66]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10660/shard-iclb4/igt@kms_flip_scaled_crc@flip-32bpp-ytile-to-64bpp-ytile.html
   [67]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-iclb2/igt@kms_flip_scaled_crc@flip-32bpp-ytile-to-64bpp-ytile.html

  * igt@kms_flip_scaled_crc@flip-32bpp-ytileccs-to-64bpp-ytile:
    - shard-tglb:         NOTRUN -> [SKIP][68] ([i915#2587])
   [68]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-tglb8/igt@kms_flip_scaled_crc@flip-32bpp-ytileccs-to-64bpp-ytile.html

  * igt@kms_flip_scaled_crc@flip-64bpp-ytile-to-32bpp-ytilercccs:
    - shard-apl:          NOTRUN -> [SKIP][69] ([fdo#109271] / [i915#2672])
   [69]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-apl2/igt@kms_flip_scaled_crc@flip-64bpp-ytile-to-32bpp-ytilercccs.html

  * igt@kms_frontbuffer_tracking@fbc-suspend:
    - shard-kbl:          [PASS][70] -> [DMESG-WARN][71] ([i915#180]) +6 similar issues
   [70]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10660/shard-kbl4/igt@kms_frontbuffer_tracking@fbc-suspend.html
   [71]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-kbl1/igt@kms_frontbuffer_tracking@fbc-suspend.html

  * igt@kms_pipe_crc_basic@compare-crc-sanitycheck-pipe-d:
    - shard-apl:          NOTRUN -> [SKIP][72] ([fdo#109271] / [i915#533]) +1 similar issue
   [72]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-apl6/igt@kms_pipe_crc_basic@compare-crc-sanitycheck-pipe-d.html

  * igt@kms_pipe_crc_basic@suspend-read-crc-pipe-d:
    - shard-skl:          NOTRUN -> [SKIP][73] ([fdo#109271] / [i915#533])
   [73]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-skl8/igt@kms_pipe_crc_basic@suspend-read-crc-pipe-d.html

  * igt@kms_plane_alpha_blend@pipe-a-alpha-opaque-fb:
    - shard-apl:          NOTRUN -> [FAIL][74] ([fdo#108145] / [i915#265]) +2 similar issues
   [74]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-apl1/igt@kms_plane_alpha_blend@pipe-a-alpha-opaque-fb.html

  * igt@kms_plane_alpha_blend@pipe-a-coverage-7efc:
    - shard-skl:          [PASS][75] -> [FAIL][76] ([fdo#108145] / [i915#265])
   [75]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10660/shard-skl8/igt@kms_plane_alpha_blend@pipe-a-coverage-7efc.html
   [76]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-skl4/igt@kms_plane_alpha_blend@pipe-a-coverage-7efc.html

  * igt@kms_plane_alpha_blend@pipe-b-constant-alpha-max:
    - shard-kbl:          NOTRUN -> [FAIL][77] ([fdo#108145] / [i915#265])
   [77]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-kbl7/igt@kms_plane_alpha_blend@pipe-b-constant-alpha-max.html

  * igt@kms_plane_lowres@pipe-b-tiling-x:
    - shard-tglb:         NOTRUN -> [SKIP][78] ([i915#3536]) +1 similar issue
   [78]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-tglb3/igt@kms_plane_lowres@pipe-b-tiling-x.html

  * igt@kms_psr2_sf@overlay-plane-update-sf-dmg-area-4:
    - shard-kbl:          NOTRUN -> [SKIP][79] ([fdo#109271] / [i915#658]) +1 similar issue
   [79]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-kbl3/igt@kms_psr2_sf@overlay-plane-update-sf-dmg-area-4.html

  * igt@kms_psr2_sf@overlay-primary-update-sf-dmg-area-4:
    - shard-apl:          NOTRUN -> [SKIP][80] ([fdo#109271] / [i915#658]) +5 similar issues
   [80]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-apl1/igt@kms_psr2_sf@overlay-primary-update-sf-dmg-area-4.html

  * igt@kms_psr2_sf@primary-plane-update-sf-dmg-area-1:
    - shard-skl:          NOTRUN -> [SKIP][81] ([fdo#109271] / [i915#658]) +1 similar issue
   [81]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-skl1/igt@kms_psr2_sf@primary-plane-update-sf-dmg-area-1.html

  * igt@kms_psr@psr2_primary_mmap_gtt:
    - shard-tglb:         NOTRUN -> [FAIL][82] ([i915#132] / [i915#3467]) +1 similar issue
   [82]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-tglb8/igt@kms_psr@psr2_primary_mmap_gtt.html

  * igt@kms_psr@psr2_sprite_blt:
    - shard-iclb:         [PASS][83] -> [SKIP][84] ([fdo#109441]) +1 similar issue
   [83]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10660/shard-iclb2/igt@kms_psr@psr2_sprite_blt.html
   [84]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-iclb7/igt@kms_psr@psr2_sprite_blt.html

  * igt@kms_sysfs_edid_timing:
    - shard-kbl:          NOTRUN -> [FAIL][85] ([IGT#2])
   [85]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-kbl3/igt@kms_sysfs_edid_timing.html
    - shard-skl:          NOTRUN -> [FAIL][86] ([IGT#2])
   [86]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-skl8/igt@kms_sysfs_edid_timing.html

  * igt@kms_vblank@pipe-d-ts-continuation-suspend:
    - shard-tglb:         [PASS][87] -> [INCOMPLETE][88] ([i915#3896])
   [87]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10660/shard-tglb1/igt@kms_vblank@pipe-d-ts-continuation-suspend.html
   [88]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-tglb7/igt@kms_vblank@pipe-d-ts-continuation-suspend.html

  * igt@kms_writeback@writeback-check-output:
    - shard-tglb:         NOTRUN -> [SKIP][89] ([i915#2437]) +1 similar issue
   [89]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-tglb3/igt@kms_writeback@writeback-check-output.html

  * igt@prime_nv_api@i915_self_import_to_different_fd:
    - shard-tglb:         NOTRUN -> [SKIP][90] ([fdo#109291]) +1 similar issue
   [90]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-tglb8/igt@prime_nv_api@i915_self_import_to_different_fd.html

  * igt@syncobj_basic@bad-destroy:
    - shard-skl:          [PASS][91] -> [DMESG-WARN][92] ([i915#1982]) +1 similar issue
   [91]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10660/shard-skl5/igt@syncobj_basic@bad-destroy.html
   [92]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-skl5/igt@syncobj_basic@bad-destroy.html

  * igt@sysfs_clients@recycle-many:
    - shard-apl:          NOTRUN -> [SKIP][93] ([fdo#109271] / [i915#2994]) +3 similar issues
   [93]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-apl6/igt@sysfs_clients@recycle-many.html

  * igt@sysfs_clients@sema-50:
    - shard-kbl:          NOTRUN -> [SKIP][94] ([fdo#109271] / [i915#2994])
   [94]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-kbl7/igt@sysfs_clients@sema-50.html

  * igt@sysfs_clients@split-25:
    - shard-tglb:         NOTRUN -> [SKIP][95] ([i915#2994])
   [95]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-tglb3/igt@sysfs_clients@split-25.html

  
#### Possible fixes ####

  * igt@gem_exec_fair@basic-none-share@rcs0:
    - shard-iclb:         [FAIL][96] ([i915#2842]) -> [PASS][97]
   [96]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10660/shard-iclb2/igt@gem_exec_fair@basic-none-share@rcs0.html
   [97]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-iclb7/igt@gem_exec_fair@basic-none-share@rcs0.html

  * igt@gem_exec_fair@basic-pace-solo@rcs0:
    - shard-glk:          [FAIL][98] ([i915#2842]) -> [PASS][99]
   [98]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10660/shard-glk8/igt@gem_exec_fair@basic-pace-solo@rcs0.html
   [99]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-glk9/igt@gem_exec_fair@basic-pace-solo@rcs0.html

  * igt@gem_exec_fair@basic-pace@rcs0:
    - shard-tglb:         [FAIL][100] ([i915#2842]) -> [PASS][101]
   [100]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10660/shard-tglb5/igt@gem_exec_fair@basic-pace@rcs0.html
   [101]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-tglb6/igt@gem_exec_fair@basic-pace@rcs0.html

  * igt@gem_exec_fair@basic-pace@vcs1:
    - shard-kbl:          [FAIL][102] ([i915#2842]) -> [PASS][103]
   [102]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10660/shard-kbl6/igt@gem_exec_fair@basic-pace@vcs1.html
   [103]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-kbl2/igt@gem_exec_fair@basic-pace@vcs1.html

  * igt@gem_exec_params@dr1-dirt:
    - shard-skl:          [DMESG-WARN][104] ([i915#1982]) -> [PASS][105]
   [104]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10660/shard-skl4/igt@gem_exec_params@dr1-dirt.html
   [105]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-skl5/igt@gem_exec_params@dr1-dirt.html

  * igt@gem_ppgtt@flink-and-close-vma-leak:
    - shard-glk:          [FAIL][106] ([i915#644]) -> [PASS][107]
   [106]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10660/shard-glk6/igt@gem_ppgtt@flink-and-close-vma-leak.html
   [107]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-glk5/igt@gem_ppgtt@flink-and-close-vma-leak.html

  * igt@gem_softpin@noreloc-s3:
    - shard-kbl:          [DMESG-WARN][108] ([i915#180]) -> [PASS][109] +1 similar issue
   [108]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10660/shard-kbl1/igt@gem_softpin@noreloc-s3.html
   [109]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-kbl7/igt@gem_softpin@noreloc-s3.html

  * igt@gem_workarounds@suspend-resume-context:
    - shard-skl:          [INCOMPLETE][110] ([i915#198] / [i915#4173]) -> [PASS][111]
   [110]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10660/shard-skl2/igt@gem_workarounds@suspend-resume-context.html
   [111]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-skl8/igt@gem_workarounds@suspend-resume-context.html

  * igt@gen9_exec_parse@allowed-single:
    - shard-skl:          [DMESG-WARN][112] ([i915#1436] / [i915#716]) -> [PASS][113]
   [112]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10660/shard-skl9/igt@gen9_exec_parse@allowed-single.html
   [113]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-skl1/igt@gen9_exec_parse@allowed-single.html

  * igt@i915_pm_dc@dc6-dpms:
    - shard-iclb:         [FAIL][114] ([i915#454]) -> [PASS][115]
   [114]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10660/shard-iclb3/igt@i915_pm_dc@dc6-dpms.html
   [115]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-iclb4/igt@i915_pm_dc@dc6-dpms.html

  * igt@kms_big_fb@x-tiled-32bpp-rotate-0:
    - shard-glk:          [DMESG-WARN][116] ([i915#118] / [i915#95]) -> [PASS][117]
   [116]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10660/shard-glk4/igt@kms_big_fb@x-tiled-32bpp-rotate-0.html
   [117]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-glk7/igt@kms_big_fb@x-tiled-32bpp-rotate-0.html

  * igt@kms_flip@plain-flip-fb-recreate-interruptible@a-edp1:
    - shard-skl:          [FAIL][118] ([i915#2122]) -> [PASS][119]
   [118]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10660/shard-skl6/igt@kms_flip@plain-flip-fb-recreate-interruptible@a-edp1.html
   [119]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-skl1/igt@kms_flip@plain-flip-fb-recreate-interruptible@a-edp1.html

  * igt@kms_frontbuffer_tracking@psr-suspend:
    - shard-tglb:         [INCOMPLETE][120] ([i915#2411] / [i915#456]) -> [PASS][121] +1 similar issue
   [120]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10660/shard-tglb7/igt@kms_frontbuffer_tracking@psr-suspend.html
   [121]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-tglb3/igt@kms_frontbuffer_tracking@psr-suspend.html

  * igt@kms_hdr@bpc-switch:
    - shard-skl:          [FAIL][122] ([i915#1188]) -> [PASS][123]
   [122]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10660/shard-skl1/igt@kms_hdr@bpc-switch.html
   [123]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-skl2/igt@kms_hdr@bpc-switch.html

  * igt@kms_plane@plane-panning-bottom-right-suspend@pipe-a-planes:
    - shard-apl:          [DMESG-WARN][124] ([i915#180]) -> [PASS][125]
   [124]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10660/shard-apl6/igt@kms_plane@plane-panning-bottom-right-suspend@pipe-a-planes.html
   [125]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-apl2/igt@kms_plane@plane-panning-bottom-right-suspend@pipe-a-planes.html

  * igt@kms_plane_alpha_blend@pipe-b-constant-alpha-min:
    - shard-skl:          [FAIL][126] ([fdo#108145] / [i915#265]) -> [PASS][127]
   [126]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10660/shard-skl10/igt@kms_plane_alpha_blend@pipe-b-constant-alpha-min.html
   [127]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-skl10/igt@kms_plane_alpha_blend@pipe-b-constant-alpha-min.html

  * igt@kms_psr@psr2_cursor_mmap_cpu:
    - shard-iclb:         [SKIP][128] ([fdo#109441]) -> [PASS][129] +2 similar issues
   [128]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10660/shard-iclb4/igt@kms_psr@psr2_cursor_mmap_cpu.html
   [129]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-iclb2/igt@kms_psr@psr2_cursor_mmap_cpu.html

  * igt@perf@polling-parameterized:
    - shard-skl:          [FAIL][130] ([i915#1542]) -> [PASS][131]
   [130]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10660/shard-skl3/igt@perf@polling-parameterized.html
   [131]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-skl8/igt@perf@polling-parameterized.html

  
#### Warnings ####

  * igt@kms_psr2_sf@primary-plane-update-sf-dmg-area-2:
    - shard-iclb:         [SKIP][132] ([i915#658]) -> [SKIP][133] ([i915#2920]) +1 similar issue
   [132]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10660/shard-iclb4/igt@kms_psr2_sf@primary-plane-update-sf-dmg-area-2.html
   [133]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-iclb2/igt@kms_psr2_sf@primary-plane-update-sf-dmg-area-2.html

  * igt@kms_psr2_sf@primary-plane-update-sf-dmg-area-4:
    - shard-iclb:         [SKIP][134] ([i915#2920]) -> [SKIP][135] ([i915#658]) +2 similar issues
   [134]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10660/shard-iclb2/igt@kms_psr2_sf@primary-plane-update-sf-dmg-area-4.html
   [135]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-iclb7/igt@kms_psr2_sf@primary-plane-update-sf-dmg-area-4.html

  * igt@runner@aborted:
    - shard-kbl:          ([FAIL][136], [FAIL][137], [FAIL][138], [FAIL][139], [FAIL][140]) ([i915#180] / [i915#1814] / [i915#3002] / [i915#3363]) -> ([FAIL][141], [FAIL][142], [FAIL][143], [FAIL][144], [FAIL][145], [FAIL][146], [FAIL][147], [FAIL][148]) ([fdo#109271] / [i915#180] / [i915#1814] / [i915#3002] / [i915#3363] / [i915#602])
   [136]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10660/shard-kbl1/igt@runner@aborted.html
   [137]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10660/shard-kbl1/igt@runner@aborted.html
   [138]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10660/shard-kbl4/igt@runner@aborted.html
   [139]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10660/shard-kbl4/igt@runner@aborted.html
   [140]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10660/shar

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/index.html

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^ permalink raw reply	[flat|nested] 72+ messages in thread

* [Intel-gfx] ✗ Fi.CI.IGT: failure for drm/i915/tc: Fix TypeC connect/disconnect sequences (rev8)
  2021-09-21  0:23 [Intel-gfx] [PATCH 00/13] drm/i915/tc: Fix TypeC connect/disconnect sequences Imre Deak
                   ` (21 preceding siblings ...)
  2021-09-29 21:47 ` Patchwork
@ 2021-09-29 21:54 ` Patchwork
  2021-09-29 22:21 ` [Intel-gfx] ✓ Fi.CI.IGT: success " Patchwork
  23 siblings, 0 replies; 72+ messages in thread
From: Patchwork @ 2021-09-29 21:54 UTC (permalink / raw)
  To: Imre Deak; +Cc: intel-gfx

[-- Attachment #1: Type: text/plain, Size: 30281 bytes --]

== Series Details ==

Series: drm/i915/tc: Fix TypeC connect/disconnect sequences (rev8)
URL   : https://patchwork.freedesktop.org/series/94878/
State : failure

== Summary ==

CI Bug Log - changes from CI_DRM_10660_full -> Patchwork_21189_full
====================================================

Summary
-------

  **FAILURE**

  Serious unknown changes coming with Patchwork_21189_full absolutely need to be
  verified manually.
  
  If you think the reported changes have nothing to do with the changes
  introduced in Patchwork_21189_full, please notify your bug team to allow them
  to document this new failure mode, which will reduce false positives in CI.

  

Possible new issues
-------------------

  Here are the unknown changes that may have been introduced in Patchwork_21189_full:

### IGT changes ###

#### Possible regressions ####

  * igt@gem_eio@reset-stress:
    - shard-skl:          [PASS][1] -> [FAIL][2]
   [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10660/shard-skl1/igt@gem_eio@reset-stress.html
   [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-skl2/igt@gem_eio@reset-stress.html

  
Known issues
------------

  Here are the changes found in Patchwork_21189_full that come from known issues:

### IGT changes ###

#### Issues hit ####

  * igt@fbdev@unaligned-read:
    - shard-glk:          [PASS][3] -> [FAIL][4] ([i915#4218])
   [3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10660/shard-glk3/igt@fbdev@unaligned-read.html
   [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-glk4/igt@fbdev@unaligned-read.html

  * igt@gem_create@create-massive:
    - shard-apl:          NOTRUN -> [DMESG-WARN][5] ([i915#3002])
   [5]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-apl6/igt@gem_create@create-massive.html

  * igt@gem_ctx_sseu@mmap-args:
    - shard-tglb:         NOTRUN -> [SKIP][6] ([i915#280])
   [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-tglb2/igt@gem_ctx_sseu@mmap-args.html

  * igt@gem_eio@unwedge-stress:
    - shard-iclb:         [PASS][7] -> [TIMEOUT][8] ([i915#2369] / [i915#2481] / [i915#3070])
   [7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10660/shard-iclb7/igt@gem_eio@unwedge-stress.html
   [8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-iclb3/igt@gem_eio@unwedge-stress.html

  * igt@gem_exec_fair@basic-deadline:
    - shard-glk:          [PASS][9] -> [FAIL][10] ([i915#2846])
   [9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10660/shard-glk8/igt@gem_exec_fair@basic-deadline.html
   [10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-glk1/igt@gem_exec_fair@basic-deadline.html

  * igt@gem_exec_fair@basic-flow@rcs0:
    - shard-skl:          NOTRUN -> [SKIP][11] ([fdo#109271]) +106 similar issues
   [11]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-skl1/igt@gem_exec_fair@basic-flow@rcs0.html

  * igt@gem_exec_fair@basic-none-share@rcs0:
    - shard-tglb:         [PASS][12] -> [FAIL][13] ([i915#2842]) +1 similar issue
   [12]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10660/shard-tglb1/igt@gem_exec_fair@basic-none-share@rcs0.html
   [13]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-tglb6/igt@gem_exec_fair@basic-none-share@rcs0.html

  * igt@gem_exec_fair@basic-none-vip@rcs0:
    - shard-kbl:          [PASS][14] -> [FAIL][15] ([i915#2842])
   [14]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10660/shard-kbl2/igt@gem_exec_fair@basic-none-vip@rcs0.html
   [15]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-kbl2/igt@gem_exec_fair@basic-none-vip@rcs0.html

  * igt@gem_exec_fair@basic-none@vcs1:
    - shard-iclb:         NOTRUN -> [FAIL][16] ([i915#2842])
   [16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-iclb4/igt@gem_exec_fair@basic-none@vcs1.html

  * igt@gem_exec_fair@basic-pace@rcs0:
    - shard-iclb:         [PASS][17] -> [FAIL][18] ([i915#2842])
   [17]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10660/shard-iclb1/igt@gem_exec_fair@basic-pace@rcs0.html
   [18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-iclb7/igt@gem_exec_fair@basic-pace@rcs0.html

  * igt@gem_exec_gttfill@basic:
    - shard-glk:          [PASS][19] -> [DMESG-WARN][20] ([i915#118] / [i915#95]) +1 similar issue
   [19]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10660/shard-glk1/igt@gem_exec_gttfill@basic.html
   [20]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-glk4/igt@gem_exec_gttfill@basic.html

  * igt@gem_exec_params@no-blt:
    - shard-tglb:         NOTRUN -> [SKIP][21] ([fdo#109283])
   [21]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-tglb3/igt@gem_exec_params@no-blt.html

  * igt@gem_exec_params@secure-non-master:
    - shard-tglb:         NOTRUN -> [SKIP][22] ([fdo#112283])
   [22]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-tglb3/igt@gem_exec_params@secure-non-master.html

  * igt@gem_ppgtt@flink-and-close-vma-leak:
    - shard-skl:          [PASS][23] -> [FAIL][24] ([i915#644])
   [23]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10660/shard-skl2/igt@gem_ppgtt@flink-and-close-vma-leak.html
   [24]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-skl3/igt@gem_ppgtt@flink-and-close-vma-leak.html

  * igt@gen3_render_tiledy_blits:
    - shard-tglb:         NOTRUN -> [SKIP][25] ([fdo#109289]) +2 similar issues
   [25]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-tglb8/igt@gen3_render_tiledy_blits.html

  * igt@gen9_exec_parse@unaligned-jump:
    - shard-tglb:         NOTRUN -> [SKIP][26] ([i915#2856])
   [26]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-tglb3/igt@gen9_exec_parse@unaligned-jump.html

  * igt@i915_pm_lpsp@kms-lpsp@kms-lpsp-dp:
    - shard-apl:          NOTRUN -> [SKIP][27] ([fdo#109271] / [i915#1937])
   [27]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-apl6/igt@i915_pm_lpsp@kms-lpsp@kms-lpsp-dp.html

  * igt@i915_pm_rpm@gem-execbuf-stress-pc8:
    - shard-tglb:         NOTRUN -> [SKIP][28] ([fdo#109506] / [i915#2411])
   [28]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-tglb3/igt@i915_pm_rpm@gem-execbuf-stress-pc8.html

  * igt@i915_selftest@live@gt_lrc:
    - shard-tglb:         NOTRUN -> [DMESG-FAIL][29] ([i915#2373])
   [29]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-tglb3/igt@i915_selftest@live@gt_lrc.html

  * igt@i915_selftest@live@gt_pm:
    - shard-tglb:         NOTRUN -> [DMESG-FAIL][30] ([i915#1759] / [i915#2291])
   [30]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-tglb3/igt@i915_selftest@live@gt_pm.html

  * igt@i915_suspend@forcewake:
    - shard-apl:          NOTRUN -> [DMESG-WARN][31] ([i915#180]) +1 similar issue
   [31]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-apl6/igt@i915_suspend@forcewake.html

  * igt@kms_async_flips@crc:
    - shard-skl:          NOTRUN -> [FAIL][32] ([i915#4224])
   [32]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-skl7/igt@kms_async_flips@crc.html

  * igt@kms_big_fb@linear-16bpp-rotate-90:
    - shard-apl:          NOTRUN -> [SKIP][33] ([fdo#109271]) +195 similar issues
   [33]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-apl6/igt@kms_big_fb@linear-16bpp-rotate-90.html

  * igt@kms_big_fb@linear-32bpp-rotate-270:
    - shard-tglb:         NOTRUN -> [SKIP][34] ([fdo#111614])
   [34]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-tglb8/igt@kms_big_fb@linear-32bpp-rotate-270.html

  * igt@kms_big_fb@x-tiled-max-hw-stride-64bpp-rotate-180-async-flip:
    - shard-skl:          NOTRUN -> [FAIL][35] ([i915#3722]) +1 similar issue
   [35]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-skl8/igt@kms_big_fb@x-tiled-max-hw-stride-64bpp-rotate-180-async-flip.html

  * igt@kms_big_fb@yf-tiled-8bpp-rotate-90:
    - shard-tglb:         NOTRUN -> [SKIP][36] ([fdo#111615]) +1 similar issue
   [36]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-tglb3/igt@kms_big_fb@yf-tiled-8bpp-rotate-90.html

  * igt@kms_big_fb@yf-tiled-max-hw-stride-32bpp-rotate-0-hflip:
    - shard-apl:          NOTRUN -> [SKIP][37] ([fdo#109271] / [i915#3777]) +2 similar issues
   [37]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-apl3/igt@kms_big_fb@yf-tiled-max-hw-stride-32bpp-rotate-0-hflip.html

  * igt@kms_big_fb@yf-tiled-max-hw-stride-32bpp-rotate-180-hflip:
    - shard-kbl:          NOTRUN -> [SKIP][38] ([fdo#109271] / [i915#3777])
   [38]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-kbl3/igt@kms_big_fb@yf-tiled-max-hw-stride-32bpp-rotate-180-hflip.html
    - shard-skl:          NOTRUN -> [SKIP][39] ([fdo#109271] / [i915#3777])
   [39]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-skl8/igt@kms_big_fb@yf-tiled-max-hw-stride-32bpp-rotate-180-hflip.html

  * igt@kms_ccs@pipe-a-ccs-on-another-bo-yf_tiled_ccs:
    - shard-tglb:         NOTRUN -> [SKIP][40] ([i915#3689]) +3 similar issues
   [40]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-tglb3/igt@kms_ccs@pipe-a-ccs-on-another-bo-yf_tiled_ccs.html

  * igt@kms_ccs@pipe-b-ccs-on-another-bo-y_tiled_gen12_mc_ccs:
    - shard-skl:          NOTRUN -> [SKIP][41] ([fdo#109271] / [i915#3886]) +5 similar issues
   [41]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-skl9/igt@kms_ccs@pipe-b-ccs-on-another-bo-y_tiled_gen12_mc_ccs.html

  * igt@kms_ccs@pipe-b-random-ccs-data-y_tiled_gen12_mc_ccs:
    - shard-kbl:          NOTRUN -> [SKIP][42] ([fdo#109271] / [i915#3886]) +5 similar issues
   [42]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-kbl7/igt@kms_ccs@pipe-b-random-ccs-data-y_tiled_gen12_mc_ccs.html

  * igt@kms_ccs@pipe-c-ccs-on-another-bo-y_tiled_gen12_rc_ccs_cc:
    - shard-apl:          NOTRUN -> [SKIP][43] ([fdo#109271] / [i915#3886]) +14 similar issues
   [43]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-apl3/igt@kms_ccs@pipe-c-ccs-on-another-bo-y_tiled_gen12_rc_ccs_cc.html

  * igt@kms_ccs@pipe-c-missing-ccs-buffer-y_tiled_gen12_mc_ccs:
    - shard-tglb:         NOTRUN -> [SKIP][44] ([i915#3689] / [i915#3886]) +1 similar issue
   [44]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-tglb8/igt@kms_ccs@pipe-c-missing-ccs-buffer-y_tiled_gen12_mc_ccs.html

  * igt@kms_chamelium@vga-hpd-after-suspend:
    - shard-apl:          NOTRUN -> [SKIP][45] ([fdo#109271] / [fdo#111827]) +18 similar issues
   [45]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-apl3/igt@kms_chamelium@vga-hpd-after-suspend.html

  * igt@kms_color_chamelium@pipe-a-ctm-blue-to-red:
    - shard-kbl:          NOTRUN -> [SKIP][46] ([fdo#109271] / [fdo#111827]) +5 similar issues
   [46]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-kbl3/igt@kms_color_chamelium@pipe-a-ctm-blue-to-red.html

  * igt@kms_color_chamelium@pipe-b-ctm-max:
    - shard-skl:          NOTRUN -> [SKIP][47] ([fdo#109271] / [fdo#111827]) +6 similar issues
   [47]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-skl3/igt@kms_color_chamelium@pipe-b-ctm-max.html

  * igt@kms_color_chamelium@pipe-c-ctm-red-to-blue:
    - shard-tglb:         NOTRUN -> [SKIP][48] ([fdo#109284] / [fdo#111827]) +3 similar issues
   [48]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-tglb3/igt@kms_color_chamelium@pipe-c-ctm-red-to-blue.html

  * igt@kms_content_protection@lic:
    - shard-apl:          NOTRUN -> [TIMEOUT][49] ([i915#1319]) +1 similar issue
   [49]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-apl6/igt@kms_content_protection@lic.html

  * igt@kms_content_protection@mei_interface:
    - shard-tglb:         NOTRUN -> [SKIP][50] ([fdo#111828])
   [50]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-tglb3/igt@kms_content_protection@mei_interface.html

  * igt@kms_cursor_crc@pipe-a-cursor-512x170-random:
    - shard-tglb:         NOTRUN -> [SKIP][51] ([fdo#109279] / [i915#3359]) +1 similar issue
   [51]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-tglb8/igt@kms_cursor_crc@pipe-a-cursor-512x170-random.html

  * igt@kms_cursor_crc@pipe-a-cursor-suspend:
    - shard-skl:          NOTRUN -> [INCOMPLETE][52] ([i915#2828] / [i915#300])
   [52]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-skl9/igt@kms_cursor_crc@pipe-a-cursor-suspend.html

  * igt@kms_cursor_crc@pipe-c-cursor-32x10-rapid-movement:
    - shard-tglb:         NOTRUN -> [SKIP][53] ([i915#3359]) +3 similar issues
   [53]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-tglb3/igt@kms_cursor_crc@pipe-c-cursor-32x10-rapid-movement.html

  * igt@kms_cursor_crc@pipe-c-cursor-32x32-onscreen:
    - shard-tglb:         NOTRUN -> [SKIP][54] ([i915#3319])
   [54]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-tglb3/igt@kms_cursor_crc@pipe-c-cursor-32x32-onscreen.html

  * igt@kms_cursor_crc@pipe-d-cursor-suspend:
    - shard-kbl:          NOTRUN -> [SKIP][55] ([fdo#109271]) +79 similar issues
   [55]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-kbl7/igt@kms_cursor_crc@pipe-d-cursor-suspend.html
    - shard-tglb:         [PASS][56] -> [INCOMPLETE][57] ([i915#4211])
   [56]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10660/shard-tglb2/igt@kms_cursor_crc@pipe-d-cursor-suspend.html
   [57]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-tglb7/igt@kms_cursor_crc@pipe-d-cursor-suspend.html

  * igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions:
    - shard-skl:          [PASS][58] -> [FAIL][59] ([i915#2346])
   [58]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10660/shard-skl1/igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions.html
   [59]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-skl2/igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions.html

  * igt@kms_cursor_legacy@pipe-d-single-bo:
    - shard-kbl:          NOTRUN -> [SKIP][60] ([fdo#109271] / [i915#533]) +1 similar issue
   [60]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-kbl7/igt@kms_cursor_legacy@pipe-d-single-bo.html

  * igt@kms_flip@2x-plain-flip-ts-check:
    - shard-tglb:         NOTRUN -> [SKIP][61] ([fdo#111825]) +12 similar issues
   [61]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-tglb8/igt@kms_flip@2x-plain-flip-ts-check.html

  * igt@kms_flip@flip-vs-expired-vblank-interruptible@b-edp1:
    - shard-skl:          [PASS][62] -> [FAIL][63] ([i915#79])
   [62]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10660/shard-skl3/igt@kms_flip@flip-vs-expired-vblank-interruptible@b-edp1.html
   [63]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-skl7/igt@kms_flip@flip-vs-expired-vblank-interruptible@b-edp1.html

  * igt@kms_flip@flip-vs-suspend-interruptible@a-dp1:
    - shard-apl:          [PASS][64] -> [DMESG-WARN][65] ([i915#180])
   [64]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10660/shard-apl3/igt@kms_flip@flip-vs-suspend-interruptible@a-dp1.html
   [65]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-apl2/igt@kms_flip@flip-vs-suspend-interruptible@a-dp1.html

  * igt@kms_flip_scaled_crc@flip-32bpp-ytile-to-64bpp-ytile:
    - shard-iclb:         [PASS][66] -> [SKIP][67] ([i915#3701])
   [66]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10660/shard-iclb4/igt@kms_flip_scaled_crc@flip-32bpp-ytile-to-64bpp-ytile.html
   [67]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-iclb2/igt@kms_flip_scaled_crc@flip-32bpp-ytile-to-64bpp-ytile.html

  * igt@kms_flip_scaled_crc@flip-32bpp-ytileccs-to-64bpp-ytile:
    - shard-tglb:         NOTRUN -> [SKIP][68] ([i915#2587])
   [68]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-tglb8/igt@kms_flip_scaled_crc@flip-32bpp-ytileccs-to-64bpp-ytile.html

  * igt@kms_flip_scaled_crc@flip-64bpp-ytile-to-32bpp-ytilercccs:
    - shard-apl:          NOTRUN -> [SKIP][69] ([fdo#109271] / [i915#2672])
   [69]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-apl2/igt@kms_flip_scaled_crc@flip-64bpp-ytile-to-32bpp-ytilercccs.html

  * igt@kms_frontbuffer_tracking@fbc-suspend:
    - shard-kbl:          [PASS][70] -> [DMESG-WARN][71] ([i915#180]) +6 similar issues
   [70]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10660/shard-kbl4/igt@kms_frontbuffer_tracking@fbc-suspend.html
   [71]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-kbl1/igt@kms_frontbuffer_tracking@fbc-suspend.html

  * igt@kms_pipe_crc_basic@compare-crc-sanitycheck-pipe-d:
    - shard-apl:          NOTRUN -> [SKIP][72] ([fdo#109271] / [i915#533]) +1 similar issue
   [72]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-apl6/igt@kms_pipe_crc_basic@compare-crc-sanitycheck-pipe-d.html

  * igt@kms_pipe_crc_basic@suspend-read-crc-pipe-d:
    - shard-skl:          NOTRUN -> [SKIP][73] ([fdo#109271] / [i915#533])
   [73]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-skl8/igt@kms_pipe_crc_basic@suspend-read-crc-pipe-d.html

  * igt@kms_plane_alpha_blend@pipe-a-alpha-opaque-fb:
    - shard-apl:          NOTRUN -> [FAIL][74] ([fdo#108145] / [i915#265]) +2 similar issues
   [74]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-apl1/igt@kms_plane_alpha_blend@pipe-a-alpha-opaque-fb.html

  * igt@kms_plane_alpha_blend@pipe-a-coverage-7efc:
    - shard-skl:          [PASS][75] -> [FAIL][76] ([fdo#108145] / [i915#265])
   [75]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10660/shard-skl8/igt@kms_plane_alpha_blend@pipe-a-coverage-7efc.html
   [76]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-skl4/igt@kms_plane_alpha_blend@pipe-a-coverage-7efc.html

  * igt@kms_plane_alpha_blend@pipe-b-constant-alpha-max:
    - shard-kbl:          NOTRUN -> [FAIL][77] ([fdo#108145] / [i915#265])
   [77]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-kbl7/igt@kms_plane_alpha_blend@pipe-b-constant-alpha-max.html

  * igt@kms_plane_lowres@pipe-b-tiling-x:
    - shard-tglb:         NOTRUN -> [SKIP][78] ([i915#3536]) +1 similar issue
   [78]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-tglb3/igt@kms_plane_lowres@pipe-b-tiling-x.html

  * igt@kms_psr2_sf@overlay-plane-update-sf-dmg-area-4:
    - shard-kbl:          NOTRUN -> [SKIP][79] ([fdo#109271] / [i915#658]) +1 similar issue
   [79]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-kbl3/igt@kms_psr2_sf@overlay-plane-update-sf-dmg-area-4.html

  * igt@kms_psr2_sf@overlay-primary-update-sf-dmg-area-4:
    - shard-apl:          NOTRUN -> [SKIP][80] ([fdo#109271] / [i915#658]) +5 similar issues
   [80]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-apl1/igt@kms_psr2_sf@overlay-primary-update-sf-dmg-area-4.html

  * igt@kms_psr2_sf@primary-plane-update-sf-dmg-area-1:
    - shard-skl:          NOTRUN -> [SKIP][81] ([fdo#109271] / [i915#658]) +1 similar issue
   [81]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-skl1/igt@kms_psr2_sf@primary-plane-update-sf-dmg-area-1.html

  * igt@kms_psr@psr2_primary_mmap_gtt:
    - shard-tglb:         NOTRUN -> [FAIL][82] ([i915#132] / [i915#3467]) +1 similar issue
   [82]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-tglb8/igt@kms_psr@psr2_primary_mmap_gtt.html

  * igt@kms_psr@psr2_sprite_blt:
    - shard-iclb:         [PASS][83] -> [SKIP][84] ([fdo#109441]) +1 similar issue
   [83]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10660/shard-iclb2/igt@kms_psr@psr2_sprite_blt.html
   [84]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-iclb7/igt@kms_psr@psr2_sprite_blt.html

  * igt@kms_sysfs_edid_timing:
    - shard-kbl:          NOTRUN -> [FAIL][85] ([IGT#2])
   [85]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-kbl3/igt@kms_sysfs_edid_timing.html
    - shard-skl:          NOTRUN -> [FAIL][86] ([IGT#2])
   [86]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-skl8/igt@kms_sysfs_edid_timing.html

  * igt@kms_vblank@pipe-d-ts-continuation-suspend:
    - shard-tglb:         [PASS][87] -> [INCOMPLETE][88] ([i915#3896])
   [87]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10660/shard-tglb1/igt@kms_vblank@pipe-d-ts-continuation-suspend.html
   [88]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-tglb7/igt@kms_vblank@pipe-d-ts-continuation-suspend.html

  * igt@kms_writeback@writeback-check-output:
    - shard-tglb:         NOTRUN -> [SKIP][89] ([i915#2437]) +1 similar issue
   [89]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-tglb3/igt@kms_writeback@writeback-check-output.html

  * igt@prime_nv_api@i915_self_import_to_different_fd:
    - shard-tglb:         NOTRUN -> [SKIP][90] ([fdo#109291]) +1 similar issue
   [90]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-tglb8/igt@prime_nv_api@i915_self_import_to_different_fd.html

  * igt@syncobj_basic@bad-destroy:
    - shard-skl:          [PASS][91] -> [DMESG-WARN][92] ([i915#1982]) +1 similar issue
   [91]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10660/shard-skl5/igt@syncobj_basic@bad-destroy.html
   [92]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-skl5/igt@syncobj_basic@bad-destroy.html

  * igt@sysfs_clients@recycle-many:
    - shard-apl:          NOTRUN -> [SKIP][93] ([fdo#109271] / [i915#2994]) +3 similar issues
   [93]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-apl6/igt@sysfs_clients@recycle-many.html

  * igt@sysfs_clients@sema-50:
    - shard-kbl:          NOTRUN -> [SKIP][94] ([fdo#109271] / [i915#2994])
   [94]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-kbl7/igt@sysfs_clients@sema-50.html

  * igt@sysfs_clients@split-25:
    - shard-tglb:         NOTRUN -> [SKIP][95] ([i915#2994])
   [95]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-tglb3/igt@sysfs_clients@split-25.html

  
#### Possible fixes ####

  * igt@gem_exec_fair@basic-none-share@rcs0:
    - shard-iclb:         [FAIL][96] ([i915#2842]) -> [PASS][97]
   [96]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10660/shard-iclb2/igt@gem_exec_fair@basic-none-share@rcs0.html
   [97]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-iclb7/igt@gem_exec_fair@basic-none-share@rcs0.html

  * igt@gem_exec_fair@basic-pace-solo@rcs0:
    - shard-glk:          [FAIL][98] ([i915#2842]) -> [PASS][99]
   [98]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10660/shard-glk8/igt@gem_exec_fair@basic-pace-solo@rcs0.html
   [99]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-glk9/igt@gem_exec_fair@basic-pace-solo@rcs0.html

  * igt@gem_exec_fair@basic-pace@rcs0:
    - shard-tglb:         [FAIL][100] ([i915#2842]) -> [PASS][101]
   [100]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10660/shard-tglb5/igt@gem_exec_fair@basic-pace@rcs0.html
   [101]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-tglb6/igt@gem_exec_fair@basic-pace@rcs0.html

  * igt@gem_exec_fair@basic-pace@vcs1:
    - shard-kbl:          [FAIL][102] ([i915#2842]) -> [PASS][103]
   [102]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10660/shard-kbl6/igt@gem_exec_fair@basic-pace@vcs1.html
   [103]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-kbl2/igt@gem_exec_fair@basic-pace@vcs1.html

  * igt@gem_exec_params@dr1-dirt:
    - shard-skl:          [DMESG-WARN][104] ([i915#1982]) -> [PASS][105]
   [104]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10660/shard-skl4/igt@gem_exec_params@dr1-dirt.html
   [105]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-skl5/igt@gem_exec_params@dr1-dirt.html

  * igt@gem_ppgtt@flink-and-close-vma-leak:
    - shard-glk:          [FAIL][106] ([i915#644]) -> [PASS][107]
   [106]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10660/shard-glk6/igt@gem_ppgtt@flink-and-close-vma-leak.html
   [107]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-glk5/igt@gem_ppgtt@flink-and-close-vma-leak.html

  * igt@gem_softpin@noreloc-s3:
    - shard-kbl:          [DMESG-WARN][108] ([i915#180]) -> [PASS][109] +1 similar issue
   [108]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10660/shard-kbl1/igt@gem_softpin@noreloc-s3.html
   [109]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-kbl7/igt@gem_softpin@noreloc-s3.html

  * igt@gem_workarounds@suspend-resume-context:
    - shard-skl:          [INCOMPLETE][110] ([i915#198] / [i915#4173]) -> [PASS][111]
   [110]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10660/shard-skl2/igt@gem_workarounds@suspend-resume-context.html
   [111]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-skl8/igt@gem_workarounds@suspend-resume-context.html

  * igt@gen9_exec_parse@allowed-single:
    - shard-skl:          [DMESG-WARN][112] ([i915#1436] / [i915#716]) -> [PASS][113]
   [112]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10660/shard-skl9/igt@gen9_exec_parse@allowed-single.html
   [113]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-skl1/igt@gen9_exec_parse@allowed-single.html

  * igt@i915_pm_dc@dc6-dpms:
    - shard-iclb:         [FAIL][114] ([i915#454]) -> [PASS][115]
   [114]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10660/shard-iclb3/igt@i915_pm_dc@dc6-dpms.html
   [115]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-iclb4/igt@i915_pm_dc@dc6-dpms.html

  * igt@kms_big_fb@x-tiled-32bpp-rotate-0:
    - shard-glk:          [DMESG-WARN][116] ([i915#118] / [i915#95]) -> [PASS][117]
   [116]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10660/shard-glk4/igt@kms_big_fb@x-tiled-32bpp-rotate-0.html
   [117]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-glk7/igt@kms_big_fb@x-tiled-32bpp-rotate-0.html

  * igt@kms_flip@plain-flip-fb-recreate-interruptible@a-edp1:
    - shard-skl:          [FAIL][118] ([i915#2122]) -> [PASS][119]
   [118]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10660/shard-skl6/igt@kms_flip@plain-flip-fb-recreate-interruptible@a-edp1.html
   [119]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-skl1/igt@kms_flip@plain-flip-fb-recreate-interruptible@a-edp1.html

  * igt@kms_frontbuffer_tracking@psr-suspend:
    - shard-tglb:         [INCOMPLETE][120] ([i915#2411] / [i915#456]) -> [PASS][121] +1 similar issue
   [120]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10660/shard-tglb7/igt@kms_frontbuffer_tracking@psr-suspend.html
   [121]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-tglb3/igt@kms_frontbuffer_tracking@psr-suspend.html

  * igt@kms_hdr@bpc-switch:
    - shard-skl:          [FAIL][122] ([i915#1188]) -> [PASS][123]
   [122]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10660/shard-skl1/igt@kms_hdr@bpc-switch.html
   [123]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-skl2/igt@kms_hdr@bpc-switch.html

  * igt@kms_plane@plane-panning-bottom-right-suspend@pipe-a-planes:
    - shard-apl:          [DMESG-WARN][124] ([i915#180]) -> [PASS][125]
   [124]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10660/shard-apl6/igt@kms_plane@plane-panning-bottom-right-suspend@pipe-a-planes.html
   [125]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-apl2/igt@kms_plane@plane-panning-bottom-right-suspend@pipe-a-planes.html

  * igt@kms_plane_alpha_blend@pipe-b-constant-alpha-min:
    - shard-skl:          [FAIL][126] ([fdo#108145] / [i915#265]) -> [PASS][127]
   [126]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10660/shard-skl10/igt@kms_plane_alpha_blend@pipe-b-constant-alpha-min.html
   [127]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-skl10/igt@kms_plane_alpha_blend@pipe-b-constant-alpha-min.html

  * igt@kms_psr@psr2_cursor_mmap_cpu:
    - shard-iclb:         [SKIP][128] ([fdo#109441]) -> [PASS][129] +2 similar issues
   [128]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10660/shard-iclb4/igt@kms_psr@psr2_cursor_mmap_cpu.html
   [129]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-iclb2/igt@kms_psr@psr2_cursor_mmap_cpu.html

  * igt@perf@polling-parameterized:
    - shard-skl:          [FAIL][130] ([i915#1542]) -> [PASS][131]
   [130]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10660/shard-skl3/igt@perf@polling-parameterized.html
   [131]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-skl8/igt@perf@polling-parameterized.html

  
#### Warnings ####

  * igt@kms_psr2_sf@primary-plane-update-sf-dmg-area-2:
    - shard-iclb:         [SKIP][132] ([i915#658]) -> [SKIP][133] ([i915#2920]) +1 similar issue
   [132]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10660/shard-iclb4/igt@kms_psr2_sf@primary-plane-update-sf-dmg-area-2.html
   [133]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-iclb2/igt@kms_psr2_sf@primary-plane-update-sf-dmg-area-2.html

  * igt@kms_psr2_sf@primary-plane-update-sf-dmg-area-4:
    - shard-iclb:         [SKIP][134] ([i915#2920]) -> [SKIP][135] ([i915#658]) +2 similar issues
   [134]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10660/shard-iclb2/igt@kms_psr2_sf@primary-plane-update-sf-dmg-area-4.html
   [135]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-iclb7/igt@kms_psr2_sf@primary-plane-update-sf-dmg-area-4.html

  * igt@runner@aborted:
    - shard-kbl:          ([FAIL][136], [FAIL][137], [FAIL][138], [FAIL][139], [FAIL][140]) ([i915#180] / [i915#1814] / [i915#3002] / [i915#3363]) -> ([FAIL][141], [FAIL][142], [FAIL][143], [FAIL][144], [FAIL][145], [FAIL][146], [FAIL][147], [FAIL][148]) ([fdo#109271] / [i915#180] / [i915#1814] / [i915#3002] / [i915#3363] / [i915#602])
   [136]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10660/shard-kbl1/igt@runner@aborted.html
   [137]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10660/shard-kbl1/igt@runner@aborted.html
   [138]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10660/shard-kbl4/igt@runner@aborted.html
   [139]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10660/shard-kbl4/igt@runner@aborted.html
   [140]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10660/shar

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/index.html

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^ permalink raw reply	[flat|nested] 72+ messages in thread

* [Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915/tc: Fix TypeC connect/disconnect sequences (rev8)
  2021-09-21  0:23 [Intel-gfx] [PATCH 00/13] drm/i915/tc: Fix TypeC connect/disconnect sequences Imre Deak
                   ` (22 preceding siblings ...)
  2021-09-29 21:54 ` Patchwork
@ 2021-09-29 22:21 ` Patchwork
  23 siblings, 0 replies; 72+ messages in thread
From: Patchwork @ 2021-09-29 22:21 UTC (permalink / raw)
  To: Imre Deak; +Cc: intel-gfx

[-- Attachment #1: Type: text/plain, Size: 30281 bytes --]

== Series Details ==

Series: drm/i915/tc: Fix TypeC connect/disconnect sequences (rev8)
URL   : https://patchwork.freedesktop.org/series/94878/
State : success

== Summary ==

CI Bug Log - changes from CI_DRM_10660_full -> Patchwork_21189_full
====================================================

Summary
-------

  **SUCCESS**

  No regressions found.

  

Possible new issues
-------------------

  Here are the unknown changes that may have been introduced in Patchwork_21189_full:

### IGT changes ###

#### Suppressed ####

  The following results come from untrusted machines, tests, or statuses.
  They do not affect the overall result.

  * igt@kms_async_flips@crc:
    - {shard-rkl}:        NOTRUN -> [SKIP][1] +1 similar issue
   [1]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-rkl-1/igt@kms_async_flips@crc.html

  
Known issues
------------

  Here are the changes found in Patchwork_21189_full that come from known issues:

### IGT changes ###

#### Issues hit ####

  * igt@fbdev@unaligned-read:
    - shard-glk:          [PASS][2] -> [FAIL][3] ([i915#4218])
   [2]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10660/shard-glk3/igt@fbdev@unaligned-read.html
   [3]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-glk4/igt@fbdev@unaligned-read.html

  * igt@gem_create@create-massive:
    - shard-apl:          NOTRUN -> [DMESG-WARN][4] ([i915#3002])
   [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-apl6/igt@gem_create@create-massive.html

  * igt@gem_ctx_sseu@mmap-args:
    - shard-tglb:         NOTRUN -> [SKIP][5] ([i915#280])
   [5]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-tglb2/igt@gem_ctx_sseu@mmap-args.html

  * igt@gem_eio@reset-stress:
    - shard-skl:          [PASS][6] -> [FAIL][7] ([i915#4225])
   [6]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10660/shard-skl1/igt@gem_eio@reset-stress.html
   [7]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-skl2/igt@gem_eio@reset-stress.html

  * igt@gem_eio@unwedge-stress:
    - shard-iclb:         [PASS][8] -> [TIMEOUT][9] ([i915#2369] / [i915#2481] / [i915#3070])
   [8]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10660/shard-iclb7/igt@gem_eio@unwedge-stress.html
   [9]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-iclb3/igt@gem_eio@unwedge-stress.html

  * igt@gem_exec_fair@basic-deadline:
    - shard-glk:          [PASS][10] -> [FAIL][11] ([i915#2846])
   [10]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10660/shard-glk8/igt@gem_exec_fair@basic-deadline.html
   [11]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-glk1/igt@gem_exec_fair@basic-deadline.html

  * igt@gem_exec_fair@basic-flow@rcs0:
    - shard-skl:          NOTRUN -> [SKIP][12] ([fdo#109271]) +106 similar issues
   [12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-skl1/igt@gem_exec_fair@basic-flow@rcs0.html

  * igt@gem_exec_fair@basic-none-share@rcs0:
    - shard-tglb:         [PASS][13] -> [FAIL][14] ([i915#2842]) +1 similar issue
   [13]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10660/shard-tglb1/igt@gem_exec_fair@basic-none-share@rcs0.html
   [14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-tglb6/igt@gem_exec_fair@basic-none-share@rcs0.html

  * igt@gem_exec_fair@basic-none-vip@rcs0:
    - shard-kbl:          [PASS][15] -> [FAIL][16] ([i915#2842])
   [15]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10660/shard-kbl2/igt@gem_exec_fair@basic-none-vip@rcs0.html
   [16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-kbl2/igt@gem_exec_fair@basic-none-vip@rcs0.html

  * igt@gem_exec_fair@basic-none@vcs1:
    - shard-iclb:         NOTRUN -> [FAIL][17] ([i915#2842])
   [17]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-iclb4/igt@gem_exec_fair@basic-none@vcs1.html

  * igt@gem_exec_fair@basic-pace@rcs0:
    - shard-iclb:         [PASS][18] -> [FAIL][19] ([i915#2842])
   [18]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10660/shard-iclb1/igt@gem_exec_fair@basic-pace@rcs0.html
   [19]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-iclb7/igt@gem_exec_fair@basic-pace@rcs0.html

  * igt@gem_exec_gttfill@basic:
    - shard-glk:          [PASS][20] -> [DMESG-WARN][21] ([i915#118] / [i915#95]) +1 similar issue
   [20]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10660/shard-glk1/igt@gem_exec_gttfill@basic.html
   [21]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-glk4/igt@gem_exec_gttfill@basic.html

  * igt@gem_exec_params@no-blt:
    - shard-tglb:         NOTRUN -> [SKIP][22] ([fdo#109283])
   [22]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-tglb3/igt@gem_exec_params@no-blt.html

  * igt@gem_exec_params@secure-non-master:
    - shard-tglb:         NOTRUN -> [SKIP][23] ([fdo#112283])
   [23]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-tglb3/igt@gem_exec_params@secure-non-master.html

  * igt@gem_ppgtt@flink-and-close-vma-leak:
    - shard-skl:          [PASS][24] -> [FAIL][25] ([i915#644])
   [24]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10660/shard-skl2/igt@gem_ppgtt@flink-and-close-vma-leak.html
   [25]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-skl3/igt@gem_ppgtt@flink-and-close-vma-leak.html

  * igt@gen3_render_tiledy_blits:
    - shard-tglb:         NOTRUN -> [SKIP][26] ([fdo#109289]) +2 similar issues
   [26]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-tglb8/igt@gen3_render_tiledy_blits.html

  * igt@gen9_exec_parse@unaligned-jump:
    - shard-tglb:         NOTRUN -> [SKIP][27] ([i915#2856])
   [27]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-tglb3/igt@gen9_exec_parse@unaligned-jump.html

  * igt@i915_pm_lpsp@kms-lpsp@kms-lpsp-dp:
    - shard-apl:          NOTRUN -> [SKIP][28] ([fdo#109271] / [i915#1937])
   [28]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-apl6/igt@i915_pm_lpsp@kms-lpsp@kms-lpsp-dp.html

  * igt@i915_pm_rpm@gem-execbuf-stress-pc8:
    - shard-tglb:         NOTRUN -> [SKIP][29] ([fdo#109506] / [i915#2411])
   [29]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-tglb3/igt@i915_pm_rpm@gem-execbuf-stress-pc8.html

  * igt@i915_selftest@live@gt_lrc:
    - shard-tglb:         NOTRUN -> [DMESG-FAIL][30] ([i915#2373])
   [30]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-tglb3/igt@i915_selftest@live@gt_lrc.html

  * igt@i915_selftest@live@gt_pm:
    - shard-tglb:         NOTRUN -> [DMESG-FAIL][31] ([i915#1759] / [i915#2291])
   [31]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-tglb3/igt@i915_selftest@live@gt_pm.html

  * igt@i915_suspend@forcewake:
    - shard-apl:          NOTRUN -> [DMESG-WARN][32] ([i915#180]) +1 similar issue
   [32]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-apl6/igt@i915_suspend@forcewake.html

  * igt@kms_async_flips@crc:
    - shard-skl:          NOTRUN -> [FAIL][33] ([i915#4224])
   [33]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-skl7/igt@kms_async_flips@crc.html

  * igt@kms_big_fb@linear-16bpp-rotate-90:
    - shard-apl:          NOTRUN -> [SKIP][34] ([fdo#109271]) +195 similar issues
   [34]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-apl6/igt@kms_big_fb@linear-16bpp-rotate-90.html

  * igt@kms_big_fb@linear-32bpp-rotate-270:
    - shard-tglb:         NOTRUN -> [SKIP][35] ([fdo#111614])
   [35]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-tglb8/igt@kms_big_fb@linear-32bpp-rotate-270.html

  * igt@kms_big_fb@x-tiled-max-hw-stride-64bpp-rotate-180-async-flip:
    - shard-skl:          NOTRUN -> [FAIL][36] ([i915#3722]) +1 similar issue
   [36]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-skl8/igt@kms_big_fb@x-tiled-max-hw-stride-64bpp-rotate-180-async-flip.html

  * igt@kms_big_fb@yf-tiled-8bpp-rotate-90:
    - shard-tglb:         NOTRUN -> [SKIP][37] ([fdo#111615]) +1 similar issue
   [37]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-tglb3/igt@kms_big_fb@yf-tiled-8bpp-rotate-90.html

  * igt@kms_big_fb@yf-tiled-max-hw-stride-32bpp-rotate-0-hflip:
    - shard-apl:          NOTRUN -> [SKIP][38] ([fdo#109271] / [i915#3777]) +2 similar issues
   [38]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-apl3/igt@kms_big_fb@yf-tiled-max-hw-stride-32bpp-rotate-0-hflip.html

  * igt@kms_big_fb@yf-tiled-max-hw-stride-32bpp-rotate-180-hflip:
    - shard-kbl:          NOTRUN -> [SKIP][39] ([fdo#109271] / [i915#3777])
   [39]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-kbl3/igt@kms_big_fb@yf-tiled-max-hw-stride-32bpp-rotate-180-hflip.html
    - shard-skl:          NOTRUN -> [SKIP][40] ([fdo#109271] / [i915#3777])
   [40]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-skl8/igt@kms_big_fb@yf-tiled-max-hw-stride-32bpp-rotate-180-hflip.html

  * igt@kms_ccs@pipe-a-ccs-on-another-bo-yf_tiled_ccs:
    - shard-tglb:         NOTRUN -> [SKIP][41] ([i915#3689]) +3 similar issues
   [41]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-tglb3/igt@kms_ccs@pipe-a-ccs-on-another-bo-yf_tiled_ccs.html

  * igt@kms_ccs@pipe-b-ccs-on-another-bo-y_tiled_gen12_mc_ccs:
    - shard-skl:          NOTRUN -> [SKIP][42] ([fdo#109271] / [i915#3886]) +5 similar issues
   [42]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-skl9/igt@kms_ccs@pipe-b-ccs-on-another-bo-y_tiled_gen12_mc_ccs.html

  * igt@kms_ccs@pipe-b-random-ccs-data-y_tiled_gen12_mc_ccs:
    - shard-kbl:          NOTRUN -> [SKIP][43] ([fdo#109271] / [i915#3886]) +5 similar issues
   [43]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-kbl7/igt@kms_ccs@pipe-b-random-ccs-data-y_tiled_gen12_mc_ccs.html

  * igt@kms_ccs@pipe-c-ccs-on-another-bo-y_tiled_gen12_rc_ccs_cc:
    - shard-apl:          NOTRUN -> [SKIP][44] ([fdo#109271] / [i915#3886]) +14 similar issues
   [44]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-apl3/igt@kms_ccs@pipe-c-ccs-on-another-bo-y_tiled_gen12_rc_ccs_cc.html

  * igt@kms_ccs@pipe-c-missing-ccs-buffer-y_tiled_gen12_mc_ccs:
    - shard-tglb:         NOTRUN -> [SKIP][45] ([i915#3689] / [i915#3886]) +1 similar issue
   [45]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-tglb8/igt@kms_ccs@pipe-c-missing-ccs-buffer-y_tiled_gen12_mc_ccs.html

  * igt@kms_chamelium@vga-hpd-after-suspend:
    - shard-apl:          NOTRUN -> [SKIP][46] ([fdo#109271] / [fdo#111827]) +18 similar issues
   [46]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-apl3/igt@kms_chamelium@vga-hpd-after-suspend.html

  * igt@kms_color_chamelium@pipe-a-ctm-blue-to-red:
    - shard-kbl:          NOTRUN -> [SKIP][47] ([fdo#109271] / [fdo#111827]) +5 similar issues
   [47]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-kbl3/igt@kms_color_chamelium@pipe-a-ctm-blue-to-red.html

  * igt@kms_color_chamelium@pipe-b-ctm-max:
    - shard-skl:          NOTRUN -> [SKIP][48] ([fdo#109271] / [fdo#111827]) +6 similar issues
   [48]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-skl3/igt@kms_color_chamelium@pipe-b-ctm-max.html

  * igt@kms_color_chamelium@pipe-c-ctm-red-to-blue:
    - shard-tglb:         NOTRUN -> [SKIP][49] ([fdo#109284] / [fdo#111827]) +3 similar issues
   [49]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-tglb3/igt@kms_color_chamelium@pipe-c-ctm-red-to-blue.html

  * igt@kms_content_protection@lic:
    - shard-apl:          NOTRUN -> [TIMEOUT][50] ([i915#1319]) +1 similar issue
   [50]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-apl6/igt@kms_content_protection@lic.html

  * igt@kms_content_protection@mei_interface:
    - shard-tglb:         NOTRUN -> [SKIP][51] ([fdo#111828])
   [51]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-tglb3/igt@kms_content_protection@mei_interface.html

  * igt@kms_cursor_crc@pipe-a-cursor-512x170-random:
    - shard-tglb:         NOTRUN -> [SKIP][52] ([fdo#109279] / [i915#3359]) +1 similar issue
   [52]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-tglb8/igt@kms_cursor_crc@pipe-a-cursor-512x170-random.html

  * igt@kms_cursor_crc@pipe-a-cursor-suspend:
    - shard-skl:          NOTRUN -> [INCOMPLETE][53] ([i915#2828] / [i915#300])
   [53]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-skl9/igt@kms_cursor_crc@pipe-a-cursor-suspend.html

  * igt@kms_cursor_crc@pipe-c-cursor-32x10-rapid-movement:
    - shard-tglb:         NOTRUN -> [SKIP][54] ([i915#3359]) +3 similar issues
   [54]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-tglb3/igt@kms_cursor_crc@pipe-c-cursor-32x10-rapid-movement.html

  * igt@kms_cursor_crc@pipe-c-cursor-32x32-onscreen:
    - shard-tglb:         NOTRUN -> [SKIP][55] ([i915#3319])
   [55]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-tglb3/igt@kms_cursor_crc@pipe-c-cursor-32x32-onscreen.html

  * igt@kms_cursor_crc@pipe-d-cursor-suspend:
    - shard-kbl:          NOTRUN -> [SKIP][56] ([fdo#109271]) +79 similar issues
   [56]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-kbl7/igt@kms_cursor_crc@pipe-d-cursor-suspend.html
    - shard-tglb:         [PASS][57] -> [INCOMPLETE][58] ([i915#4211])
   [57]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10660/shard-tglb2/igt@kms_cursor_crc@pipe-d-cursor-suspend.html
   [58]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-tglb7/igt@kms_cursor_crc@pipe-d-cursor-suspend.html

  * igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions:
    - shard-skl:          [PASS][59] -> [FAIL][60] ([i915#2346])
   [59]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10660/shard-skl1/igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions.html
   [60]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-skl2/igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions.html

  * igt@kms_cursor_legacy@pipe-d-single-bo:
    - shard-kbl:          NOTRUN -> [SKIP][61] ([fdo#109271] / [i915#533]) +1 similar issue
   [61]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-kbl7/igt@kms_cursor_legacy@pipe-d-single-bo.html

  * igt@kms_flip@2x-plain-flip-ts-check:
    - shard-tglb:         NOTRUN -> [SKIP][62] ([fdo#111825]) +12 similar issues
   [62]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-tglb8/igt@kms_flip@2x-plain-flip-ts-check.html

  * igt@kms_flip@flip-vs-expired-vblank-interruptible@b-edp1:
    - shard-skl:          [PASS][63] -> [FAIL][64] ([i915#79])
   [63]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10660/shard-skl3/igt@kms_flip@flip-vs-expired-vblank-interruptible@b-edp1.html
   [64]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-skl7/igt@kms_flip@flip-vs-expired-vblank-interruptible@b-edp1.html

  * igt@kms_flip@flip-vs-suspend-interruptible@a-dp1:
    - shard-apl:          [PASS][65] -> [DMESG-WARN][66] ([i915#180])
   [65]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10660/shard-apl3/igt@kms_flip@flip-vs-suspend-interruptible@a-dp1.html
   [66]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-apl2/igt@kms_flip@flip-vs-suspend-interruptible@a-dp1.html

  * igt@kms_flip_scaled_crc@flip-32bpp-ytile-to-64bpp-ytile:
    - shard-iclb:         [PASS][67] -> [SKIP][68] ([i915#3701])
   [67]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10660/shard-iclb4/igt@kms_flip_scaled_crc@flip-32bpp-ytile-to-64bpp-ytile.html
   [68]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-iclb2/igt@kms_flip_scaled_crc@flip-32bpp-ytile-to-64bpp-ytile.html

  * igt@kms_flip_scaled_crc@flip-32bpp-ytileccs-to-64bpp-ytile:
    - shard-tglb:         NOTRUN -> [SKIP][69] ([i915#2587])
   [69]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-tglb8/igt@kms_flip_scaled_crc@flip-32bpp-ytileccs-to-64bpp-ytile.html

  * igt@kms_flip_scaled_crc@flip-64bpp-ytile-to-32bpp-ytilercccs:
    - shard-apl:          NOTRUN -> [SKIP][70] ([fdo#109271] / [i915#2672])
   [70]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-apl2/igt@kms_flip_scaled_crc@flip-64bpp-ytile-to-32bpp-ytilercccs.html

  * igt@kms_frontbuffer_tracking@fbc-suspend:
    - shard-kbl:          [PASS][71] -> [DMESG-WARN][72] ([i915#180]) +6 similar issues
   [71]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10660/shard-kbl4/igt@kms_frontbuffer_tracking@fbc-suspend.html
   [72]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-kbl1/igt@kms_frontbuffer_tracking@fbc-suspend.html

  * igt@kms_pipe_crc_basic@compare-crc-sanitycheck-pipe-d:
    - shard-apl:          NOTRUN -> [SKIP][73] ([fdo#109271] / [i915#533]) +1 similar issue
   [73]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-apl6/igt@kms_pipe_crc_basic@compare-crc-sanitycheck-pipe-d.html

  * igt@kms_pipe_crc_basic@suspend-read-crc-pipe-d:
    - shard-skl:          NOTRUN -> [SKIP][74] ([fdo#109271] / [i915#533])
   [74]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-skl8/igt@kms_pipe_crc_basic@suspend-read-crc-pipe-d.html

  * igt@kms_plane_alpha_blend@pipe-a-alpha-opaque-fb:
    - shard-apl:          NOTRUN -> [FAIL][75] ([fdo#108145] / [i915#265]) +2 similar issues
   [75]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-apl1/igt@kms_plane_alpha_blend@pipe-a-alpha-opaque-fb.html

  * igt@kms_plane_alpha_blend@pipe-a-coverage-7efc:
    - shard-skl:          [PASS][76] -> [FAIL][77] ([fdo#108145] / [i915#265])
   [76]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10660/shard-skl8/igt@kms_plane_alpha_blend@pipe-a-coverage-7efc.html
   [77]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-skl4/igt@kms_plane_alpha_blend@pipe-a-coverage-7efc.html

  * igt@kms_plane_alpha_blend@pipe-b-constant-alpha-max:
    - shard-kbl:          NOTRUN -> [FAIL][78] ([fdo#108145] / [i915#265])
   [78]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-kbl7/igt@kms_plane_alpha_blend@pipe-b-constant-alpha-max.html

  * igt@kms_plane_lowres@pipe-b-tiling-x:
    - shard-tglb:         NOTRUN -> [SKIP][79] ([i915#3536]) +1 similar issue
   [79]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-tglb3/igt@kms_plane_lowres@pipe-b-tiling-x.html

  * igt@kms_psr2_sf@overlay-plane-update-sf-dmg-area-4:
    - shard-kbl:          NOTRUN -> [SKIP][80] ([fdo#109271] / [i915#658]) +1 similar issue
   [80]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-kbl3/igt@kms_psr2_sf@overlay-plane-update-sf-dmg-area-4.html

  * igt@kms_psr2_sf@overlay-primary-update-sf-dmg-area-4:
    - shard-apl:          NOTRUN -> [SKIP][81] ([fdo#109271] / [i915#658]) +5 similar issues
   [81]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-apl1/igt@kms_psr2_sf@overlay-primary-update-sf-dmg-area-4.html

  * igt@kms_psr2_sf@primary-plane-update-sf-dmg-area-1:
    - shard-skl:          NOTRUN -> [SKIP][82] ([fdo#109271] / [i915#658]) +1 similar issue
   [82]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-skl1/igt@kms_psr2_sf@primary-plane-update-sf-dmg-area-1.html

  * igt@kms_psr@psr2_primary_mmap_gtt:
    - shard-tglb:         NOTRUN -> [FAIL][83] ([i915#132] / [i915#3467]) +1 similar issue
   [83]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-tglb8/igt@kms_psr@psr2_primary_mmap_gtt.html

  * igt@kms_psr@psr2_sprite_blt:
    - shard-iclb:         [PASS][84] -> [SKIP][85] ([fdo#109441]) +1 similar issue
   [84]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10660/shard-iclb2/igt@kms_psr@psr2_sprite_blt.html
   [85]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-iclb7/igt@kms_psr@psr2_sprite_blt.html

  * igt@kms_sysfs_edid_timing:
    - shard-kbl:          NOTRUN -> [FAIL][86] ([IGT#2])
   [86]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-kbl3/igt@kms_sysfs_edid_timing.html
    - shard-skl:          NOTRUN -> [FAIL][87] ([IGT#2])
   [87]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-skl8/igt@kms_sysfs_edid_timing.html

  * igt@kms_vblank@pipe-d-ts-continuation-suspend:
    - shard-tglb:         [PASS][88] -> [INCOMPLETE][89] ([i915#3896])
   [88]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10660/shard-tglb1/igt@kms_vblank@pipe-d-ts-continuation-suspend.html
   [89]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-tglb7/igt@kms_vblank@pipe-d-ts-continuation-suspend.html

  * igt@kms_writeback@writeback-check-output:
    - shard-tglb:         NOTRUN -> [SKIP][90] ([i915#2437]) +1 similar issue
   [90]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-tglb3/igt@kms_writeback@writeback-check-output.html

  * igt@prime_nv_api@i915_self_import_to_different_fd:
    - shard-tglb:         NOTRUN -> [SKIP][91] ([fdo#109291]) +1 similar issue
   [91]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-tglb8/igt@prime_nv_api@i915_self_import_to_different_fd.html

  * igt@syncobj_basic@bad-destroy:
    - shard-skl:          [PASS][92] -> [DMESG-WARN][93] ([i915#1982]) +1 similar issue
   [92]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10660/shard-skl5/igt@syncobj_basic@bad-destroy.html
   [93]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-skl5/igt@syncobj_basic@bad-destroy.html

  * igt@sysfs_clients@recycle-many:
    - shard-apl:          NOTRUN -> [SKIP][94] ([fdo#109271] / [i915#2994]) +3 similar issues
   [94]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-apl6/igt@sysfs_clients@recycle-many.html

  * igt@sysfs_clients@sema-50:
    - shard-kbl:          NOTRUN -> [SKIP][95] ([fdo#109271] / [i915#2994])
   [95]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-kbl7/igt@sysfs_clients@sema-50.html

  * igt@sysfs_clients@split-25:
    - shard-tglb:         NOTRUN -> [SKIP][96] ([i915#2994])
   [96]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-tglb3/igt@sysfs_clients@split-25.html

  
#### Possible fixes ####

  * igt@gem_exec_fair@basic-none-share@rcs0:
    - shard-iclb:         [FAIL][97] ([i915#2842]) -> [PASS][98]
   [97]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10660/shard-iclb2/igt@gem_exec_fair@basic-none-share@rcs0.html
   [98]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-iclb7/igt@gem_exec_fair@basic-none-share@rcs0.html

  * igt@gem_exec_fair@basic-pace-solo@rcs0:
    - shard-glk:          [FAIL][99] ([i915#2842]) -> [PASS][100]
   [99]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10660/shard-glk8/igt@gem_exec_fair@basic-pace-solo@rcs0.html
   [100]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-glk9/igt@gem_exec_fair@basic-pace-solo@rcs0.html

  * igt@gem_exec_fair@basic-pace@rcs0:
    - shard-tglb:         [FAIL][101] ([i915#2842]) -> [PASS][102]
   [101]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10660/shard-tglb5/igt@gem_exec_fair@basic-pace@rcs0.html
   [102]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-tglb6/igt@gem_exec_fair@basic-pace@rcs0.html

  * igt@gem_exec_fair@basic-pace@vcs1:
    - shard-kbl:          [FAIL][103] ([i915#2842]) -> [PASS][104]
   [103]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10660/shard-kbl6/igt@gem_exec_fair@basic-pace@vcs1.html
   [104]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-kbl2/igt@gem_exec_fair@basic-pace@vcs1.html

  * igt@gem_exec_params@dr1-dirt:
    - shard-skl:          [DMESG-WARN][105] ([i915#1982]) -> [PASS][106]
   [105]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10660/shard-skl4/igt@gem_exec_params@dr1-dirt.html
   [106]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-skl5/igt@gem_exec_params@dr1-dirt.html

  * igt@gem_ppgtt@flink-and-close-vma-leak:
    - shard-glk:          [FAIL][107] ([i915#644]) -> [PASS][108]
   [107]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10660/shard-glk6/igt@gem_ppgtt@flink-and-close-vma-leak.html
   [108]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-glk5/igt@gem_ppgtt@flink-and-close-vma-leak.html

  * igt@gem_softpin@noreloc-s3:
    - shard-kbl:          [DMESG-WARN][109] ([i915#180]) -> [PASS][110] +1 similar issue
   [109]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10660/shard-kbl1/igt@gem_softpin@noreloc-s3.html
   [110]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-kbl7/igt@gem_softpin@noreloc-s3.html

  * igt@gem_workarounds@suspend-resume-context:
    - shard-skl:          [INCOMPLETE][111] ([i915#198] / [i915#4173]) -> [PASS][112]
   [111]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10660/shard-skl2/igt@gem_workarounds@suspend-resume-context.html
   [112]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-skl8/igt@gem_workarounds@suspend-resume-context.html

  * igt@gen9_exec_parse@allowed-single:
    - shard-skl:          [DMESG-WARN][113] ([i915#1436] / [i915#716]) -> [PASS][114]
   [113]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10660/shard-skl9/igt@gen9_exec_parse@allowed-single.html
   [114]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-skl1/igt@gen9_exec_parse@allowed-single.html

  * igt@i915_pm_dc@dc6-dpms:
    - shard-iclb:         [FAIL][115] ([i915#454]) -> [PASS][116]
   [115]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10660/shard-iclb3/igt@i915_pm_dc@dc6-dpms.html
   [116]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-iclb4/igt@i915_pm_dc@dc6-dpms.html

  * igt@kms_big_fb@x-tiled-32bpp-rotate-0:
    - shard-glk:          [DMESG-WARN][117] ([i915#118] / [i915#95]) -> [PASS][118]
   [117]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10660/shard-glk4/igt@kms_big_fb@x-tiled-32bpp-rotate-0.html
   [118]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-glk7/igt@kms_big_fb@x-tiled-32bpp-rotate-0.html

  * igt@kms_flip@plain-flip-fb-recreate-interruptible@a-edp1:
    - shard-skl:          [FAIL][119] ([i915#2122]) -> [PASS][120]
   [119]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10660/shard-skl6/igt@kms_flip@plain-flip-fb-recreate-interruptible@a-edp1.html
   [120]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-skl1/igt@kms_flip@plain-flip-fb-recreate-interruptible@a-edp1.html

  * igt@kms_frontbuffer_tracking@psr-suspend:
    - shard-tglb:         [INCOMPLETE][121] ([i915#2411] / [i915#456]) -> [PASS][122] +1 similar issue
   [121]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10660/shard-tglb7/igt@kms_frontbuffer_tracking@psr-suspend.html
   [122]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-tglb3/igt@kms_frontbuffer_tracking@psr-suspend.html

  * igt@kms_hdr@bpc-switch:
    - shard-skl:          [FAIL][123] ([i915#1188]) -> [PASS][124]
   [123]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10660/shard-skl1/igt@kms_hdr@bpc-switch.html
   [124]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-skl2/igt@kms_hdr@bpc-switch.html

  * igt@kms_plane@plane-panning-bottom-right-suspend@pipe-a-planes:
    - shard-apl:          [DMESG-WARN][125] ([i915#180]) -> [PASS][126]
   [125]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10660/shard-apl6/igt@kms_plane@plane-panning-bottom-right-suspend@pipe-a-planes.html
   [126]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-apl2/igt@kms_plane@plane-panning-bottom-right-suspend@pipe-a-planes.html

  * igt@kms_plane_alpha_blend@pipe-b-constant-alpha-min:
    - shard-skl:          [FAIL][127] ([fdo#108145] / [i915#265]) -> [PASS][128]
   [127]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10660/shard-skl10/igt@kms_plane_alpha_blend@pipe-b-constant-alpha-min.html
   [128]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-skl10/igt@kms_plane_alpha_blend@pipe-b-constant-alpha-min.html

  * igt@kms_psr@psr2_cursor_mmap_cpu:
    - shard-iclb:         [SKIP][129] ([fdo#109441]) -> [PASS][130] +2 similar issues
   [129]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10660/shard-iclb4/igt@kms_psr@psr2_cursor_mmap_cpu.html
   [130]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-iclb2/igt@kms_psr@psr2_cursor_mmap_cpu.html

  * igt@perf@polling-parameterized:
    - shard-skl:          [FAIL][131] ([i915#1542]) -> [PASS][132]
   [131]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10660/shard-skl3/igt@perf@polling-parameterized.html
   [132]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-skl8/igt@perf@polling-parameterized.html

  
#### Warnings ####

  * igt@kms_psr2_sf@primary-plane-update-sf-dmg-area-2:
    - shard-iclb:         [SKIP][133] ([i915#658]) -> [SKIP][134] ([i915#2920]) +1 similar issue
   [133]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10660/shard-iclb4/igt@kms_psr2_sf@primary-plane-update-sf-dmg-area-2.html
   [134]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-iclb2/igt@kms_psr2_sf@primary-plane-update-sf-dmg-area-2.html

  * igt@kms_psr2_sf@primary-plane-update-sf-dmg-area-4:
    - shard-iclb:         [SKIP][135] ([i915#2920]) -> [SKIP][136] ([i915#658]) +2 similar issues
   [135]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10660/shard-iclb2/igt@kms_psr2_sf@primary-plane-update-sf-dmg-area-4.html
   [136]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-iclb7/igt@kms_psr2_sf@primary-plane-update-sf-dmg-area-4.html

  * igt@runner@aborted:
    - shard-kbl:          ([FAIL][137], [FAIL][138], [FAIL][139], [FAIL][140], [FAIL][141]) ([i915#180] / [i915#1814] / [i915#3002] / [i915#3363]) -> ([FAIL][142], [FAIL][143], [FAIL][144], [FAIL][145], [FAIL][146], [FAIL][147], [FAIL][148], [FAIL][149]) ([fdo#109271] / [i915#180] / [i915#1814] / [i915#3002] / [i915#3363] / [i915#602])
   [137]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10660/shard-kbl1/igt@runner@aborted.html
   [138]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10660/shard-kbl1/igt@runner@aborted.html
   [139]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10660/shard-kbl4/igt@runner@aborted.html
   [140]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10660/shard-kbl4/igt@runner@aborted.html
   [141]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DR

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/index.html

[-- Attachment #2: Type: text/html, Size: 33548 bytes --]

^ permalink raw reply	[flat|nested] 72+ messages in thread

* Re: [Intel-gfx]  ✗ Fi.CI.IGT: failure for drm/i915/tc: Fix TypeC connect/disconnect sequences (rev8)
  2021-09-29 21:16   ` Imre Deak
@ 2021-09-29 22:23     ` Vudum, Lakshminarayana
  0 siblings, 0 replies; 72+ messages in thread
From: Vudum, Lakshminarayana @ 2021-09-29 22:23 UTC (permalink / raw)
  To: Deak, Imre, intel-gfx, Souza, Jose

I have addressed the regressions and I filed below issues
https://gitlab.freedesktop.org/drm/intel/-/issues/4225
igt@gem_eio@reset-stress - fail - Failed assertion: count > 2

https://gitlab.freedesktop.org/drm/intel/-/issues/4224
igt@kms_async_flips@crc - fail - Failed assertion: !mismatch || igt_skip_crc_compare

Lakshmi,

-----Original Message-----
From: Deak, Imre <imre.deak@intel.com> 
Sent: Wednesday, September 29, 2021 2:17 PM
To: intel-gfx@lists.freedesktop.org; Souza, Jose <jose.souza@intel.com>; Vudum, Lakshminarayana <lakshminarayana.vudum@intel.com>
Subject: Re: ✗ Fi.CI.IGT: failure for drm/i915/tc: Fix TypeC connect/disconnect sequences (rev8)

On Wed, Sep 29, 2021 at 04:58:46PM +0000, Patchwork wrote:
> == Series Details ==
> 
> Series: drm/i915/tc: Fix TypeC connect/disconnect sequences (rev8)
> URL   : https://patchwork.freedesktop.org/series/94878/
> State : failure
> 
> == Summary ==
> 
> CI Bug Log - changes from CI_DRM_10660_full -> Patchwork_21189_full 
> ====================================================
> 
> Summary
> -------
> 
>   **FAILURE**
> 
>   Serious unknown changes coming with Patchwork_21189_full absolutely need to be
>   verified manually.
>   
>   If you think the reported changes have nothing to do with the changes
>   introduced in Patchwork_21189_full, please notify your bug team to allow them
>   to document this new failure mode, which will reduce false positives in CI.
> 
> Possible new issues
> -------------------
> 
>   Here are the unknown changes that may have been introduced in Patchwork_21189_full:
> 
> ### IGT changes ###
> 
> #### Possible regressions ####
> 
>   * igt@fbdev@unaligned-read:
>     - shard-glk:          [PASS][1] -> [FAIL][2]
>    [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10660/shard-glk3/igt@fbdev@unaligned-read.html
>    [2]: 
> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-glk4/ig
> t@fbdev@unaligned-read.html
> 
>   * igt@gem_eio@reset-stress:
>     - shard-skl:          [PASS][3] -> [FAIL][4]
>    [3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10660/shard-skl1/igt@gem_eio@reset-stress.html
>    [4]: 
> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-skl2/ig
> t@gem_eio@reset-stress.html
> 
>   * igt@kms_async_flips@crc:
>     - shard-skl:          NOTRUN -> [FAIL][5]
>    [5]: 
> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-skl7/ig
> t@kms_async_flips@crc.html

The above platforms don't have any TypeC ports, so the failures are unrelated.

Thanks for the review, I pushed the patchset to drm-intel-next.

> Known issues
> ------------
> 
>   Here are the changes found in Patchwork_21189_full that come from known issues:
> 
> ### IGT changes ###
> 
> #### Issues hit ####
> 
>   * igt@gem_create@create-massive:
>     - shard-apl:          NOTRUN -> [DMESG-WARN][6] ([i915#3002])
>    [6]: 
> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-apl6/ig
> t@gem_create@create-massive.html
> 
>   * igt@gem_ctx_sseu@mmap-args:
>     - shard-tglb:         NOTRUN -> [SKIP][7] ([i915#280])
>    [7]: 
> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-tglb2/i
> gt@gem_ctx_sseu@mmap-args.html
> 
>   * igt@gem_eio@unwedge-stress:
>     - shard-iclb:         [PASS][8] -> [TIMEOUT][9] ([i915#2369] / [i915#2481] / [i915#3070])
>    [8]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10660/shard-iclb7/igt@gem_eio@unwedge-stress.html
>    [9]: 
> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-iclb3/i
> gt@gem_eio@unwedge-stress.html
> 
>   * igt@gem_exec_fair@basic-deadline:
>     - shard-glk:          [PASS][10] -> [FAIL][11] ([i915#2846])
>    [10]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10660/shard-glk8/igt@gem_exec_fair@basic-deadline.html
>    [11]: 
> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-glk1/ig
> t@gem_exec_fair@basic-deadline.html
> 
>   * igt@gem_exec_fair@basic-flow@rcs0:
>     - shard-skl:          NOTRUN -> [SKIP][12] ([fdo#109271]) +106 similar issues
>    [12]: 
> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-skl1/ig
> t@gem_exec_fair@basic-flow@rcs0.html
> 
>   * igt@gem_exec_fair@basic-none-share@rcs0:
>     - shard-tglb:         [PASS][13] -> [FAIL][14] ([i915#2842]) +1 similar issue
>    [13]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10660/shard-tglb1/igt@gem_exec_fair@basic-none-share@rcs0.html
>    [14]: 
> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-tglb6/i
> gt@gem_exec_fair@basic-none-share@rcs0.html
> 
>   * igt@gem_exec_fair@basic-none-vip@rcs0:
>     - shard-kbl:          [PASS][15] -> [FAIL][16] ([i915#2842])
>    [15]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10660/shard-kbl2/igt@gem_exec_fair@basic-none-vip@rcs0.html
>    [16]: 
> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-kbl2/ig
> t@gem_exec_fair@basic-none-vip@rcs0.html
> 
>   * igt@gem_exec_fair@basic-none@vcs1:
>     - shard-iclb:         NOTRUN -> [FAIL][17] ([i915#2842])
>    [17]: 
> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-iclb4/i
> gt@gem_exec_fair@basic-none@vcs1.html
> 
>   * igt@gem_exec_fair@basic-pace@rcs0:
>     - shard-iclb:         [PASS][18] -> [FAIL][19] ([i915#2842])
>    [18]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10660/shard-iclb1/igt@gem_exec_fair@basic-pace@rcs0.html
>    [19]: 
> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-iclb7/i
> gt@gem_exec_fair@basic-pace@rcs0.html
> 
>   * igt@gem_exec_gttfill@basic:
>     - shard-glk:          [PASS][20] -> [DMESG-WARN][21] ([i915#118] / [i915#95]) +1 similar issue
>    [20]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10660/shard-glk1/igt@gem_exec_gttfill@basic.html
>    [21]: 
> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-glk4/ig
> t@gem_exec_gttfill@basic.html
> 
>   * igt@gem_exec_params@no-blt:
>     - shard-tglb:         NOTRUN -> [SKIP][22] ([fdo#109283])
>    [22]: 
> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-tglb3/i
> gt@gem_exec_params@no-blt.html
> 
>   * igt@gem_exec_params@secure-non-master:
>     - shard-tglb:         NOTRUN -> [SKIP][23] ([fdo#112283])
>    [23]: 
> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-tglb3/i
> gt@gem_exec_params@secure-non-master.html
> 
>   * igt@gem_ppgtt@flink-and-close-vma-leak:
>     - shard-skl:          [PASS][24] -> [FAIL][25] ([i915#644])
>    [24]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10660/shard-skl2/igt@gem_ppgtt@flink-and-close-vma-leak.html
>    [25]: 
> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-skl3/ig
> t@gem_ppgtt@flink-and-close-vma-leak.html
> 
>   * igt@gen3_render_tiledy_blits:
>     - shard-tglb:         NOTRUN -> [SKIP][26] ([fdo#109289]) +2 similar issues
>    [26]: 
> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-tglb8/i
> gt@gen3_render_tiledy_blits.html
> 
>   * igt@gen9_exec_parse@unaligned-jump:
>     - shard-tglb:         NOTRUN -> [SKIP][27] ([i915#2856])
>    [27]: 
> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-tglb3/i
> gt@gen9_exec_parse@unaligned-jump.html
> 
>   * igt@i915_pm_lpsp@kms-lpsp@kms-lpsp-dp:
>     - shard-apl:          NOTRUN -> [SKIP][28] ([fdo#109271] / [i915#1937])
>    [28]: 
> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-apl6/ig
> t@i915_pm_lpsp@kms-lpsp@kms-lpsp-dp.html
> 
>   * igt@i915_pm_rpm@gem-execbuf-stress-pc8:
>     - shard-tglb:         NOTRUN -> [SKIP][29] ([fdo#109506] / [i915#2411])
>    [29]: 
> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-tglb3/i
> gt@i915_pm_rpm@gem-execbuf-stress-pc8.html
> 
>   * igt@i915_selftest@live@gt_lrc:
>     - shard-tglb:         NOTRUN -> [DMESG-FAIL][30] ([i915#2373])
>    [30]: 
> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-tglb3/i
> gt@i915_selftest@live@gt_lrc.html
> 
>   * igt@i915_selftest@live@gt_pm:
>     - shard-tglb:         NOTRUN -> [DMESG-FAIL][31] ([i915#1759] / [i915#2291])
>    [31]: 
> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-tglb3/i
> gt@i915_selftest@live@gt_pm.html
> 
>   * igt@i915_suspend@forcewake:
>     - shard-apl:          NOTRUN -> [DMESG-WARN][32] ([i915#180]) +1 similar issue
>    [32]: 
> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-apl6/ig
> t@i915_suspend@forcewake.html
> 
>   * igt@kms_big_fb@linear-16bpp-rotate-90:
>     - shard-apl:          NOTRUN -> [SKIP][33] ([fdo#109271]) +195 similar issues
>    [33]: 
> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-apl6/ig
> t@kms_big_fb@linear-16bpp-rotate-90.html
> 
>   * igt@kms_big_fb@linear-32bpp-rotate-270:
>     - shard-tglb:         NOTRUN -> [SKIP][34] ([fdo#111614])
>    [34]: 
> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-tglb8/i
> gt@kms_big_fb@linear-32bpp-rotate-270.html
> 
>   * igt@kms_big_fb@x-tiled-max-hw-stride-64bpp-rotate-180-async-flip:
>     - shard-skl:          NOTRUN -> [FAIL][35] ([i915#3722]) +1 similar issue
>    [35]: 
> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-skl8/ig
> t@kms_big_fb@x-tiled-max-hw-stride-64bpp-rotate-180-async-flip.html
> 
>   * igt@kms_big_fb@yf-tiled-8bpp-rotate-90:
>     - shard-tglb:         NOTRUN -> [SKIP][36] ([fdo#111615]) +1 similar issue
>    [36]: 
> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-tglb3/i
> gt@kms_big_fb@yf-tiled-8bpp-rotate-90.html
> 
>   * igt@kms_big_fb@yf-tiled-max-hw-stride-32bpp-rotate-0-hflip:
>     - shard-apl:          NOTRUN -> [SKIP][37] ([fdo#109271] / [i915#3777]) +2 similar issues
>    [37]: 
> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-apl3/ig
> t@kms_big_fb@yf-tiled-max-hw-stride-32bpp-rotate-0-hflip.html
> 
>   * igt@kms_big_fb@yf-tiled-max-hw-stride-32bpp-rotate-180-hflip:
>     - shard-kbl:          NOTRUN -> [SKIP][38] ([fdo#109271] / [i915#3777])
>    [38]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-kbl3/igt@kms_big_fb@yf-tiled-max-hw-stride-32bpp-rotate-180-hflip.html
>     - shard-skl:          NOTRUN -> [SKIP][39] ([fdo#109271] / [i915#3777])
>    [39]: 
> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-skl8/ig
> t@kms_big_fb@yf-tiled-max-hw-stride-32bpp-rotate-180-hflip.html
> 
>   * igt@kms_ccs@pipe-a-ccs-on-another-bo-yf_tiled_ccs:
>     - shard-tglb:         NOTRUN -> [SKIP][40] ([i915#3689]) +3 similar issues
>    [40]: 
> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-tglb3/i
> gt@kms_ccs@pipe-a-ccs-on-another-bo-yf_tiled_ccs.html
> 
>   * igt@kms_ccs@pipe-b-ccs-on-another-bo-y_tiled_gen12_mc_ccs:
>     - shard-skl:          NOTRUN -> [SKIP][41] ([fdo#109271] / [i915#3886]) +5 similar issues
>    [41]: 
> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-skl9/ig
> t@kms_ccs@pipe-b-ccs-on-another-bo-y_tiled_gen12_mc_ccs.html
> 
>   * igt@kms_ccs@pipe-b-random-ccs-data-y_tiled_gen12_mc_ccs:
>     - shard-kbl:          NOTRUN -> [SKIP][42] ([fdo#109271] / [i915#3886]) +5 similar issues
>    [42]: 
> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-kbl7/ig
> t@kms_ccs@pipe-b-random-ccs-data-y_tiled_gen12_mc_ccs.html
> 
>   * igt@kms_ccs@pipe-c-ccs-on-another-bo-y_tiled_gen12_rc_ccs_cc:
>     - shard-apl:          NOTRUN -> [SKIP][43] ([fdo#109271] / [i915#3886]) +14 similar issues
>    [43]: 
> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-apl3/ig
> t@kms_ccs@pipe-c-ccs-on-another-bo-y_tiled_gen12_rc_ccs_cc.html
> 
>   * igt@kms_ccs@pipe-c-missing-ccs-buffer-y_tiled_gen12_mc_ccs:
>     - shard-tglb:         NOTRUN -> [SKIP][44] ([i915#3689] / [i915#3886]) +1 similar issue
>    [44]: 
> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-tglb8/i
> gt@kms_ccs@pipe-c-missing-ccs-buffer-y_tiled_gen12_mc_ccs.html
> 
>   * igt@kms_chamelium@vga-hpd-after-suspend:
>     - shard-apl:          NOTRUN -> [SKIP][45] ([fdo#109271] / [fdo#111827]) +18 similar issues
>    [45]: 
> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-apl3/ig
> t@kms_chamelium@vga-hpd-after-suspend.html
> 
>   * igt@kms_color_chamelium@pipe-a-ctm-blue-to-red:
>     - shard-kbl:          NOTRUN -> [SKIP][46] ([fdo#109271] / [fdo#111827]) +5 similar issues
>    [46]: 
> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-kbl3/ig
> t@kms_color_chamelium@pipe-a-ctm-blue-to-red.html
> 
>   * igt@kms_color_chamelium@pipe-b-ctm-max:
>     - shard-skl:          NOTRUN -> [SKIP][47] ([fdo#109271] / [fdo#111827]) +6 similar issues
>    [47]: 
> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-skl3/ig
> t@kms_color_chamelium@pipe-b-ctm-max.html
> 
>   * igt@kms_color_chamelium@pipe-c-ctm-red-to-blue:
>     - shard-tglb:         NOTRUN -> [SKIP][48] ([fdo#109284] / [fdo#111827]) +3 similar issues
>    [48]: 
> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-tglb3/i
> gt@kms_color_chamelium@pipe-c-ctm-red-to-blue.html
> 
>   * igt@kms_content_protection@lic:
>     - shard-apl:          NOTRUN -> [TIMEOUT][49] ([i915#1319]) +1 similar issue
>    [49]: 
> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-apl6/ig
> t@kms_content_protection@lic.html
> 
>   * igt@kms_content_protection@mei_interface:
>     - shard-tglb:         NOTRUN -> [SKIP][50] ([fdo#111828])
>    [50]: 
> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-tglb3/i
> gt@kms_content_protection@mei_interface.html
> 
>   * igt@kms_cursor_crc@pipe-a-cursor-512x170-random:
>     - shard-tglb:         NOTRUN -> [SKIP][51] ([fdo#109279] / [i915#3359]) +1 similar issue
>    [51]: 
> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-tglb8/i
> gt@kms_cursor_crc@pipe-a-cursor-512x170-random.html
> 
>   * igt@kms_cursor_crc@pipe-a-cursor-suspend:
>     - shard-skl:          NOTRUN -> [INCOMPLETE][52] ([i915#2828] / [i915#300])
>    [52]: 
> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-skl9/ig
> t@kms_cursor_crc@pipe-a-cursor-suspend.html
> 
>   * igt@kms_cursor_crc@pipe-c-cursor-32x10-rapid-movement:
>     - shard-tglb:         NOTRUN -> [SKIP][53] ([i915#3359]) +3 similar issues
>    [53]: 
> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-tglb3/i
> gt@kms_cursor_crc@pipe-c-cursor-32x10-rapid-movement.html
> 
>   * igt@kms_cursor_crc@pipe-c-cursor-32x32-onscreen:
>     - shard-tglb:         NOTRUN -> [SKIP][54] ([i915#3319])
>    [54]: 
> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-tglb3/i
> gt@kms_cursor_crc@pipe-c-cursor-32x32-onscreen.html
> 
>   * igt@kms_cursor_crc@pipe-d-cursor-suspend:
>     - shard-kbl:          NOTRUN -> [SKIP][55] ([fdo#109271]) +79 similar issues
>    [55]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-kbl7/igt@kms_cursor_crc@pipe-d-cursor-suspend.html
>     - shard-tglb:         [PASS][56] -> [INCOMPLETE][57] ([i915#4211])
>    [56]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10660/shard-tglb2/igt@kms_cursor_crc@pipe-d-cursor-suspend.html
>    [57]: 
> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-tglb7/i
> gt@kms_cursor_crc@pipe-d-cursor-suspend.html
> 
>   * igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions:
>     - shard-skl:          [PASS][58] -> [FAIL][59] ([i915#2346])
>    [58]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10660/shard-skl1/igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions.html
>    [59]: 
> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-skl2/ig
> t@kms_cursor_legacy@flip-vs-cursor-atomic-transitions.html
> 
>   * igt@kms_cursor_legacy@pipe-d-single-bo:
>     - shard-kbl:          NOTRUN -> [SKIP][60] ([fdo#109271] / [i915#533]) +1 similar issue
>    [60]: 
> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-kbl7/ig
> t@kms_cursor_legacy@pipe-d-single-bo.html
> 
>   * igt@kms_flip@2x-plain-flip-ts-check:
>     - shard-tglb:         NOTRUN -> [SKIP][61] ([fdo#111825]) +12 similar issues
>    [61]: 
> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-tglb8/i
> gt@kms_flip@2x-plain-flip-ts-check.html
> 
>   * igt@kms_flip@flip-vs-expired-vblank-interruptible@b-edp1:
>     - shard-skl:          [PASS][62] -> [FAIL][63] ([i915#79])
>    [62]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10660/shard-skl3/igt@kms_flip@flip-vs-expired-vblank-interruptible@b-edp1.html
>    [63]: 
> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-skl7/ig
> t@kms_flip@flip-vs-expired-vblank-interruptible@b-edp1.html
> 
>   * igt@kms_flip@flip-vs-suspend-interruptible@a-dp1:
>     - shard-apl:          [PASS][64] -> [DMESG-WARN][65] ([i915#180])
>    [64]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10660/shard-apl3/igt@kms_flip@flip-vs-suspend-interruptible@a-dp1.html
>    [65]: 
> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-apl2/ig
> t@kms_flip@flip-vs-suspend-interruptible@a-dp1.html
> 
>   * igt@kms_flip_scaled_crc@flip-32bpp-ytile-to-64bpp-ytile:
>     - shard-iclb:         [PASS][66] -> [SKIP][67] ([i915#3701])
>    [66]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10660/shard-iclb4/igt@kms_flip_scaled_crc@flip-32bpp-ytile-to-64bpp-ytile.html
>    [67]: 
> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-iclb2/i
> gt@kms_flip_scaled_crc@flip-32bpp-ytile-to-64bpp-ytile.html
> 
>   * igt@kms_flip_scaled_crc@flip-32bpp-ytileccs-to-64bpp-ytile:
>     - shard-tglb:         NOTRUN -> [SKIP][68] ([i915#2587])
>    [68]: 
> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-tglb8/i
> gt@kms_flip_scaled_crc@flip-32bpp-ytileccs-to-64bpp-ytile.html
> 
>   * igt@kms_flip_scaled_crc@flip-64bpp-ytile-to-32bpp-ytilercccs:
>     - shard-apl:          NOTRUN -> [SKIP][69] ([fdo#109271] / [i915#2672])
>    [69]: 
> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-apl2/ig
> t@kms_flip_scaled_crc@flip-64bpp-ytile-to-32bpp-ytilercccs.html
> 
>   * igt@kms_frontbuffer_tracking@fbc-suspend:
>     - shard-kbl:          [PASS][70] -> [DMESG-WARN][71] ([i915#180]) +6 similar issues
>    [70]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10660/shard-kbl4/igt@kms_frontbuffer_tracking@fbc-suspend.html
>    [71]: 
> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-kbl1/ig
> t@kms_frontbuffer_tracking@fbc-suspend.html
> 
>   * igt@kms_pipe_crc_basic@compare-crc-sanitycheck-pipe-d:
>     - shard-apl:          NOTRUN -> [SKIP][72] ([fdo#109271] / [i915#533]) +1 similar issue
>    [72]: 
> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-apl6/ig
> t@kms_pipe_crc_basic@compare-crc-sanitycheck-pipe-d.html
> 
>   * igt@kms_pipe_crc_basic@suspend-read-crc-pipe-d:
>     - shard-skl:          NOTRUN -> [SKIP][73] ([fdo#109271] / [i915#533])
>    [73]: 
> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-skl8/ig
> t@kms_pipe_crc_basic@suspend-read-crc-pipe-d.html
> 
>   * igt@kms_plane_alpha_blend@pipe-a-alpha-opaque-fb:
>     - shard-apl:          NOTRUN -> [FAIL][74] ([fdo#108145] / [i915#265]) +2 similar issues
>    [74]: 
> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-apl1/ig
> t@kms_plane_alpha_blend@pipe-a-alpha-opaque-fb.html
> 
>   * igt@kms_plane_alpha_blend@pipe-a-coverage-7efc:
>     - shard-skl:          [PASS][75] -> [FAIL][76] ([fdo#108145] / [i915#265])
>    [75]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10660/shard-skl8/igt@kms_plane_alpha_blend@pipe-a-coverage-7efc.html
>    [76]: 
> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-skl4/ig
> t@kms_plane_alpha_blend@pipe-a-coverage-7efc.html
> 
>   * igt@kms_plane_alpha_blend@pipe-b-constant-alpha-max:
>     - shard-kbl:          NOTRUN -> [FAIL][77] ([fdo#108145] / [i915#265])
>    [77]: 
> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-kbl7/ig
> t@kms_plane_alpha_blend@pipe-b-constant-alpha-max.html
> 
>   * igt@kms_plane_lowres@pipe-b-tiling-x:
>     - shard-tglb:         NOTRUN -> [SKIP][78] ([i915#3536]) +1 similar issue
>    [78]: 
> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-tglb3/i
> gt@kms_plane_lowres@pipe-b-tiling-x.html
> 
>   * igt@kms_psr2_sf@overlay-plane-update-sf-dmg-area-4:
>     - shard-kbl:          NOTRUN -> [SKIP][79] ([fdo#109271] / [i915#658]) +1 similar issue
>    [79]: 
> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-kbl3/ig
> t@kms_psr2_sf@overlay-plane-update-sf-dmg-area-4.html
> 
>   * igt@kms_psr2_sf@overlay-primary-update-sf-dmg-area-4:
>     - shard-apl:          NOTRUN -> [SKIP][80] ([fdo#109271] / [i915#658]) +5 similar issues
>    [80]: 
> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-apl1/ig
> t@kms_psr2_sf@overlay-primary-update-sf-dmg-area-4.html
> 
>   * igt@kms_psr2_sf@primary-plane-update-sf-dmg-area-1:
>     - shard-skl:          NOTRUN -> [SKIP][81] ([fdo#109271] / [i915#658]) +1 similar issue
>    [81]: 
> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-skl1/ig
> t@kms_psr2_sf@primary-plane-update-sf-dmg-area-1.html
> 
>   * igt@kms_psr@psr2_primary_mmap_gtt:
>     - shard-tglb:         NOTRUN -> [FAIL][82] ([i915#132] / [i915#3467]) +1 similar issue
>    [82]: 
> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-tglb8/i
> gt@kms_psr@psr2_primary_mmap_gtt.html
> 
>   * igt@kms_psr@psr2_sprite_blt:
>     - shard-iclb:         [PASS][83] -> [SKIP][84] ([fdo#109441]) +1 similar issue
>    [83]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10660/shard-iclb2/igt@kms_psr@psr2_sprite_blt.html
>    [84]: 
> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-iclb7/i
> gt@kms_psr@psr2_sprite_blt.html
> 
>   * igt@kms_sysfs_edid_timing:
>     - shard-kbl:          NOTRUN -> [FAIL][85] ([IGT#2])
>    [85]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-kbl3/igt@kms_sysfs_edid_timing.html
>     - shard-skl:          NOTRUN -> [FAIL][86] ([IGT#2])
>    [86]: 
> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-skl8/ig
> t@kms_sysfs_edid_timing.html
> 
>   * igt@kms_vblank@pipe-d-ts-continuation-suspend:
>     - shard-tglb:         [PASS][87] -> [INCOMPLETE][88] ([i915#3896])
>    [87]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10660/shard-tglb1/igt@kms_vblank@pipe-d-ts-continuation-suspend.html
>    [88]: 
> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-tglb7/i
> gt@kms_vblank@pipe-d-ts-continuation-suspend.html
> 
>   * igt@kms_writeback@writeback-check-output:
>     - shard-tglb:         NOTRUN -> [SKIP][89] ([i915#2437]) +1 similar issue
>    [89]: 
> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-tglb3/i
> gt@kms_writeback@writeback-check-output.html
> 
>   * igt@prime_nv_api@i915_self_import_to_different_fd:
>     - shard-tglb:         NOTRUN -> [SKIP][90] ([fdo#109291]) +1 similar issue
>    [90]: 
> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-tglb8/i
> gt@prime_nv_api@i915_self_import_to_different_fd.html
> 
>   * igt@syncobj_basic@bad-destroy:
>     - shard-skl:          [PASS][91] -> [DMESG-WARN][92] ([i915#1982]) +1 similar issue
>    [91]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10660/shard-skl5/igt@syncobj_basic@bad-destroy.html
>    [92]: 
> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-skl5/ig
> t@syncobj_basic@bad-destroy.html
> 
>   * igt@sysfs_clients@recycle-many:
>     - shard-apl:          NOTRUN -> [SKIP][93] ([fdo#109271] / [i915#2994]) +3 similar issues
>    [93]: 
> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-apl6/ig
> t@sysfs_clients@recycle-many.html
> 
>   * igt@sysfs_clients@sema-50:
>     - shard-kbl:          NOTRUN -> [SKIP][94] ([fdo#109271] / [i915#2994])
>    [94]: 
> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-kbl7/ig
> t@sysfs_clients@sema-50.html
> 
>   * igt@sysfs_clients@split-25:
>     - shard-tglb:         NOTRUN -> [SKIP][95] ([i915#2994])
>    [95]: 
> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-tglb3/i
> gt@sysfs_clients@split-25.html
> 
>   
> #### Possible fixes ####
> 
>   * igt@gem_exec_fair@basic-none-share@rcs0:
>     - shard-iclb:         [FAIL][96] ([i915#2842]) -> [PASS][97]
>    [96]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10660/shard-iclb2/igt@gem_exec_fair@basic-none-share@rcs0.html
>    [97]: 
> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-iclb7/i
> gt@gem_exec_fair@basic-none-share@rcs0.html
> 
>   * igt@gem_exec_fair@basic-pace-solo@rcs0:
>     - shard-glk:          [FAIL][98] ([i915#2842]) -> [PASS][99]
>    [98]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10660/shard-glk8/igt@gem_exec_fair@basic-pace-solo@rcs0.html
>    [99]: 
> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-glk9/ig
> t@gem_exec_fair@basic-pace-solo@rcs0.html
> 
>   * igt@gem_exec_fair@basic-pace@rcs0:
>     - shard-tglb:         [FAIL][100] ([i915#2842]) -> [PASS][101]
>    [100]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10660/shard-tglb5/igt@gem_exec_fair@basic-pace@rcs0.html
>    [101]: 
> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-tglb6/i
> gt@gem_exec_fair@basic-pace@rcs0.html
> 
>   * igt@gem_exec_fair@basic-pace@vcs1:
>     - shard-kbl:          [FAIL][102] ([i915#2842]) -> [PASS][103]
>    [102]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10660/shard-kbl6/igt@gem_exec_fair@basic-pace@vcs1.html
>    [103]: 
> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-kbl2/ig
> t@gem_exec_fair@basic-pace@vcs1.html
> 
>   * igt@gem_exec_params@dr1-dirt:
>     - shard-skl:          [DMESG-WARN][104] ([i915#1982]) -> [PASS][105]
>    [104]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10660/shard-skl4/igt@gem_exec_params@dr1-dirt.html
>    [105]: 
> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-skl5/ig
> t@gem_exec_params@dr1-dirt.html
> 
>   * igt@gem_ppgtt@flink-and-close-vma-leak:
>     - shard-glk:          [FAIL][106] ([i915#644]) -> [PASS][107]
>    [106]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10660/shard-glk6/igt@gem_ppgtt@flink-and-close-vma-leak.html
>    [107]: 
> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-glk5/ig
> t@gem_ppgtt@flink-and-close-vma-leak.html
> 
>   * igt@gem_softpin@noreloc-s3:
>     - shard-kbl:          [DMESG-WARN][108] ([i915#180]) -> [PASS][109] +1 similar issue
>    [108]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10660/shard-kbl1/igt@gem_softpin@noreloc-s3.html
>    [109]: 
> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-kbl7/ig
> t@gem_softpin@noreloc-s3.html
> 
>   * igt@gem_workarounds@suspend-resume-context:
>     - shard-skl:          [INCOMPLETE][110] ([i915#198] / [i915#4173]) -> [PASS][111]
>    [110]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10660/shard-skl2/igt@gem_workarounds@suspend-resume-context.html
>    [111]: 
> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-skl8/ig
> t@gem_workarounds@suspend-resume-context.html
> 
>   * igt@gen9_exec_parse@allowed-single:
>     - shard-skl:          [DMESG-WARN][112] ([i915#1436] / [i915#716]) -> [PASS][113]
>    [112]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10660/shard-skl9/igt@gen9_exec_parse@allowed-single.html
>    [113]: 
> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-skl1/ig
> t@gen9_exec_parse@allowed-single.html
> 
>   * igt@i915_pm_dc@dc6-dpms:
>     - shard-iclb:         [FAIL][114] ([i915#454]) -> [PASS][115]
>    [114]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10660/shard-iclb3/igt@i915_pm_dc@dc6-dpms.html
>    [115]: 
> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-iclb4/i
> gt@i915_pm_dc@dc6-dpms.html
> 
>   * igt@kms_big_fb@x-tiled-32bpp-rotate-0:
>     - shard-glk:          [DMESG-WARN][116] ([i915#118] / [i915#95]) -> [PASS][117]
>    [116]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10660/shard-glk4/igt@kms_big_fb@x-tiled-32bpp-rotate-0.html
>    [117]: 
> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-glk7/ig
> t@kms_big_fb@x-tiled-32bpp-rotate-0.html
> 
>   * igt@kms_flip@plain-flip-fb-recreate-interruptible@a-edp1:
>     - shard-skl:          [FAIL][118] ([i915#2122]) -> [PASS][119]
>    [118]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10660/shard-skl6/igt@kms_flip@plain-flip-fb-recreate-interruptible@a-edp1.html
>    [119]: 
> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-skl1/ig
> t@kms_flip@plain-flip-fb-recreate-interruptible@a-edp1.html
> 
>   * igt@kms_frontbuffer_tracking@psr-suspend:
>     - shard-tglb:         [INCOMPLETE][120] ([i915#2411] / [i915#456]) -> [PASS][121] +1 similar issue
>    [120]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10660/shard-tglb7/igt@kms_frontbuffer_tracking@psr-suspend.html
>    [121]: 
> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-tglb3/i
> gt@kms_frontbuffer_tracking@psr-suspend.html
> 
>   * igt@kms_hdr@bpc-switch:
>     - shard-skl:          [FAIL][122] ([i915#1188]) -> [PASS][123]
>    [122]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10660/shard-skl1/igt@kms_hdr@bpc-switch.html
>    [123]: 
> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-skl2/ig
> t@kms_hdr@bpc-switch.html
> 
>   * igt@kms_plane@plane-panning-bottom-right-suspend@pipe-a-planes:
>     - shard-apl:          [DMESG-WARN][124] ([i915#180]) -> [PASS][125]
>    [124]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10660/shard-apl6/igt@kms_plane@plane-panning-bottom-right-suspend@pipe-a-planes.html
>    [125]: 
> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-apl2/ig
> t@kms_plane@plane-panning-bottom-right-suspend@pipe-a-planes.html
> 
>   * igt@kms_plane_alpha_blend@pipe-b-constant-alpha-min:
>     - shard-skl:          [FAIL][126] ([fdo#108145] / [i915#265]) -> [PASS][127]
>    [126]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10660/shard-skl10/igt@kms_plane_alpha_blend@pipe-b-constant-alpha-min.html
>    [127]: 
> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-skl10/i
> gt@kms_plane_alpha_blend@pipe-b-constant-alpha-min.html
> 
>   * igt@kms_psr@psr2_cursor_mmap_cpu:
>     - shard-iclb:         [SKIP][128] ([fdo#109441]) -> [PASS][129] +2 similar issues
>    [128]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10660/shard-iclb4/igt@kms_psr@psr2_cursor_mmap_cpu.html
>    [129]: 
> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-iclb2/i
> gt@kms_psr@psr2_cursor_mmap_cpu.html
> 
>   * igt@perf@polling-parameterized:
>     - shard-skl:          [FAIL][130] ([i915#1542]) -> [PASS][131]
>    [130]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10660/shard-skl3/igt@perf@polling-parameterized.html
>    [131]: 
> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-skl8/ig
> t@perf@polling-parameterized.html
> 
>   
> #### Warnings ####
> 
>   * igt@kms_psr2_sf@primary-plane-update-sf-dmg-area-2:
>     - shard-iclb:         [SKIP][132] ([i915#658]) -> [SKIP][133] ([i915#2920]) +1 similar issue
>    [132]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10660/shard-iclb4/igt@kms_psr2_sf@primary-plane-update-sf-dmg-area-2.html
>    [133]: 
> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-iclb2/i
> gt@kms_psr2_sf@primary-plane-update-sf-dmg-area-2.html
> 
>   * igt@kms_psr2_sf@primary-plane-update-sf-dmg-area-4:
>     - shard-iclb:         [SKIP][134] ([i915#2920]) -> [SKIP][135] ([i915#658]) +2 similar issues
>    [134]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10660/shard-iclb2/igt@kms_psr2_sf@primary-plane-update-sf-dmg-area-4.html
>    [135]: 
> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/shard-iclb7/i
> gt@kms_psr2_sf@primary-plane-update-sf-dmg-area-4.html
> 
>   * igt@runner@aborted:
>     - shard-kbl:          ([FAIL][136], [FAIL][137], [FAIL][138], [FAIL][139], [FAIL][140]) ([i915#180] / [i915#1814] / [i915#3002] / [i915#3363]) -> ([FAIL][141], [FAIL][142], [FAIL][143], [FAIL][144], [FAIL][145], [FAIL][146], [FAIL][147], [FAIL][148]) ([fdo#109271] / [i915#180] / [i915#1814] / [i915#3002] / [i915#3363] / [i915#602])
>    [136]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10660/shard-kbl1/igt@runner@aborted.html
>    [137]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10660/shard-kbl1/igt@runner@aborted.html
>    [138]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10660/shard-kbl4/igt@runner@aborted.html
>    [139]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10660/shard-kbl4/igt@runner@aborted.html
>    [140]: 
> https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10660/shard-kbl6/igt@r
> unner@aborted.ht
> 
> == Logs ==
> 
> For more details see: 
> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21189/index.html

^ permalink raw reply	[flat|nested] 72+ messages in thread

end of thread, other threads:[~2021-09-29 22:23 UTC | newest]

Thread overview: 72+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2021-09-21  0:23 [Intel-gfx] [PATCH 00/13] drm/i915/tc: Fix TypeC connect/disconnect sequences Imre Deak
2021-09-21  0:23 ` [Intel-gfx] [PATCH 01/13] drm/i915/tc: Fix TypeC port init/resume time sanitization Imre Deak
2021-09-23 23:10   ` Souza, Jose
2021-09-24 10:59     ` Jani Nikula
2021-09-24 11:06       ` Imre Deak
2021-09-29 13:28   ` [Intel-gfx] [PATCH v2 " Imre Deak
2021-09-29 19:19     ` Souza, Jose
2021-09-21  0:23 ` [Intel-gfx] [PATCH 02/13] drm/i915/adlp/tc: Fix PHY connected check for Thunderbolt mode Imre Deak
2021-09-23 23:18   ` Souza, Jose
2021-09-24 15:24     ` Imre Deak
2021-09-21  0:23 ` [Intel-gfx] [PATCH 03/13] drm/i915/tc: Remove waiting for PHY complete during releasing ownership Imre Deak
2021-09-24  0:17   ` Souza, Jose
2021-09-21  0:23 ` [Intel-gfx] [PATCH 04/13] drm/i915/tc: Check for DP-alt, legacy sinks before taking PHY ownership Imre Deak
2021-09-24  0:30   ` Souza, Jose
2021-09-24 15:31     ` Imre Deak
2021-09-29 13:28   ` [Intel-gfx] [PATCH v2 " Imre Deak
2021-09-21  0:23 ` [Intel-gfx] [PATCH 05/13] drm/i915/tc: Add/use helpers to retrieve TypeC port properties Imre Deak
2021-09-24 19:54   ` Souza, Jose
2021-09-21  0:23 ` [Intel-gfx] [PATCH 06/13] drm/i915/tc: Don't keep legacy TypeC ports in connected state w/o a sink Imre Deak
2021-09-24 19:57   ` Souza, Jose
2021-09-21  0:23 ` [Intel-gfx] [PATCH 07/13] drm/i915/tc: Add a mode for the TypeC PHY's disconnected state Imre Deak
2021-09-27 21:16   ` Souza, Jose
2021-09-27 21:46     ` Imre Deak
2021-09-28 19:18       ` Souza, Jose
2021-09-28 19:34         ` Imre Deak
2021-09-28 19:45           ` Souza, Jose
2021-09-28 19:55             ` Imre Deak
2021-09-28 20:02               ` Souza, Jose
2021-09-28 20:08                 ` Imre Deak
2021-09-28 20:29                   ` Souza, Jose
2021-09-28 20:38                     ` Imre Deak
2021-09-28 20:56                       ` Souza, Jose
2021-09-29 13:28   ` [Intel-gfx] [PATCH v2 " Imre Deak
2021-09-21  0:23 ` [Intel-gfx] [PATCH 08/13] drm/i915/tc: Refactor TC-cold block/unblock helpers Imre Deak
2021-09-27 21:56   ` Souza, Jose
2021-09-27 22:13     ` Imre Deak
2021-09-27 22:21       ` Souza, Jose
2021-09-27 22:28         ` Imre Deak
2021-09-27 23:33           ` Souza, Jose
2021-09-27 23:51             ` Imre Deak
2021-09-28  0:14               ` Souza, Jose
2021-09-28  0:45                 ` Imre Deak
2021-09-28  1:03                   ` Souza, Jose
2021-09-29 13:28   ` [Intel-gfx] [PATCH v2 " Imre Deak
2021-09-21  0:23 ` [Intel-gfx] [PATCH 09/13] drm/i915/tc: Avoid using legacy AUX PW in TBT mode Imre Deak
2021-09-28 20:31   ` Souza, Jose
2021-09-29 13:28   ` [Intel-gfx] [PATCH v2 " Imre Deak
2021-09-21  0:23 ` [Intel-gfx] [PATCH 10/13] drm/i915/icl/tc: Remove the ICL special casing during TC-cold blocking Imre Deak
2021-09-27 22:02   ` Souza, Jose
2021-09-28 10:52     ` Imre Deak
2021-09-28 20:50       ` Souza, Jose
2021-09-21  0:23 ` [Intel-gfx] [PATCH 11/13] drm/i915/tc: Fix TypeC PHY connect/disconnect logic on ADL-P Imre Deak
2021-09-28 20:51   ` Souza, Jose
2021-09-29 13:28   ` [Intel-gfx] [PATCH v2 " Imre Deak
2021-09-21  0:23 ` [Intel-gfx] [PATCH 12/13] drm/i915/tc: Drop extra TC cold blocking from intel_tc_port_connected() Imre Deak
2021-09-28 20:51   ` Souza, Jose
2021-09-21  0:23 ` [Intel-gfx] [PATCH 13/13] drm/i915/tc: Fix system hang on ADL-P during TypeC PHY disconnect Imre Deak
2021-09-28 20:55   ` Souza, Jose
2021-09-29 13:28   ` [Intel-gfx] [PATCH v2 " Imre Deak
2021-09-21  0:30 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915/tc: Fix TypeC connect/disconnect sequences Patchwork
2021-09-21  0:32 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork
2021-09-21  1:01 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2021-09-21  3:01 ` [Intel-gfx] ✓ Fi.CI.IGT: " Patchwork
2021-09-29 13:42 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915/tc: Fix TypeC connect/disconnect sequences (rev8) Patchwork
2021-09-29 13:43 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork
2021-09-29 14:11 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2021-09-29 16:58 ` [Intel-gfx] ✗ Fi.CI.IGT: failure " Patchwork
2021-09-29 21:16   ` Imre Deak
2021-09-29 22:23     ` Vudum, Lakshminarayana
2021-09-29 21:47 ` Patchwork
2021-09-29 21:54 ` Patchwork
2021-09-29 22:21 ` [Intel-gfx] ✓ Fi.CI.IGT: success " Patchwork

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