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From: Kalle Valo <kvalo@codeaurora.org>
To: "Jonas Dreßler" <verdre@v0yd.nl>
Cc: "Amitkumar Karwar" <amitkarwar@gmail.com>,
	"Ganapathi Bhat" <ganapathi017@gmail.com>,
	"Xinming Hu" <huxinming820@gmail.com>,
	"David S. Miller" <davem@davemloft.net>,
	"Jakub Kicinski" <kuba@kernel.org>,
	"Jonas Dreßler" <verdre@v0yd.nl>,
	"Tsuchiya Yuto" <kitakar@gmail.com>,
	linux-wireless@vger.kernel.org, netdev@vger.kernel.org,
	linux-kernel@vger.kernel.org, linux-pci@vger.kernel.org,
	"Maximilian Luz" <luzmaximilian@gmail.com>,
	"Andy Shevchenko" <andriy.shevchenko@linux.intel.com>,
	"Bjorn Helgaas" <bhelgaas@google.com>,
	"Pali Rohár" <pali@kernel.org>,
	"Heiner Kallweit" <hkallweit1@gmail.com>,
	"Johannes Berg" <johannes@sipsolutions.net>,
	"Brian Norris" <briannorris@chromium.org>,
	"David Laight" <David.Laight@ACULAB.COM>
Subject: Re: [PATCH] mwifiex: Add quirk resetting the PCI bridge on MS Surface devices
Date: Mon, 18 Oct 2021 12:27:24 +0000 (UTC)	[thread overview]
Message-ID: <163456003528.19217.10035499117616642207.kvalo@codeaurora.org> (raw)
In-Reply-To: <20211011134238.16551-1-verdre@v0yd.nl>

Jonas Dreßler <verdre@v0yd.nl> wrote:

> The most recent firmware (15.68.19.p21) of the 88W8897 PCIe+USB card
> reports a hardcoded LTR value to the system during initialization,
> probably as an (unsuccessful) attempt of the developers to fix firmware
> crashes. This LTR value prevents most of the Microsoft Surface devices
> from entering deep powersaving states (either platform C-State 10 or
> S0ix state), because the exit latency of that state would be higher than
> what the card can tolerate.
> 
> Turns out the card works just the same (including the firmware crashes)
> no matter if that hardcoded LTR value is reported or not, so it's kind
> of useless and only prevents us from saving power.
> 
> To get rid of those hardcoded LTR requirements, it's possible to reset
> the PCI bridge device after initializing the cards firmware. I'm not
> exactly sure why that works, maybe the power management subsystem of the
> PCH resets its stored LTR values when doing a function level reset of
> the bridge device. Doing the reset once after starting the wifi firmware
> works very well, probably because the firmware only reports that LTR
> value a single time during firmware startup.
> 
> Signed-off-by: Jonas Dreßler <verdre@v0yd.nl>

I'm not sure what was the conclusion from the discussion, so dropping
the patch. Please resend once it's ready to be applied.

Patch set to Changes Requested.

-- 
https://patchwork.kernel.org/project/linux-wireless/patch/20211011134238.16551-1-verdre@v0yd.nl/

https://wireless.wiki.kernel.org/en/developers/documentation/submittingpatches


      parent reply	other threads:[~2021-10-18 12:27 UTC|newest]

Thread overview: 16+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-10-11 13:42 [PATCH] mwifiex: Add quirk resetting the PCI bridge on MS Surface devices Jonas Dreßler
2021-10-11 16:53 ` Bjorn Helgaas
2021-10-12  8:48   ` Jonas Dreßler
2021-10-12  9:00     ` Pali Rohár
2021-10-12 11:20       ` Jonas Dreßler
2021-10-12 11:29     ` Bjorn Helgaas
2021-10-13 21:35       ` Jonas Dreßler
2021-10-11 17:02 ` Pali Rohár
2021-10-12  8:55   ` Jonas Dreßler
2021-10-12 15:39     ` Bjorn Helgaas
2021-10-13 22:08       ` Jonas Dreßler
2021-10-18 15:35         ` Bjorn Helgaas
2021-10-25 16:45           ` Jonas Dreßler
2021-10-25 23:56             ` Bjorn Helgaas
2021-11-04 13:57               ` Jonas Dreßler
2021-10-18 12:27 ` Kalle Valo [this message]

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