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In-Reply-To: <20211019074030.31294-4-kavyasree.kotagiri@microchip.com>
References: <20211019074030.31294-1-kavyasree.kotagiri@microchip.com> <20211019074030.31294-4-kavyasree.kotagiri@microchip.com>
Subject: Re: [PATCH v9 3/3] clk: lan966x: Add lan966x SoC clock driver
From:   Stephen Boyd <sboyd@kernel.org>
Cc:     nicolas.ferre@microchip.com, linux-kernel@vger.kernel.org,
        devicetree@vger.kernel.org, linux-clk@vger.kernel.org,
        UNGLinuxDriver@microchip.com, Eugen.Hristev@microchip.com,
        Kavyasree.Kotagiri@microchip.com, Manohar.Puri@microchip.com
To:     Kavyasree Kotagiri <kavyasree.kotagiri@microchip.com>,
        mturquette@baylibre.com, robh+dt@kernel.org
Date:   Tue, 02 Nov 2021 14:52:50 -0700
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Quoting Kavyasree Kotagiri (2021-10-19 00:40:30)
> diff --git a/drivers/clk/clk-lan966x.c b/drivers/clk/clk-lan966x.c
> new file mode 100644
> index 000000000000..19bec94e1551
> --- /dev/null
> +++ b/drivers/clk/clk-lan966x.c
> @@ -0,0 +1,240 @@
> +// SPDX-License-Identifier: GPL-2.0-or-later
> +/*
> + * Microchip LAN966x SoC Clock driver.
> + *
> + * Copyright (C) 2021 Microchip Technology, Inc. and its subsidiaries
> + *
> + * Author: Kavyasree Kotagiri <kavyasree.kotagiri@microchip.com>
> + */
> +
> +#include <linux/bitfield.h>
> +#include <linux/clk-provider.h>
> +#include <linux/io.h>
> +#include <linux/kernel.h>
> +#include <linux/module.h>
> +#include <linux/of.h>
> +#include <linux/platform_device.h>
> +#include <linux/slab.h>
> +
> +#include <dt-bindings/clock/microchip,lan966x.h>
> +
> +#define GCK_ENA         BIT(0)
> +#define GCK_SRC_SEL     GENMASK(9, 8)
> +#define GCK_PRESCALER   GENMASK(23, 16)
> +
> +#define DIV_MAX                255
> +
> +static const char *clk_names[N_CLOCKS] =3D {
> +       "qspi0", "qspi1", "qspi2", "sdmmc0",
> +       "pi", "mcan0", "mcan1", "flexcom0",
> +       "flexcom1", "flexcom2", "flexcom3",
> +       "flexcom4", "timer1", "usb_refclk",
> +};
> +
> +struct lan966x_gck {
> +       struct clk_hw hw;
> +       void __iomem *reg;
> +};
> +#define to_lan966x_gck(hw) container_of(hw, struct lan966x_gck, hw)
> +
> +static const struct clk_parent_data lan966x_gck_pdata[] =3D {
> +       { .fw_name =3D "cpu_clk", .name =3D "cpu_clk" },

name shouldn't be required if the binding is new. That's the case
right?


> +       { .fw_name =3D "ddr_clk", .name =3D "ddr_clk" },
> +       { .fw_name =3D "sys_clk", .name =3D "sys_clk" },
> +};
> +