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[115.64.213.93]) by smtp.gmail.com with ESMTPSA id d3sm4947232pfv.57.2021.11.25.16.55.42 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 25 Nov 2021 16:55:43 -0800 (PST) Date: Fri, 26 Nov 2021 10:55:38 +1000 From: Nicholas Piggin Subject: Re: [PATCH v4 00/17] powerpc: Make hash MMU code build configurable To: Christophe Leroy , linuxppc-dev@lists.ozlabs.org References: <20211125125025.1472060-1-npiggin@gmail.com> <27f9cddf-44db-1d1f-17e0-fd8252c7a1c9@csgroup.eu> In-Reply-To: MIME-Version: 1.0 Message-Id: <1637887917.uatiybce4e.astroid@bobo.none> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: quoted-printable X-BeenThere: linuxppc-dev@lists.ozlabs.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Linux on PowerPC Developers Mail List List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: linuxppc-dev-bounces+linuxppc-dev=archiver.kernel.org@lists.ozlabs.org Sender: "Linuxppc-dev" Excerpts from Christophe Leroy's message of November 26, 2021 3:35 am: >=20 >=20 > Le 25/11/2021 =C3=A0 17:35, Christophe Leroy a =C3=A9crit=C2=A0: >>=20 >>=20 >> Le 25/11/2021 =C3=A0 13:50, Nicholas Piggin a =C3=A9crit=C2=A0: >>> Now that there's a platform that can make good use of it, here's >>> a series that can prevent the hash MMU code being built for 64s >>> platforms that don't need it. >>=20 >> # CONFIG_PPC_64S_HASH_MMU is not set >>=20 >>=20 >> :1559:2: warning: #warning syscall futex_waitv not implemented=20 >> [-Wcpp] >> arch/powerpc/platforms/cell/spu_base.c: In function '__spu_kernel_slb': >> arch/powerpc/platforms/cell/spu_base.c:215:38: error: 'mmu_linear_psize'= =20 >> undeclared (first use in this function); did you mean 'mmu_virtual_psize= '? >> =C2=A0 215 |=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2= =A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 llp =3D mmu_psize_defs[mmu_linear_p= size].sllp; >> =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 |=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2= =A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0= =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2= =A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 ^~~~~~~~~~~~~~~~ >> =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 |=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2= =A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0= =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2= =A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 mmu_virtual_psize >> arch/powerpc/platforms/cell/spu_base.c:215:38: note: each undeclared=20 >> identifier is reported only once for each function it appears in >> make[3]: *** [scripts/Makefile.build:287:=20 >> arch/powerpc/platforms/cell/spu_base.o] Error 1 >> make[2]: *** [scripts/Makefile.build:549: arch/powerpc/platforms/cell]=20 >> Error 2 >> make[1]: *** [scripts/Makefile.build:549: arch/powerpc/platforms] Error = 2 >> make: *** [Makefile:1846: arch/powerpc] Error 2 >>=20 >>=20 >=20 >=20 > With CONFIG_SPU_BASE removed, the above voids and I get to the final=20 > link with the following errors: This is building cell platform with POWER9 CPU and !HASH? We don't have to make that build, just prevent the config. I had that in=20 a previous version which also had platforms select hash, but we went to=20 just CPU. But now there's no constraint that prevents cell+POWER9 even=20 though it doesn't make sense. Not sure the best way to fix it. I'll think about it. Thanks, Nick