From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id EDFB6C433EF for ; Wed, 1 Dec 2021 06:16:08 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1346868AbhLAGT2 (ORCPT ); Wed, 1 Dec 2021 01:19:28 -0500 Received: from alexa-out-sd-02.qualcomm.com ([199.106.114.39]:38339 "EHLO alexa-out-sd-02.qualcomm.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1346866AbhLAGT1 (ORCPT ); Wed, 1 Dec 2021 01:19:27 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=quicinc.com; i=@quicinc.com; q=dns/txt; s=qcdkim; t=1638339367; x=1669875367; h=from:to:cc:subject:date:message-id:mime-version; bh=BR15XsJ/2xFEXlJ/cpJHjd2xlSg5BN8S4jdNhwlMkZ0=; b=xwY8BB5VyhyjyE29F/L28U0kS6h2IeRkwDcogPo9Po1fydzjeKG/uJPh BW55qpFhJKjUUjXsTAD1nRL6G0dh/nXAMkyNUq7Qag6Krj6/3998J/u1p ZonjtSXJ2G/9VW6rUOtyeY0Wn9dVaZPuZHUD0XRzJVyZArFdMAFLdUPNx Q=; Received: from unknown (HELO ironmsg02-sd.qualcomm.com) ([10.53.140.142]) by alexa-out-sd-02.qualcomm.com with ESMTP; 30 Nov 2021 22:16:06 -0800 X-QCInternal: smtphost Received: from nasanex01c.na.qualcomm.com ([10.47.97.222]) by ironmsg02-sd.qualcomm.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 30 Nov 2021 22:16:06 -0800 Received: from nalasex01a.na.qualcomm.com (10.47.209.196) by nasanex01c.na.qualcomm.com (10.47.97.222) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.922.19; Tue, 30 Nov 2021 22:16:05 -0800 Received: from c-sanm-linux.qualcomm.com (10.80.80.8) by nalasex01a.na.qualcomm.com (10.47.209.196) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.922.19; Tue, 30 Nov 2021 22:16:01 -0800 From: Sandeep Maheswaram To: Greg Kroah-Hartman , Felipe Balbi , Stephen Boyd , Doug Anderson , Matthias Kaehlcke , Mathias Nyman CC: , , , , , Sandeep Maheswaram Subject: [PATCH v3] Skip phy initialization for DWC3 USB Controllers Date: Wed, 1 Dec 2021 11:45:37 +0530 Message-ID: <1638339338-6731-1-git-send-email-quic_c_sanm@quicinc.com> X-Mailer: git-send-email 2.7.4 MIME-Version: 1.0 Content-Type: text/plain X-Originating-IP: [10.80.80.8] X-ClientProxiedBy: nasanex01b.na.qualcomm.com (10.46.141.250) To nalasex01a.na.qualcomm.com (10.47.209.196) Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Set XHCI_SKIP_PHY_INIT quirk to avoid phy initialization twice. Runtime suspend of phy drivers was failing from DWC3 driver as runtime usage value is 2 because the phy is initialized from DWC3 core and HCD core. DWC3 manages phy in their core drivers. Set this quirk to avoid phy initialization in HCD core. v3: Dropped the dt property and binding. Checking for dwc3 compatible in xhci to set the quirk XHCI_SKIP_PHY_INIT. v2: Updated the commit descriptions. Changed subject prefix from dwc to dwc3. Increased props array size. Sandeep Maheswaram (1): usb: host: xhci-plat: Set XHCI_SKIP_PHY_INIT quirk for DWC3 controller drivers/usb/host/xhci-plat.c | 3 +++ 1 file changed, 3 insertions(+) -- 2.7.4