From mboxrd@z Thu Jan 1 00:00:00 1970 From: Jaehoon Chung Date: Wed, 23 Dec 2020 08:49:43 +0900 Subject: [v5 08/18] mmc: dwmmc: Change designware MMC 'clksel' callback function to return status In-Reply-To: <20201221164942.11640-9-elly.siew.chin.lim@intel.com> References: <20201221164942.11640-1-elly.siew.chin.lim@intel.com> <20201221164942.11640-9-elly.siew.chin.lim@intel.com> Message-ID: <163928b0-58b5-4408-98e9-c2041b8c29df@samsung.com> List-Id: MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit To: u-boot@lists.denx.de On 12/22/20 1:49 AM, Siew Chin Lim wrote: > Change 'clksel' callback function to allow the code to return a > status. > > This patch is a preparation for enabling Arm-Trusted-Firmware (ATF) > in Intel SoC FPGA. This patch does not change functionality. > > When using Arm-Trusted-Firmware (ATF) in Intel SoC FPGA, the MMC clock > related register is secure register which is required to be written > via SMC/PCSI call. It is possible that U-Boot fail to write the > register if there is unexpected error between U-Boot and ATF. > As a result, there maybe signal integrity on MMC connection due to > clock. So, the code should reports error to user when 'clksel' fail. > > Signed-off-by: Siew Chin Lim Reviewed-by: Jaehoon Chung Best Regards, Jaehoon Chung > --- > drivers/mmc/ca_dw_mmc.c | 4 +++- > drivers/mmc/dw_mmc.c | 9 +++++++-- > drivers/mmc/exynos_dw_mmc.c | 4 +++- > drivers/mmc/nexell_dw_mmc.c | 4 +++- > drivers/mmc/socfpga_dw_mmc.c | 4 +++- > include/dwmmc.h | 2 +- > 6 files changed, 20 insertions(+), 7 deletions(-) > > diff --git a/drivers/mmc/ca_dw_mmc.c b/drivers/mmc/ca_dw_mmc.c > index 198c41f451..d0cf1b7248 100644 > --- a/drivers/mmc/ca_dw_mmc.c > +++ b/drivers/mmc/ca_dw_mmc.c > @@ -40,7 +40,7 @@ struct ca_dwmmc_priv_data { > u8 ds; > }; > > -static void ca_dwmci_clksel(struct dwmci_host *host) > +static int ca_dwmci_clksel(struct dwmci_host *host) > { > struct ca_dwmmc_priv_data *priv = host->priv; > u32 val = readl(priv->sd_dll_reg); > @@ -52,6 +52,8 @@ static void ca_dwmci_clksel(struct dwmci_host *host) > val |= SD_CLK_SEL_100MHZ; > > writel(val, priv->sd_dll_reg); > + > + return 0; > } > > static void ca_dwmci_board_init(struct dwmci_host *host) > diff --git a/drivers/mmc/dw_mmc.c b/drivers/mmc/dw_mmc.c > index 7702f4be3f..7c8a312fa7 100644 > --- a/drivers/mmc/dw_mmc.c > +++ b/drivers/mmc/dw_mmc.c > @@ -496,8 +496,13 @@ static int dwmci_set_ios(struct mmc *mmc) > > dwmci_writel(host, DWMCI_UHS_REG, regs); > > - if (host->clksel) > - host->clksel(host); > + if (host->clksel) { > + int ret; > + > + ret = host->clksel(host); > + if (ret) > + return ret; > + } > > #if CONFIG_IS_ENABLED(DM_REGULATOR) > if (mmc->vqmmc_supply) { > diff --git a/drivers/mmc/exynos_dw_mmc.c b/drivers/mmc/exynos_dw_mmc.c > index 435ccac594..7a25dac841 100644 > --- a/drivers/mmc/exynos_dw_mmc.c > +++ b/drivers/mmc/exynos_dw_mmc.c > @@ -44,7 +44,7 @@ struct dwmci_exynos_priv_data { > * Function used as callback function to initialise the > * CLKSEL register for every mmc channel. > */ > -static void exynos_dwmci_clksel(struct dwmci_host *host) > +static int exynos_dwmci_clksel(struct dwmci_host *host) > { > #ifdef CONFIG_DM_MMC > struct dwmci_exynos_priv_data *priv = > @@ -53,6 +53,8 @@ static void exynos_dwmci_clksel(struct dwmci_host *host) > struct dwmci_exynos_priv_data *priv = host->priv; > #endif > dwmci_writel(host, DWMCI_CLKSEL, priv->sdr_timing); > + > + return 0; > } > > unsigned int exynos_dwmci_get_clk(struct dwmci_host *host, uint freq) > diff --git a/drivers/mmc/nexell_dw_mmc.c b/drivers/mmc/nexell_dw_mmc.c > index 0462759444..fe00189fe1 100644 > --- a/drivers/mmc/nexell_dw_mmc.c > +++ b/drivers/mmc/nexell_dw_mmc.c > @@ -51,7 +51,7 @@ struct nexell_dwmmc_priv { > > struct clk *clk_get(const char *id); > > -static void nx_dw_mmc_clksel(struct dwmci_host *host) > +static int nx_dw_mmc_clksel(struct dwmci_host *host) > { > /* host->priv is pointer to "struct udevice" */ > struct nexell_dwmmc_priv *priv = dev_get_priv(host->priv); > @@ -65,6 +65,8 @@ static void nx_dw_mmc_clksel(struct dwmci_host *host) > DWMCI_SET_DRV_CLK(DWMCI_SHIFT_0) | DWMCI_SET_DIV_RATIO(3); > > dwmci_writel(host, DWMCI_CLKSEL, val); > + > + return 0; > } > > static void nx_dw_mmc_reset(int ch) > diff --git a/drivers/mmc/socfpga_dw_mmc.c b/drivers/mmc/socfpga_dw_mmc.c > index 0022f943bd..0a2845bcc2 100644 > --- a/drivers/mmc/socfpga_dw_mmc.c > +++ b/drivers/mmc/socfpga_dw_mmc.c > @@ -46,7 +46,7 @@ static void socfpga_dwmci_reset(struct udevice *dev) > reset_deassert_bulk(&reset_bulk); > } > > -static void socfpga_dwmci_clksel(struct dwmci_host *host) > +static int socfpga_dwmci_clksel(struct dwmci_host *host) > { > struct dwmci_socfpga_priv_data *priv = host->priv; > u32 sdmmc_mask = ((priv->smplsel & 0x7) << SYSMGR_SDMMC_SMPLSEL_SHIFT) | > @@ -66,6 +66,8 @@ static void socfpga_dwmci_clksel(struct dwmci_host *host) > /* Enable SDMMC clock */ > setbits_le32(socfpga_get_clkmgr_addr() + CLKMGR_PERPLL_EN, > CLKMGR_PERPLLGRP_EN_SDMMCCLK_MASK); > + > + return 0; > } > > static int socfpga_dwmmc_get_clk_rate(struct udevice *dev) > diff --git a/include/dwmmc.h b/include/dwmmc.h > index d8a8355a0a..f8aeda7697 100644 > --- a/include/dwmmc.h > +++ b/include/dwmmc.h > @@ -174,7 +174,7 @@ struct dwmci_host { > struct mmc *mmc; > void *priv; > > - void (*clksel)(struct dwmci_host *host); > + int (*clksel)(struct dwmci_host *host); > void (*board_init)(struct dwmci_host *host); > > /** >