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* [PATCH v2 0/4] Flat-CCS eviction enhancements
@ 2022-04-25 16:24 ` Ramalingam C
  0 siblings, 0 replies; 20+ messages in thread
From: Ramalingam C @ 2022-04-25 16:24 UTC (permalink / raw)
  To: intel-gfx, dri-devel; +Cc: Hellstrom Thomas, Matthew Auld

Flat-CCS eviction enhancements

v2: Correcting the memory residency requirement for flat-ccs capability
    [Thomas]

Ramalingam C (4):
  drm/i915/gt: GEM_BUG_ON unexpected NULL at scatterlist walking
  drm/i915/gt: optimize the ccs_sz calculation per chunk
  drm/i915/gt: Document the eviction of the Flat-CCS objects
  uapi/drm/i915: Document memory residency and Flat-CCS capability of
    obj

 drivers/gpu/drm/i915/gt/intel_migrate.c | 65 ++++++++++++-------------
 include/uapi/drm/i915_drm.h             | 18 +++++++
 2 files changed, 50 insertions(+), 33 deletions(-)

-- 
2.20.1


^ permalink raw reply	[flat|nested] 20+ messages in thread

* [Intel-gfx] [PATCH v2 0/4] Flat-CCS eviction enhancements
@ 2022-04-25 16:24 ` Ramalingam C
  0 siblings, 0 replies; 20+ messages in thread
From: Ramalingam C @ 2022-04-25 16:24 UTC (permalink / raw)
  To: intel-gfx, dri-devel; +Cc: Hellstrom Thomas, Matthew Auld

Flat-CCS eviction enhancements

v2: Correcting the memory residency requirement for flat-ccs capability
    [Thomas]

Ramalingam C (4):
  drm/i915/gt: GEM_BUG_ON unexpected NULL at scatterlist walking
  drm/i915/gt: optimize the ccs_sz calculation per chunk
  drm/i915/gt: Document the eviction of the Flat-CCS objects
  uapi/drm/i915: Document memory residency and Flat-CCS capability of
    obj

 drivers/gpu/drm/i915/gt/intel_migrate.c | 65 ++++++++++++-------------
 include/uapi/drm/i915_drm.h             | 18 +++++++
 2 files changed, 50 insertions(+), 33 deletions(-)

-- 
2.20.1


^ permalink raw reply	[flat|nested] 20+ messages in thread

* [PATCH v2 1/4] drm/i915/gt: GEM_BUG_ON unexpected NULL at scatterlist walking
  2022-04-25 16:24 ` [Intel-gfx] " Ramalingam C
@ 2022-04-25 16:24   ` Ramalingam C
  -1 siblings, 0 replies; 20+ messages in thread
From: Ramalingam C @ 2022-04-25 16:24 UTC (permalink / raw)
  To: intel-gfx, dri-devel; +Cc: Hellstrom Thomas, Matthew Auld

While locating the start of ccs scatterlist in smem scatterlist, that has
to be the size of lmem obj size + corresponding ccs data size. Report bug
if scatterlist terminate before that length.

Signed-off-by: Ramalingam C <ramalingam.c@intel.com>
---
 drivers/gpu/drm/i915/gt/intel_migrate.c | 6 ++++++
 1 file changed, 6 insertions(+)

diff --git a/drivers/gpu/drm/i915/gt/intel_migrate.c b/drivers/gpu/drm/i915/gt/intel_migrate.c
index 9d552f30b627..29d761da02c4 100644
--- a/drivers/gpu/drm/i915/gt/intel_migrate.c
+++ b/drivers/gpu/drm/i915/gt/intel_migrate.c
@@ -687,6 +687,12 @@ static void get_ccs_sg_sgt(struct sgt_dma *it, u32 bytes_to_cpy)
 		bytes_to_cpy -= len;
 
 		it->sg = __sg_next(it->sg);
+
+		/*
+		 * scatterlist supposed to be the size of
+		 * bytes_to_cpy + GET_CCS_BYTES(bytes_to_copy).
+		 */
+		GEM_BUG_ON(!it->sg);
 		it->dma = sg_dma_address(it->sg);
 		it->max = it->dma + sg_dma_len(it->sg);
 	} while (bytes_to_cpy);
-- 
2.20.1


^ permalink raw reply related	[flat|nested] 20+ messages in thread

* [Intel-gfx] [PATCH v2 1/4] drm/i915/gt: GEM_BUG_ON unexpected NULL at scatterlist walking
@ 2022-04-25 16:24   ` Ramalingam C
  0 siblings, 0 replies; 20+ messages in thread
From: Ramalingam C @ 2022-04-25 16:24 UTC (permalink / raw)
  To: intel-gfx, dri-devel; +Cc: Hellstrom Thomas, Matthew Auld

While locating the start of ccs scatterlist in smem scatterlist, that has
to be the size of lmem obj size + corresponding ccs data size. Report bug
if scatterlist terminate before that length.

Signed-off-by: Ramalingam C <ramalingam.c@intel.com>
---
 drivers/gpu/drm/i915/gt/intel_migrate.c | 6 ++++++
 1 file changed, 6 insertions(+)

diff --git a/drivers/gpu/drm/i915/gt/intel_migrate.c b/drivers/gpu/drm/i915/gt/intel_migrate.c
index 9d552f30b627..29d761da02c4 100644
--- a/drivers/gpu/drm/i915/gt/intel_migrate.c
+++ b/drivers/gpu/drm/i915/gt/intel_migrate.c
@@ -687,6 +687,12 @@ static void get_ccs_sg_sgt(struct sgt_dma *it, u32 bytes_to_cpy)
 		bytes_to_cpy -= len;
 
 		it->sg = __sg_next(it->sg);
+
+		/*
+		 * scatterlist supposed to be the size of
+		 * bytes_to_cpy + GET_CCS_BYTES(bytes_to_copy).
+		 */
+		GEM_BUG_ON(!it->sg);
 		it->dma = sg_dma_address(it->sg);
 		it->max = it->dma + sg_dma_len(it->sg);
 	} while (bytes_to_cpy);
-- 
2.20.1


^ permalink raw reply related	[flat|nested] 20+ messages in thread

* [PATCH v2 2/4] drm/i915/gt: optimize the ccs_sz calculation per chunk
  2022-04-25 16:24 ` [Intel-gfx] " Ramalingam C
@ 2022-04-25 16:24   ` Ramalingam C
  -1 siblings, 0 replies; 20+ messages in thread
From: Ramalingam C @ 2022-04-25 16:24 UTC (permalink / raw)
  To: intel-gfx, dri-devel; +Cc: Hellstrom Thomas, Matthew Auld

Calculate the ccs_sz that needs to be emitted based on the src
and dst pages emitted per chunk. And handle the return value of emit_pte
for the ccs pages.

Signed-off-by: Ramalingam C <ramalingam.c@intel.com>
---
 drivers/gpu/drm/i915/gt/intel_migrate.c | 36 +++++++++----------------
 1 file changed, 12 insertions(+), 24 deletions(-)

diff --git a/drivers/gpu/drm/i915/gt/intel_migrate.c b/drivers/gpu/drm/i915/gt/intel_migrate.c
index 29d761da02c4..463a6a14b5f9 100644
--- a/drivers/gpu/drm/i915/gt/intel_migrate.c
+++ b/drivers/gpu/drm/i915/gt/intel_migrate.c
@@ -647,17 +647,9 @@ static int scatter_list_length(struct scatterlist *sg)
 
 static void
 calculate_chunk_sz(struct drm_i915_private *i915, bool src_is_lmem,
-		   int *src_sz, int *ccs_sz, u32 bytes_to_cpy,
-		   u32 ccs_bytes_to_cpy)
+		   int *src_sz, u32 bytes_to_cpy, u32 ccs_bytes_to_cpy)
 {
 	if (ccs_bytes_to_cpy) {
-		/*
-		 * We can only copy the ccs data corresponding to
-		 * the CHUNK_SZ of lmem which is
-		 * GET_CCS_BYTES(i915, CHUNK_SZ))
-		 */
-		*ccs_sz = min_t(int, ccs_bytes_to_cpy, GET_CCS_BYTES(i915, CHUNK_SZ));
-
 		if (!src_is_lmem)
 			/*
 			 * When CHUNK_SZ is passed all the pages upto CHUNK_SZ
@@ -713,10 +705,10 @@ intel_context_migrate_copy(struct intel_context *ce,
 	struct drm_i915_private *i915 = ce->engine->i915;
 	u32 ccs_bytes_to_cpy = 0, bytes_to_cpy;
 	enum i915_cache_level ccs_cache_level;
-	int src_sz, dst_sz, ccs_sz;
 	u32 src_offset, dst_offset;
 	u8 src_access, dst_access;
 	struct i915_request *rq;
+	int src_sz, dst_sz;
 	bool ccs_is_src;
 	int err;
 
@@ -770,7 +762,7 @@ intel_context_migrate_copy(struct intel_context *ce,
 	}
 
 	do {
-		int len;
+		int len, ccs_sz;
 
 		rq = i915_request_create(ce);
 		if (IS_ERR(rq)) {
@@ -797,7 +789,7 @@ intel_context_migrate_copy(struct intel_context *ce,
 		if (err)
 			goto out_rq;
 
-		calculate_chunk_sz(i915, src_is_lmem, &src_sz, &ccs_sz,
+		calculate_chunk_sz(i915, src_is_lmem, &src_sz,
 				   bytes_to_cpy, ccs_bytes_to_cpy);
 
 		len = emit_pte(rq, &it_src, src_cache_level, src_is_lmem,
@@ -835,33 +827,29 @@ intel_context_migrate_copy(struct intel_context *ce,
 			if (err)
 				goto out_rq;
 
+			ccs_sz = GET_CCS_BYTES(i915, len);
 			err = emit_pte(rq, &it_ccs, ccs_cache_level, false,
 				       ccs_is_src ? src_offset : dst_offset,
 				       ccs_sz);
+			if (err < 0)
+				goto out_rq;
+			if (err < ccs_sz) {
+				err = -EINVAL;
+				goto out_rq;
+			}
 
 			err = rq->engine->emit_flush(rq, EMIT_INVALIDATE);
 			if (err)
 				goto out_rq;
 
-			/*
-			 * Using max of src_sz and dst_sz, as we need to
-			 * pass the lmem size corresponding to the ccs
-			 * blocks we need to handle.
-			 */
-			ccs_sz = max_t(int, ccs_is_src ? ccs_sz : src_sz,
-				       ccs_is_src ? dst_sz : ccs_sz);
-
 			err = emit_copy_ccs(rq, dst_offset, dst_access,
-					    src_offset, src_access, ccs_sz);
+					    src_offset, src_access, len);
 			if (err)
 				goto out_rq;
 
 			err = rq->engine->emit_flush(rq, EMIT_INVALIDATE);
 			if (err)
 				goto out_rq;
-
-			/* Converting back to ccs bytes */
-			ccs_sz = GET_CCS_BYTES(rq->engine->i915, ccs_sz);
 			ccs_bytes_to_cpy -= ccs_sz;
 		}
 
-- 
2.20.1


^ permalink raw reply related	[flat|nested] 20+ messages in thread

* [Intel-gfx] [PATCH v2 2/4] drm/i915/gt: optimize the ccs_sz calculation per chunk
@ 2022-04-25 16:24   ` Ramalingam C
  0 siblings, 0 replies; 20+ messages in thread
From: Ramalingam C @ 2022-04-25 16:24 UTC (permalink / raw)
  To: intel-gfx, dri-devel; +Cc: Hellstrom Thomas, Matthew Auld

Calculate the ccs_sz that needs to be emitted based on the src
and dst pages emitted per chunk. And handle the return value of emit_pte
for the ccs pages.

Signed-off-by: Ramalingam C <ramalingam.c@intel.com>
---
 drivers/gpu/drm/i915/gt/intel_migrate.c | 36 +++++++++----------------
 1 file changed, 12 insertions(+), 24 deletions(-)

diff --git a/drivers/gpu/drm/i915/gt/intel_migrate.c b/drivers/gpu/drm/i915/gt/intel_migrate.c
index 29d761da02c4..463a6a14b5f9 100644
--- a/drivers/gpu/drm/i915/gt/intel_migrate.c
+++ b/drivers/gpu/drm/i915/gt/intel_migrate.c
@@ -647,17 +647,9 @@ static int scatter_list_length(struct scatterlist *sg)
 
 static void
 calculate_chunk_sz(struct drm_i915_private *i915, bool src_is_lmem,
-		   int *src_sz, int *ccs_sz, u32 bytes_to_cpy,
-		   u32 ccs_bytes_to_cpy)
+		   int *src_sz, u32 bytes_to_cpy, u32 ccs_bytes_to_cpy)
 {
 	if (ccs_bytes_to_cpy) {
-		/*
-		 * We can only copy the ccs data corresponding to
-		 * the CHUNK_SZ of lmem which is
-		 * GET_CCS_BYTES(i915, CHUNK_SZ))
-		 */
-		*ccs_sz = min_t(int, ccs_bytes_to_cpy, GET_CCS_BYTES(i915, CHUNK_SZ));
-
 		if (!src_is_lmem)
 			/*
 			 * When CHUNK_SZ is passed all the pages upto CHUNK_SZ
@@ -713,10 +705,10 @@ intel_context_migrate_copy(struct intel_context *ce,
 	struct drm_i915_private *i915 = ce->engine->i915;
 	u32 ccs_bytes_to_cpy = 0, bytes_to_cpy;
 	enum i915_cache_level ccs_cache_level;
-	int src_sz, dst_sz, ccs_sz;
 	u32 src_offset, dst_offset;
 	u8 src_access, dst_access;
 	struct i915_request *rq;
+	int src_sz, dst_sz;
 	bool ccs_is_src;
 	int err;
 
@@ -770,7 +762,7 @@ intel_context_migrate_copy(struct intel_context *ce,
 	}
 
 	do {
-		int len;
+		int len, ccs_sz;
 
 		rq = i915_request_create(ce);
 		if (IS_ERR(rq)) {
@@ -797,7 +789,7 @@ intel_context_migrate_copy(struct intel_context *ce,
 		if (err)
 			goto out_rq;
 
-		calculate_chunk_sz(i915, src_is_lmem, &src_sz, &ccs_sz,
+		calculate_chunk_sz(i915, src_is_lmem, &src_sz,
 				   bytes_to_cpy, ccs_bytes_to_cpy);
 
 		len = emit_pte(rq, &it_src, src_cache_level, src_is_lmem,
@@ -835,33 +827,29 @@ intel_context_migrate_copy(struct intel_context *ce,
 			if (err)
 				goto out_rq;
 
+			ccs_sz = GET_CCS_BYTES(i915, len);
 			err = emit_pte(rq, &it_ccs, ccs_cache_level, false,
 				       ccs_is_src ? src_offset : dst_offset,
 				       ccs_sz);
+			if (err < 0)
+				goto out_rq;
+			if (err < ccs_sz) {
+				err = -EINVAL;
+				goto out_rq;
+			}
 
 			err = rq->engine->emit_flush(rq, EMIT_INVALIDATE);
 			if (err)
 				goto out_rq;
 
-			/*
-			 * Using max of src_sz and dst_sz, as we need to
-			 * pass the lmem size corresponding to the ccs
-			 * blocks we need to handle.
-			 */
-			ccs_sz = max_t(int, ccs_is_src ? ccs_sz : src_sz,
-				       ccs_is_src ? dst_sz : ccs_sz);
-
 			err = emit_copy_ccs(rq, dst_offset, dst_access,
-					    src_offset, src_access, ccs_sz);
+					    src_offset, src_access, len);
 			if (err)
 				goto out_rq;
 
 			err = rq->engine->emit_flush(rq, EMIT_INVALIDATE);
 			if (err)
 				goto out_rq;
-
-			/* Converting back to ccs bytes */
-			ccs_sz = GET_CCS_BYTES(rq->engine->i915, ccs_sz);
 			ccs_bytes_to_cpy -= ccs_sz;
 		}
 
-- 
2.20.1


^ permalink raw reply related	[flat|nested] 20+ messages in thread

* [PATCH v2 3/4] drm/i915/gt: Document the eviction of the Flat-CCS objects
  2022-04-25 16:24 ` [Intel-gfx] " Ramalingam C
@ 2022-04-25 16:24   ` Ramalingam C
  -1 siblings, 0 replies; 20+ messages in thread
From: Ramalingam C @ 2022-04-25 16:24 UTC (permalink / raw)
  To: intel-gfx, dri-devel; +Cc: Hellstrom Thomas, Matthew Auld, Thomas Hellstrom

Capture the eviction details for Flat-CCS capable, lmem objects.

v2:
  Fix the Flat-ccs capbility of lmem obj with smem residency
  possibility [Thomas]

Signed-off-by: Ramalingam C <ramalingam.c@intel.com>
cc: Thomas Hellstrom <thomas.hellstrom@linux.intel.com>
cc: Matthew Auld <matthew.auld@intel.com>
---
 drivers/gpu/drm/i915/gt/intel_migrate.c | 23 ++++++++++++++---------
 1 file changed, 14 insertions(+), 9 deletions(-)

diff --git a/drivers/gpu/drm/i915/gt/intel_migrate.c b/drivers/gpu/drm/i915/gt/intel_migrate.c
index 463a6a14b5f9..930e0fd9795f 100644
--- a/drivers/gpu/drm/i915/gt/intel_migrate.c
+++ b/drivers/gpu/drm/i915/gt/intel_migrate.c
@@ -485,16 +485,21 @@ static bool wa_1209644611_applies(int ver, u32 size)
  * And CCS data can be copied in and out of CCS region through
  * XY_CTRL_SURF_COPY_BLT. CPU can't access the CCS data directly.
  *
- * When we exhaust the lmem, if the object's placements support smem, then we can
- * directly decompress the compressed lmem object into smem and start using it
- * from smem itself.
+ * I915 supports Flat-CCS on lmem only objects. When an objects has the smem in
+ * its preference list, on memory pressure, i915 needs to migarte the lmem
+ * content into smem. If the lmem object is Flat-CCS compressed by userspace,
+ * then i915 needs to decompress it. But I915 lack the required information
+ * for such decompression. Hence I915 supports Flat-CCS only on lmem only objects.
  *
- * But when we need to swapout the compressed lmem object into a smem region
- * though objects' placement doesn't support smem, then we copy the lmem content
- * as it is into smem region along with ccs data (using XY_CTRL_SURF_COPY_BLT).
- * When the object is referred, lmem content will be swaped in along with
- * restoration of the CCS data (using XY_CTRL_SURF_COPY_BLT) at corresponding
- * location.
+ * when we exhaust the lmem, Flat-CCS capable objects' lmem backing memory can
+ * be temporarily evicted to smem, along with the auxiliary CCS state, where
+ * it can be potentially swapped-out at a later point, if required.
+ * If userspace later touches the evicted pages, then we always move
+ * the backing memory back to lmem, which includes restoring the saved CCS state,
+ * and potentially performing any required swap-in.
+ *
+ * For the migration of the lmem objects with smem in placement list, such as
+ * {lmem, smem}, objects are treated as non Flat-CCS capable objects.
  */
 
 static inline u32 *i915_flush_dw(u32 *cmd, u32 flags)
-- 
2.20.1


^ permalink raw reply related	[flat|nested] 20+ messages in thread

* [Intel-gfx] [PATCH v2 3/4] drm/i915/gt: Document the eviction of the Flat-CCS objects
@ 2022-04-25 16:24   ` Ramalingam C
  0 siblings, 0 replies; 20+ messages in thread
From: Ramalingam C @ 2022-04-25 16:24 UTC (permalink / raw)
  To: intel-gfx, dri-devel; +Cc: Hellstrom Thomas, Matthew Auld, Thomas Hellstrom

Capture the eviction details for Flat-CCS capable, lmem objects.

v2:
  Fix the Flat-ccs capbility of lmem obj with smem residency
  possibility [Thomas]

Signed-off-by: Ramalingam C <ramalingam.c@intel.com>
cc: Thomas Hellstrom <thomas.hellstrom@linux.intel.com>
cc: Matthew Auld <matthew.auld@intel.com>
---
 drivers/gpu/drm/i915/gt/intel_migrate.c | 23 ++++++++++++++---------
 1 file changed, 14 insertions(+), 9 deletions(-)

diff --git a/drivers/gpu/drm/i915/gt/intel_migrate.c b/drivers/gpu/drm/i915/gt/intel_migrate.c
index 463a6a14b5f9..930e0fd9795f 100644
--- a/drivers/gpu/drm/i915/gt/intel_migrate.c
+++ b/drivers/gpu/drm/i915/gt/intel_migrate.c
@@ -485,16 +485,21 @@ static bool wa_1209644611_applies(int ver, u32 size)
  * And CCS data can be copied in and out of CCS region through
  * XY_CTRL_SURF_COPY_BLT. CPU can't access the CCS data directly.
  *
- * When we exhaust the lmem, if the object's placements support smem, then we can
- * directly decompress the compressed lmem object into smem and start using it
- * from smem itself.
+ * I915 supports Flat-CCS on lmem only objects. When an objects has the smem in
+ * its preference list, on memory pressure, i915 needs to migarte the lmem
+ * content into smem. If the lmem object is Flat-CCS compressed by userspace,
+ * then i915 needs to decompress it. But I915 lack the required information
+ * for such decompression. Hence I915 supports Flat-CCS only on lmem only objects.
  *
- * But when we need to swapout the compressed lmem object into a smem region
- * though objects' placement doesn't support smem, then we copy the lmem content
- * as it is into smem region along with ccs data (using XY_CTRL_SURF_COPY_BLT).
- * When the object is referred, lmem content will be swaped in along with
- * restoration of the CCS data (using XY_CTRL_SURF_COPY_BLT) at corresponding
- * location.
+ * when we exhaust the lmem, Flat-CCS capable objects' lmem backing memory can
+ * be temporarily evicted to smem, along with the auxiliary CCS state, where
+ * it can be potentially swapped-out at a later point, if required.
+ * If userspace later touches the evicted pages, then we always move
+ * the backing memory back to lmem, which includes restoring the saved CCS state,
+ * and potentially performing any required swap-in.
+ *
+ * For the migration of the lmem objects with smem in placement list, such as
+ * {lmem, smem}, objects are treated as non Flat-CCS capable objects.
  */
 
 static inline u32 *i915_flush_dw(u32 *cmd, u32 flags)
-- 
2.20.1


^ permalink raw reply related	[flat|nested] 20+ messages in thread

* [PATCH v2 4/4] uapi/drm/i915: Document memory residency and Flat-CCS capability of obj
  2022-04-25 16:24 ` [Intel-gfx] " Ramalingam C
@ 2022-04-25 16:24   ` Ramalingam C
  -1 siblings, 0 replies; 20+ messages in thread
From: Ramalingam C @ 2022-04-25 16:24 UTC (permalink / raw)
  To: intel-gfx, dri-devel; +Cc: Hellstrom Thomas, Matthew Auld, Thomas Hellstrom

Capture the impact of memory region preference list of an object, on
their memory residency and Flat-CCS capability of the objects.

v2:
  Fix the Flat-CCS capability of an obj with {lmem, smem} preference
  list [Thomas]

Signed-off-by: Ramalingam C <ramalingam.c@intel.com>
cc: Matthew Auld <matthew.auld@intel.com>
cc: Thomas Hellstrom <thomas.hellstrom@linux.intel.com>
---
 include/uapi/drm/i915_drm.h | 18 ++++++++++++++++++
 1 file changed, 18 insertions(+)

diff --git a/include/uapi/drm/i915_drm.h b/include/uapi/drm/i915_drm.h
index 35ca528803fd..ad191ed6547c 100644
--- a/include/uapi/drm/i915_drm.h
+++ b/include/uapi/drm/i915_drm.h
@@ -3393,6 +3393,24 @@ struct drm_i915_gem_create_ext {
  * At which point we get the object handle in &drm_i915_gem_create_ext.handle,
  * along with the final object size in &drm_i915_gem_create_ext.size, which
  * should account for any rounding up, if required.
+ *
+ * Objects with multiple memory regions in the preference list will be backed
+ * by one of the memory regions mentioned in the preference list. Though I915
+ * tries to honour the order of the memory regions in the preference list,
+ * based on the memory pressure of the regions, objects' backing region
+ * will be selected.
+ *
+ * Userspace has no means of knowing the backing region for such objects.
+ *
+ * On Flat-CCS capable HW, compression is supported for the objects residing
+ * in I915_MEMORY_CLASS_DEVICE. When such objects (compressed) has other
+ * memory class in preference list and migrated (by I915, due to memory
+ * constrain) to the non I915_MEMORY_CLASS_DEVICE region, then I915 needs to
+ * decompress the content. But I915 dont have the required information to
+ * decompress the userspace compressed objects.
+ *
+ * So I915 supports Flat-CCS, only on the objects which can reside only on
+ * I915_MEMORY_CLASS_DEVICE regions.
  */
 struct drm_i915_gem_create_ext_memory_regions {
 	/** @base: Extension link. See struct i915_user_extension. */
-- 
2.20.1


^ permalink raw reply related	[flat|nested] 20+ messages in thread

* [Intel-gfx] [PATCH v2 4/4] uapi/drm/i915: Document memory residency and Flat-CCS capability of obj
@ 2022-04-25 16:24   ` Ramalingam C
  0 siblings, 0 replies; 20+ messages in thread
From: Ramalingam C @ 2022-04-25 16:24 UTC (permalink / raw)
  To: intel-gfx, dri-devel; +Cc: Hellstrom Thomas, Matthew Auld, Thomas Hellstrom

Capture the impact of memory region preference list of an object, on
their memory residency and Flat-CCS capability of the objects.

v2:
  Fix the Flat-CCS capability of an obj with {lmem, smem} preference
  list [Thomas]

Signed-off-by: Ramalingam C <ramalingam.c@intel.com>
cc: Matthew Auld <matthew.auld@intel.com>
cc: Thomas Hellstrom <thomas.hellstrom@linux.intel.com>
---
 include/uapi/drm/i915_drm.h | 18 ++++++++++++++++++
 1 file changed, 18 insertions(+)

diff --git a/include/uapi/drm/i915_drm.h b/include/uapi/drm/i915_drm.h
index 35ca528803fd..ad191ed6547c 100644
--- a/include/uapi/drm/i915_drm.h
+++ b/include/uapi/drm/i915_drm.h
@@ -3393,6 +3393,24 @@ struct drm_i915_gem_create_ext {
  * At which point we get the object handle in &drm_i915_gem_create_ext.handle,
  * along with the final object size in &drm_i915_gem_create_ext.size, which
  * should account for any rounding up, if required.
+ *
+ * Objects with multiple memory regions in the preference list will be backed
+ * by one of the memory regions mentioned in the preference list. Though I915
+ * tries to honour the order of the memory regions in the preference list,
+ * based on the memory pressure of the regions, objects' backing region
+ * will be selected.
+ *
+ * Userspace has no means of knowing the backing region for such objects.
+ *
+ * On Flat-CCS capable HW, compression is supported for the objects residing
+ * in I915_MEMORY_CLASS_DEVICE. When such objects (compressed) has other
+ * memory class in preference list and migrated (by I915, due to memory
+ * constrain) to the non I915_MEMORY_CLASS_DEVICE region, then I915 needs to
+ * decompress the content. But I915 dont have the required information to
+ * decompress the userspace compressed objects.
+ *
+ * So I915 supports Flat-CCS, only on the objects which can reside only on
+ * I915_MEMORY_CLASS_DEVICE regions.
  */
 struct drm_i915_gem_create_ext_memory_regions {
 	/** @base: Extension link. See struct i915_user_extension. */
-- 
2.20.1


^ permalink raw reply related	[flat|nested] 20+ messages in thread

* [Intel-gfx] ✗ Fi.CI.SPARSE: warning for Flat-CCS eviction enhancements (rev3)
  2022-04-25 16:24 ` [Intel-gfx] " Ramalingam C
                   ` (4 preceding siblings ...)
  (?)
@ 2022-04-25 17:29 ` Patchwork
  -1 siblings, 0 replies; 20+ messages in thread
From: Patchwork @ 2022-04-25 17:29 UTC (permalink / raw)
  To: Ramalingam C; +Cc: intel-gfx

== Series Details ==

Series: Flat-CCS eviction enhancements (rev3)
URL   : https://patchwork.freedesktop.org/series/102916/
State : warning

== Summary ==

Error: dim sparse failed
Sparse version: v0.6.2
Fast mode used, each commit won't be checked separately.



^ permalink raw reply	[flat|nested] 20+ messages in thread

* [Intel-gfx] ✗ Fi.CI.BAT: failure for Flat-CCS eviction enhancements (rev3)
  2022-04-25 16:24 ` [Intel-gfx] " Ramalingam C
                   ` (5 preceding siblings ...)
  (?)
@ 2022-04-25 18:02 ` Patchwork
  -1 siblings, 0 replies; 20+ messages in thread
From: Patchwork @ 2022-04-25 18:02 UTC (permalink / raw)
  To: Ramalingam C; +Cc: intel-gfx

[-- Attachment #1: Type: text/plain, Size: 15614 bytes --]

== Series Details ==

Series: Flat-CCS eviction enhancements (rev3)
URL   : https://patchwork.freedesktop.org/series/102916/
State : failure

== Summary ==

CI Bug Log - changes from CI_DRM_11550 -> Patchwork_102916v3
====================================================

Summary
-------

  **FAILURE**

  Serious unknown changes coming with Patchwork_102916v3 absolutely need to be
  verified manually.
  
  If you think the reported changes have nothing to do with the changes
  introduced in Patchwork_102916v3, please notify your bug team to allow them
  to document this new failure mode, which will reduce false positives in CI.

  External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_102916v3/index.html

Participating hosts (43 -> 42)
------------------------------

  Additional (2): bat-dg2-8 bat-dg1-6 
  Missing    (3): fi-kbl-soraka fi-bsw-cyan bat-jsl-2 

Possible new issues
-------------------

  Here are the unknown changes that may have been introduced in Patchwork_102916v3:

### IGT changes ###

#### Possible regressions ####

  * igt@gem_exec_suspend@basic-s0@smem:
    - bat-dg1-6:          NOTRUN -> [INCOMPLETE][1]
   [1]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_102916v3/bat-dg1-6/igt@gem_exec_suspend@basic-s0@smem.html

  
#### Suppressed ####

  The following results come from untrusted machines, tests, or statuses.
  They do not affect the overall result.

  * igt@kms_pipe_crc_basic@compare-crc-sanitycheck-pipe-c:
    - {bat-dg2-8}:        NOTRUN -> [SKIP][2]
   [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_102916v3/bat-dg2-8/igt@kms_pipe_crc_basic@compare-crc-sanitycheck-pipe-c.html

  
Known issues
------------

  Here are the changes found in Patchwork_102916v3 that come from known issues:

### IGT changes ###

#### Issues hit ####

  * igt@gem_huc_copy@huc-copy:
    - fi-rkl-11600:       NOTRUN -> [SKIP][3] ([i915#2190])
   [3]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_102916v3/fi-rkl-11600/igt@gem_huc_copy@huc-copy.html

  * igt@gem_lmem_swapping@basic:
    - fi-rkl-11600:       NOTRUN -> [SKIP][4] ([i915#4613]) +3 similar issues
   [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_102916v3/fi-rkl-11600/igt@gem_lmem_swapping@basic.html

  * igt@gem_tiled_pread_basic:
    - fi-rkl-11600:       NOTRUN -> [SKIP][5] ([i915#3282])
   [5]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_102916v3/fi-rkl-11600/igt@gem_tiled_pread_basic.html

  * igt@i915_pm_backlight@basic-brightness:
    - fi-rkl-11600:       NOTRUN -> [SKIP][6] ([i915#3012])
   [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_102916v3/fi-rkl-11600/igt@i915_pm_backlight@basic-brightness.html

  * igt@kms_chamelium@dp-crc-fast:
    - fi-rkl-11600:       NOTRUN -> [SKIP][7] ([fdo#111827]) +8 similar issues
   [7]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_102916v3/fi-rkl-11600/igt@kms_chamelium@dp-crc-fast.html

  * igt@kms_cursor_legacy@basic-busy-flip-before-cursor-atomic:
    - fi-rkl-11600:       NOTRUN -> [SKIP][8] ([i915#4070] / [i915#4103]) +1 similar issue
   [8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_102916v3/fi-rkl-11600/igt@kms_cursor_legacy@basic-busy-flip-before-cursor-atomic.html

  * igt@kms_force_connector_basic@force-load-detect:
    - fi-rkl-11600:       NOTRUN -> [SKIP][9] ([fdo#109285] / [i915#4098])
   [9]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_102916v3/fi-rkl-11600/igt@kms_force_connector_basic@force-load-detect.html

  * igt@kms_pipe_crc_basic@compare-crc-sanitycheck-pipe-b:
    - fi-cfl-8109u:       [PASS][10] -> [DMESG-WARN][11] ([i915#62]) +12 similar issues
   [10]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11550/fi-cfl-8109u/igt@kms_pipe_crc_basic@compare-crc-sanitycheck-pipe-b.html
   [11]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_102916v3/fi-cfl-8109u/igt@kms_pipe_crc_basic@compare-crc-sanitycheck-pipe-b.html

  * igt@kms_pipe_crc_basic@compare-crc-sanitycheck-pipe-d:
    - fi-rkl-11600:       NOTRUN -> [SKIP][12] ([i915#4070] / [i915#533])
   [12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_102916v3/fi-rkl-11600/igt@kms_pipe_crc_basic@compare-crc-sanitycheck-pipe-d.html

  * igt@kms_pipe_crc_basic@suspend-read-crc-pipe-a:
    - fi-skl-6700k2:      [PASS][13] -> [INCOMPLETE][14] ([i915#4444])
   [13]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11550/fi-skl-6700k2/igt@kms_pipe_crc_basic@suspend-read-crc-pipe-a.html
   [14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_102916v3/fi-skl-6700k2/igt@kms_pipe_crc_basic@suspend-read-crc-pipe-a.html

  * igt@kms_psr@primary_mmap_gtt:
    - fi-rkl-11600:       NOTRUN -> [SKIP][15] ([i915#1072]) +3 similar issues
   [15]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_102916v3/fi-rkl-11600/igt@kms_psr@primary_mmap_gtt.html

  * igt@kms_setmode@basic-clone-single-crtc:
    - fi-rkl-11600:       NOTRUN -> [SKIP][16] ([i915#3555] / [i915#4098])
   [16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_102916v3/fi-rkl-11600/igt@kms_setmode@basic-clone-single-crtc.html

  * igt@prime_vgem@basic-userptr:
    - fi-rkl-11600:       NOTRUN -> [SKIP][17] ([i915#3301] / [i915#3708])
   [17]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_102916v3/fi-rkl-11600/igt@prime_vgem@basic-userptr.html

  * igt@prime_vgem@basic-write:
    - fi-rkl-11600:       NOTRUN -> [SKIP][18] ([i915#3291] / [i915#3708]) +2 similar issues
   [18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_102916v3/fi-rkl-11600/igt@prime_vgem@basic-write.html

  
#### Possible fixes ####

  * igt@gem_exec_suspend@basic-s3@smem:
    - fi-rkl-11600:       [INCOMPLETE][19] ([i915#5127]) -> [PASS][20]
   [19]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11550/fi-rkl-11600/igt@gem_exec_suspend@basic-s3@smem.html
   [20]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_102916v3/fi-rkl-11600/igt@gem_exec_suspend@basic-s3@smem.html

  * igt@i915_selftest@live@gt_heartbeat:
    - fi-cfl-guc:         [DMESG-FAIL][21] ([i915#5334]) -> [PASS][22]
   [21]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11550/fi-cfl-guc/igt@i915_selftest@live@gt_heartbeat.html
   [22]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_102916v3/fi-cfl-guc/igt@i915_selftest@live@gt_heartbeat.html

  * igt@i915_selftest@live@hangcheck:
    - fi-hsw-4770:        [INCOMPLETE][23] ([i915#4785]) -> [PASS][24]
   [23]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11550/fi-hsw-4770/igt@i915_selftest@live@hangcheck.html
   [24]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_102916v3/fi-hsw-4770/igt@i915_selftest@live@hangcheck.html
    - fi-snb-2600:        [INCOMPLETE][25] ([i915#3921]) -> [PASS][26]
   [25]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11550/fi-snb-2600/igt@i915_selftest@live@hangcheck.html
   [26]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_102916v3/fi-snb-2600/igt@i915_selftest@live@hangcheck.html

  * igt@kms_busy@basic@flip:
    - {bat-adlp-6}:       [DMESG-WARN][27] ([i915#3576]) -> [PASS][28] +1 similar issue
   [27]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11550/bat-adlp-6/igt@kms_busy@basic@flip.html
   [28]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_102916v3/bat-adlp-6/igt@kms_busy@basic@flip.html

  
#### Warnings ####

  * igt@kms_pipe_crc_basic@compare-crc-sanitycheck-pipe-c:
    - fi-kbl-7567u:       [SKIP][29] ([fdo#109271] / [i915#5341]) -> [SKIP][30] ([fdo#109271])
   [29]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11550/fi-kbl-7567u/igt@kms_pipe_crc_basic@compare-crc-sanitycheck-pipe-c.html
   [30]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_102916v3/fi-kbl-7567u/igt@kms_pipe_crc_basic@compare-crc-sanitycheck-pipe-c.html
    - fi-pnv-d510:        [SKIP][31] ([fdo#109271] / [i915#5341]) -> [SKIP][32] ([fdo#109271])
   [31]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11550/fi-pnv-d510/igt@kms_pipe_crc_basic@compare-crc-sanitycheck-pipe-c.html
   [32]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_102916v3/fi-pnv-d510/igt@kms_pipe_crc_basic@compare-crc-sanitycheck-pipe-c.html
    - fi-snb-2520m:       [SKIP][33] ([fdo#109271] / [i915#5341]) -> [SKIP][34] ([fdo#109271])
   [33]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11550/fi-snb-2520m/igt@kms_pipe_crc_basic@compare-crc-sanitycheck-pipe-c.html
   [34]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_102916v3/fi-snb-2520m/igt@kms_pipe_crc_basic@compare-crc-sanitycheck-pipe-c.html
    - fi-bsw-kefka:       [SKIP][35] ([fdo#109271] / [i915#5341]) -> [SKIP][36] ([fdo#109271])
   [35]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11550/fi-bsw-kefka/igt@kms_pipe_crc_basic@compare-crc-sanitycheck-pipe-c.html
   [36]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_102916v3/fi-bsw-kefka/igt@kms_pipe_crc_basic@compare-crc-sanitycheck-pipe-c.html
    - fi-kbl-8809g:       [SKIP][37] ([fdo#109271] / [i915#5341]) -> [SKIP][38] ([fdo#109271])
   [37]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11550/fi-kbl-8809g/igt@kms_pipe_crc_basic@compare-crc-sanitycheck-pipe-c.html
   [38]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_102916v3/fi-kbl-8809g/igt@kms_pipe_crc_basic@compare-crc-sanitycheck-pipe-c.html
    - fi-bsw-nick:        [SKIP][39] ([fdo#109271] / [i915#5341]) -> [SKIP][40] ([fdo#109271])
   [39]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11550/fi-bsw-nick/igt@kms_pipe_crc_basic@compare-crc-sanitycheck-pipe-c.html
   [40]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_102916v3/fi-bsw-nick/igt@kms_pipe_crc_basic@compare-crc-sanitycheck-pipe-c.html
    - fi-bwr-2160:        [SKIP][41] ([fdo#109271] / [i915#5341]) -> [SKIP][42] ([fdo#109271])
   [41]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11550/fi-bwr-2160/igt@kms_pipe_crc_basic@compare-crc-sanitycheck-pipe-c.html
   [42]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_102916v3/fi-bwr-2160/igt@kms_pipe_crc_basic@compare-crc-sanitycheck-pipe-c.html
    - fi-snb-2600:        [SKIP][43] ([fdo#109271] / [i915#5341]) -> [SKIP][44] ([fdo#109271])
   [43]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11550/fi-snb-2600/igt@kms_pipe_crc_basic@compare-crc-sanitycheck-pipe-c.html
   [44]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_102916v3/fi-snb-2600/igt@kms_pipe_crc_basic@compare-crc-sanitycheck-pipe-c.html
    - fi-elk-e7500:       [SKIP][45] ([fdo#109271] / [i915#5341]) -> [SKIP][46] ([fdo#109271])
   [45]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11550/fi-elk-e7500/igt@kms_pipe_crc_basic@compare-crc-sanitycheck-pipe-c.html
   [46]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_102916v3/fi-elk-e7500/igt@kms_pipe_crc_basic@compare-crc-sanitycheck-pipe-c.html
    - fi-blb-e6850:       [SKIP][47] ([fdo#109271] / [i915#5341]) -> [SKIP][48] ([fdo#109271])
   [47]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11550/fi-blb-e6850/igt@kms_pipe_crc_basic@compare-crc-sanitycheck-pipe-c.html
   [48]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_102916v3/fi-blb-e6850/igt@kms_pipe_crc_basic@compare-crc-sanitycheck-pipe-c.html
    - fi-ilk-650:         [SKIP][49] ([fdo#109271] / [i915#5341]) -> [SKIP][50] ([fdo#109271])
   [49]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11550/fi-ilk-650/igt@kms_pipe_crc_basic@compare-crc-sanitycheck-pipe-c.html
   [50]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_102916v3/fi-ilk-650/igt@kms_pipe_crc_basic@compare-crc-sanitycheck-pipe-c.html

  
  {name}: This element is suppressed. This means it is ignored when computing
          the status of the difference (SUCCESS, WARNING, or FAILURE).

  [fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
  [fdo#109285]: https://bugs.freedesktop.org/show_bug.cgi?id=109285
  [fdo#111827]: https://bugs.freedesktop.org/show_bug.cgi?id=111827
  [i915#1072]: https://gitlab.freedesktop.org/drm/intel/issues/1072
  [i915#1155]: https://gitlab.freedesktop.org/drm/intel/issues/1155
  [i915#2190]: https://gitlab.freedesktop.org/drm/intel/issues/2190
  [i915#2582]: https://gitlab.freedesktop.org/drm/intel/issues/2582
  [i915#3012]: https://gitlab.freedesktop.org/drm/intel/issues/3012
  [i915#3282]: https://gitlab.freedesktop.org/drm/intel/issues/3282
  [i915#3291]: https://gitlab.freedesktop.org/drm/intel/issues/3291
  [i915#3301]: https://gitlab.freedesktop.org/drm/intel/issues/3301
  [i915#3555]: https://gitlab.freedesktop.org/drm/intel/issues/3555
  [i915#3576]: https://gitlab.freedesktop.org/drm/intel/issues/3576
  [i915#3595]: https://gitlab.freedesktop.org/drm/intel/issues/3595
  [i915#3708]: https://gitlab.freedesktop.org/drm/intel/issues/3708
  [i915#3921]: https://gitlab.freedesktop.org/drm/intel/issues/3921
  [i915#4070]: https://gitlab.freedesktop.org/drm/intel/issues/4070
  [i915#4077]: https://gitlab.freedesktop.org/drm/intel/issues/4077
  [i915#4079]: https://gitlab.freedesktop.org/drm/intel/issues/4079
  [i915#4083]: https://gitlab.freedesktop.org/drm/intel/issues/4083
  [i915#4098]: https://gitlab.freedesktop.org/drm/intel/issues/4098
  [i915#4103]: https://gitlab.freedesktop.org/drm/intel/issues/4103
  [i915#4212]: https://gitlab.freedesktop.org/drm/intel/issues/4212
  [i915#4213]: https://gitlab.freedesktop.org/drm/intel/issues/4213
  [i915#4215]: https://gitlab.freedesktop.org/drm/intel/issues/4215
  [i915#4312]: https://gitlab.freedesktop.org/drm/intel/issues/4312
  [i915#4391]: https://gitlab.freedesktop.org/drm/intel/issues/4391
  [i915#4444]: https://gitlab.freedesktop.org/drm/intel/issues/4444
  [i915#4613]: https://gitlab.freedesktop.org/drm/intel/issues/4613
  [i915#4785]: https://gitlab.freedesktop.org/drm/intel/issues/4785
  [i915#4873]: https://gitlab.freedesktop.org/drm/intel/issues/4873
  [i915#4983]: https://gitlab.freedesktop.org/drm/intel/issues/4983
  [i915#5127]: https://gitlab.freedesktop.org/drm/intel/issues/5127
  [i915#5153]: https://gitlab.freedesktop.org/drm/intel/issues/5153
  [i915#5190]: https://gitlab.freedesktop.org/drm/intel/issues/5190
  [i915#5270]: https://gitlab.freedesktop.org/drm/intel/issues/5270
  [i915#5274]: https://gitlab.freedesktop.org/drm/intel/issues/5274
  [i915#5275]: https://gitlab.freedesktop.org/drm/intel/issues/5275
  [i915#5329]: https://gitlab.freedesktop.org/drm/intel/issues/5329
  [i915#533]: https://gitlab.freedesktop.org/drm/intel/issues/533
  [i915#5334]: https://gitlab.freedesktop.org/drm/intel/issues/5334
  [i915#5338]: https://gitlab.freedesktop.org/drm/intel/issues/5338
  [i915#5341]: https://gitlab.freedesktop.org/drm/intel/issues/5341
  [i915#5354]: https://gitlab.freedesktop.org/drm/intel/issues/5354
  [i915#5356]: https://gitlab.freedesktop.org/drm/intel/issues/5356
  [i915#5537]: https://gitlab.freedesktop.org/drm/intel/issues/5537
  [i915#5763]: https://gitlab.freedesktop.org/drm/intel/issues/5763
  [i915#62]: https://gitlab.freedesktop.org/drm/intel/issues/62


Build changes
-------------

  * Linux: CI_DRM_11550 -> Patchwork_102916v3

  CI-20190529: 20190529
  CI_DRM_11550: 56b089ae03ef8ea8ab7f474eaa70367898891ef0 @ git://anongit.freedesktop.org/gfx-ci/linux
  IGT_6451: f055bd83bd831a938d639718c2359516224f15f9 @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
  Patchwork_102916v3: 56b089ae03ef8ea8ab7f474eaa70367898891ef0 @ git://anongit.freedesktop.org/gfx-ci/linux


### Linux commits

9755280b9017 uapi/drm/i915: Document memory residency and Flat-CCS capability of obj
0d25486db78f drm/i915/gt: Document the eviction of the Flat-CCS objects
d6505d529141 drm/i915/gt: optimize the ccs_sz calculation per chunk
51edb005dc93 drm/i915/gt: GEM_BUG_ON unexpected NULL at scatterlist walking

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_102916v3/index.html

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^ permalink raw reply	[flat|nested] 20+ messages in thread

* Re: [PATCH v2 3/4] drm/i915/gt: Document the eviction of the Flat-CCS objects
  2022-04-25 16:24   ` [Intel-gfx] " Ramalingam C
@ 2022-04-27 16:29     ` Matthew Auld
  -1 siblings, 0 replies; 20+ messages in thread
From: Matthew Auld @ 2022-04-27 16:29 UTC (permalink / raw)
  To: Ramalingam C, intel-gfx, dri-devel; +Cc: Thomas Hellstrom, Hellstrom Thomas

On 25/04/2022 17:24, Ramalingam C wrote:
> Capture the eviction details for Flat-CCS capable, lmem objects.
> 
> v2:
>    Fix the Flat-ccs capbility of lmem obj with smem residency
>    possibility [Thomas]
> 
> Signed-off-by: Ramalingam C <ramalingam.c@intel.com>
> cc: Thomas Hellstrom <thomas.hellstrom@linux.intel.com>
> cc: Matthew Auld <matthew.auld@intel.com>
> ---
>   drivers/gpu/drm/i915/gt/intel_migrate.c | 23 ++++++++++++++---------
>   1 file changed, 14 insertions(+), 9 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/gt/intel_migrate.c b/drivers/gpu/drm/i915/gt/intel_migrate.c
> index 463a6a14b5f9..930e0fd9795f 100644
> --- a/drivers/gpu/drm/i915/gt/intel_migrate.c
> +++ b/drivers/gpu/drm/i915/gt/intel_migrate.c
> @@ -485,16 +485,21 @@ static bool wa_1209644611_applies(int ver, u32 size)
>    * And CCS data can be copied in and out of CCS region through
>    * XY_CTRL_SURF_COPY_BLT. CPU can't access the CCS data directly.
>    *
> - * When we exhaust the lmem, if the object's placements support smem, then we can
> - * directly decompress the compressed lmem object into smem and start using it
> - * from smem itself.
> + * I915 supports Flat-CCS on lmem only objects. When an objects has the smem in

"When an object has smem in"

> + * its preference list, on memory pressure, i915 needs to migarte the lmem

"migrate"

> + * content into smem. If the lmem object is Flat-CCS compressed by userspace,
> + * then i915 needs to decompress it. But I915 lack the required information
> + * for such decompression. Hence I915 supports Flat-CCS only on lmem only objects.
>    *
> - * But when we need to swapout the compressed lmem object into a smem region
> - * though objects' placement doesn't support smem, then we copy the lmem content
> - * as it is into smem region along with ccs data (using XY_CTRL_SURF_COPY_BLT).
> - * When the object is referred, lmem content will be swaped in along with
> - * restoration of the CCS data (using XY_CTRL_SURF_COPY_BLT) at corresponding
> - * location.
> + * when we exhaust the lmem, Flat-CCS capable objects' lmem backing memory can

"When"

Otherwise,
Reviewed-by: Matthew Auld <matthew.auld@intel.com>

> + * be temporarily evicted to smem, along with the auxiliary CCS state, where
> + * it can be potentially swapped-out at a later point, if required.
> + * If userspace later touches the evicted pages, then we always move
> + * the backing memory back to lmem, which includes restoring the saved CCS state,
> + * and potentially performing any required swap-in.
> + *
> + * For the migration of the lmem objects with smem in placement list, such as
> + * {lmem, smem}, objects are treated as non Flat-CCS capable objects.
>    */
>   
>   static inline u32 *i915_flush_dw(u32 *cmd, u32 flags)

^ permalink raw reply	[flat|nested] 20+ messages in thread

* Re: [Intel-gfx] [PATCH v2 3/4] drm/i915/gt: Document the eviction of the Flat-CCS objects
@ 2022-04-27 16:29     ` Matthew Auld
  0 siblings, 0 replies; 20+ messages in thread
From: Matthew Auld @ 2022-04-27 16:29 UTC (permalink / raw)
  To: Ramalingam C, intel-gfx, dri-devel; +Cc: Thomas Hellstrom, Hellstrom Thomas

On 25/04/2022 17:24, Ramalingam C wrote:
> Capture the eviction details for Flat-CCS capable, lmem objects.
> 
> v2:
>    Fix the Flat-ccs capbility of lmem obj with smem residency
>    possibility [Thomas]
> 
> Signed-off-by: Ramalingam C <ramalingam.c@intel.com>
> cc: Thomas Hellstrom <thomas.hellstrom@linux.intel.com>
> cc: Matthew Auld <matthew.auld@intel.com>
> ---
>   drivers/gpu/drm/i915/gt/intel_migrate.c | 23 ++++++++++++++---------
>   1 file changed, 14 insertions(+), 9 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/gt/intel_migrate.c b/drivers/gpu/drm/i915/gt/intel_migrate.c
> index 463a6a14b5f9..930e0fd9795f 100644
> --- a/drivers/gpu/drm/i915/gt/intel_migrate.c
> +++ b/drivers/gpu/drm/i915/gt/intel_migrate.c
> @@ -485,16 +485,21 @@ static bool wa_1209644611_applies(int ver, u32 size)
>    * And CCS data can be copied in and out of CCS region through
>    * XY_CTRL_SURF_COPY_BLT. CPU can't access the CCS data directly.
>    *
> - * When we exhaust the lmem, if the object's placements support smem, then we can
> - * directly decompress the compressed lmem object into smem and start using it
> - * from smem itself.
> + * I915 supports Flat-CCS on lmem only objects. When an objects has the smem in

"When an object has smem in"

> + * its preference list, on memory pressure, i915 needs to migarte the lmem

"migrate"

> + * content into smem. If the lmem object is Flat-CCS compressed by userspace,
> + * then i915 needs to decompress it. But I915 lack the required information
> + * for such decompression. Hence I915 supports Flat-CCS only on lmem only objects.
>    *
> - * But when we need to swapout the compressed lmem object into a smem region
> - * though objects' placement doesn't support smem, then we copy the lmem content
> - * as it is into smem region along with ccs data (using XY_CTRL_SURF_COPY_BLT).
> - * When the object is referred, lmem content will be swaped in along with
> - * restoration of the CCS data (using XY_CTRL_SURF_COPY_BLT) at corresponding
> - * location.
> + * when we exhaust the lmem, Flat-CCS capable objects' lmem backing memory can

"When"

Otherwise,
Reviewed-by: Matthew Auld <matthew.auld@intel.com>

> + * be temporarily evicted to smem, along with the auxiliary CCS state, where
> + * it can be potentially swapped-out at a later point, if required.
> + * If userspace later touches the evicted pages, then we always move
> + * the backing memory back to lmem, which includes restoring the saved CCS state,
> + * and potentially performing any required swap-in.
> + *
> + * For the migration of the lmem objects with smem in placement list, such as
> + * {lmem, smem}, objects are treated as non Flat-CCS capable objects.
>    */
>   
>   static inline u32 *i915_flush_dw(u32 *cmd, u32 flags)

^ permalink raw reply	[flat|nested] 20+ messages in thread

* Re: [PATCH v2 4/4] uapi/drm/i915: Document memory residency and Flat-CCS capability of obj
  2022-04-25 16:24   ` [Intel-gfx] " Ramalingam C
@ 2022-04-27 17:09     ` Matthew Auld
  -1 siblings, 0 replies; 20+ messages in thread
From: Matthew Auld @ 2022-04-27 17:09 UTC (permalink / raw)
  To: Ramalingam C, intel-gfx, dri-devel; +Cc: Thomas Hellstrom, Hellstrom Thomas

On 25/04/2022 17:24, Ramalingam C wrote:
> Capture the impact of memory region preference list of an object, on
> their memory residency and Flat-CCS capability of the objects.
> 
> v2:
>    Fix the Flat-CCS capability of an obj with {lmem, smem} preference
>    list [Thomas]
> 
> Signed-off-by: Ramalingam C <ramalingam.c@intel.com>
> cc: Matthew Auld <matthew.auld@intel.com>
> cc: Thomas Hellstrom <thomas.hellstrom@linux.intel.com>
> ---
>   include/uapi/drm/i915_drm.h | 18 ++++++++++++++++++
>   1 file changed, 18 insertions(+)
> 
> diff --git a/include/uapi/drm/i915_drm.h b/include/uapi/drm/i915_drm.h
> index 35ca528803fd..ad191ed6547c 100644
> --- a/include/uapi/drm/i915_drm.h
> +++ b/include/uapi/drm/i915_drm.h
> @@ -3393,6 +3393,24 @@ struct drm_i915_gem_create_ext {
>    * At which point we get the object handle in &drm_i915_gem_create_ext.handle,
>    * along with the final object size in &drm_i915_gem_create_ext.size, which
>    * should account for any rounding up, if required.
> + *
> + * Objects with multiple memory regions in the preference list will be backed
> + * by one of the memory regions mentioned in the preference list. Though I915
> + * tries to honour the order of the memory regions in the preference list,
> + * based on the memory pressure of the regions, objects' backing region
> + * will be selected.
> + *
> + * Userspace has no means of knowing the backing region for such objects.

"Note that userspace has no means of knowing the current backing region 
for objects where @num_regions is larger than one. The kernel will only 
ensure that the priority order of the @regions array is honoured, either 
when initially placing the object, or when moving memory around due to 
memory pressure."

> + *
> + * On Flat-CCS capable HW, compression is supported for the objects residing
> + * in I915_MEMORY_CLASS_DEVICE. When such objects (compressed) has other
> + * memory class in preference list and migrated (by I915, due to memory
> + * constrain) to the non I915_MEMORY_CLASS_DEVICE region, then I915 needs to
> + * decompress the content. But I915 dont have the required information to

"doesn't", also prefer @regions etc instead of "preference list"

Anyway,
Reviewed-by: Matthew Auld <matthew.auld@intel.com>

> + * decompress the userspace compressed objects.
> + *
> + * So I915 supports Flat-CCS, only on the objects which can reside only on
> + * I915_MEMORY_CLASS_DEVICE regions. >    */
>   struct drm_i915_gem_create_ext_memory_regions {
>   	/** @base: Extension link. See struct i915_user_extension. */

^ permalink raw reply	[flat|nested] 20+ messages in thread

* Re: [Intel-gfx] [PATCH v2 4/4] uapi/drm/i915: Document memory residency and Flat-CCS capability of obj
@ 2022-04-27 17:09     ` Matthew Auld
  0 siblings, 0 replies; 20+ messages in thread
From: Matthew Auld @ 2022-04-27 17:09 UTC (permalink / raw)
  To: Ramalingam C, intel-gfx, dri-devel; +Cc: Thomas Hellstrom, Hellstrom Thomas

On 25/04/2022 17:24, Ramalingam C wrote:
> Capture the impact of memory region preference list of an object, on
> their memory residency and Flat-CCS capability of the objects.
> 
> v2:
>    Fix the Flat-CCS capability of an obj with {lmem, smem} preference
>    list [Thomas]
> 
> Signed-off-by: Ramalingam C <ramalingam.c@intel.com>
> cc: Matthew Auld <matthew.auld@intel.com>
> cc: Thomas Hellstrom <thomas.hellstrom@linux.intel.com>
> ---
>   include/uapi/drm/i915_drm.h | 18 ++++++++++++++++++
>   1 file changed, 18 insertions(+)
> 
> diff --git a/include/uapi/drm/i915_drm.h b/include/uapi/drm/i915_drm.h
> index 35ca528803fd..ad191ed6547c 100644
> --- a/include/uapi/drm/i915_drm.h
> +++ b/include/uapi/drm/i915_drm.h
> @@ -3393,6 +3393,24 @@ struct drm_i915_gem_create_ext {
>    * At which point we get the object handle in &drm_i915_gem_create_ext.handle,
>    * along with the final object size in &drm_i915_gem_create_ext.size, which
>    * should account for any rounding up, if required.
> + *
> + * Objects with multiple memory regions in the preference list will be backed
> + * by one of the memory regions mentioned in the preference list. Though I915
> + * tries to honour the order of the memory regions in the preference list,
> + * based on the memory pressure of the regions, objects' backing region
> + * will be selected.
> + *
> + * Userspace has no means of knowing the backing region for such objects.

"Note that userspace has no means of knowing the current backing region 
for objects where @num_regions is larger than one. The kernel will only 
ensure that the priority order of the @regions array is honoured, either 
when initially placing the object, or when moving memory around due to 
memory pressure."

> + *
> + * On Flat-CCS capable HW, compression is supported for the objects residing
> + * in I915_MEMORY_CLASS_DEVICE. When such objects (compressed) has other
> + * memory class in preference list and migrated (by I915, due to memory
> + * constrain) to the non I915_MEMORY_CLASS_DEVICE region, then I915 needs to
> + * decompress the content. But I915 dont have the required information to

"doesn't", also prefer @regions etc instead of "preference list"

Anyway,
Reviewed-by: Matthew Auld <matthew.auld@intel.com>

> + * decompress the userspace compressed objects.
> + *
> + * So I915 supports Flat-CCS, only on the objects which can reside only on
> + * I915_MEMORY_CLASS_DEVICE regions. >    */
>   struct drm_i915_gem_create_ext_memory_regions {
>   	/** @base: Extension link. See struct i915_user_extension. */

^ permalink raw reply	[flat|nested] 20+ messages in thread

* Re: [PATCH v2 2/4] drm/i915/gt: optimize the ccs_sz calculation per chunk
  2022-04-25 16:24   ` [Intel-gfx] " Ramalingam C
@ 2022-04-27 19:24     ` Matthew Auld
  -1 siblings, 0 replies; 20+ messages in thread
From: Matthew Auld @ 2022-04-27 19:24 UTC (permalink / raw)
  To: Ramalingam C, intel-gfx, dri-devel; +Cc: Hellstrom Thomas

On 25/04/2022 17:24, Ramalingam C wrote:
> Calculate the ccs_sz that needs to be emitted based on the src
> and dst pages emitted per chunk. And handle the return value of emit_pte
> for the ccs pages.
> 
> Signed-off-by: Ramalingam C <ramalingam.c@intel.com>
> ---
>   drivers/gpu/drm/i915/gt/intel_migrate.c | 36 +++++++++----------------
>   1 file changed, 12 insertions(+), 24 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/gt/intel_migrate.c b/drivers/gpu/drm/i915/gt/intel_migrate.c
> index 29d761da02c4..463a6a14b5f9 100644
> --- a/drivers/gpu/drm/i915/gt/intel_migrate.c
> +++ b/drivers/gpu/drm/i915/gt/intel_migrate.c
> @@ -647,17 +647,9 @@ static int scatter_list_length(struct scatterlist *sg)
>   
>   static void
>   calculate_chunk_sz(struct drm_i915_private *i915, bool src_is_lmem,
> -		   int *src_sz, int *ccs_sz, u32 bytes_to_cpy,
> -		   u32 ccs_bytes_to_cpy)
> +		   int *src_sz, u32 bytes_to_cpy, u32 ccs_bytes_to_cpy)
>   {
>   	if (ccs_bytes_to_cpy) {
> -		/*
> -		 * We can only copy the ccs data corresponding to
> -		 * the CHUNK_SZ of lmem which is
> -		 * GET_CCS_BYTES(i915, CHUNK_SZ))
> -		 */
> -		*ccs_sz = min_t(int, ccs_bytes_to_cpy, GET_CCS_BYTES(i915, CHUNK_SZ));
> -
>   		if (!src_is_lmem)
>   			/*
>   			 * When CHUNK_SZ is passed all the pages upto CHUNK_SZ
> @@ -713,10 +705,10 @@ intel_context_migrate_copy(struct intel_context *ce,
>   	struct drm_i915_private *i915 = ce->engine->i915;
>   	u32 ccs_bytes_to_cpy = 0, bytes_to_cpy;
>   	enum i915_cache_level ccs_cache_level;
> -	int src_sz, dst_sz, ccs_sz;
>   	u32 src_offset, dst_offset;
>   	u8 src_access, dst_access;
>   	struct i915_request *rq;
> +	int src_sz, dst_sz;
>   	bool ccs_is_src;
>   	int err;
>   
> @@ -770,7 +762,7 @@ intel_context_migrate_copy(struct intel_context *ce,
>   	}
>   
>   	do {
> -		int len;
> +		int len, ccs_sz;

This could be moved into the reduced scope below.

Reviewed-by: Matthew Auld <matthew.auld@intel.com>

>   
>   		rq = i915_request_create(ce);
>   		if (IS_ERR(rq)) {
> @@ -797,7 +789,7 @@ intel_context_migrate_copy(struct intel_context *ce,
>   		if (err)
>   			goto out_rq;
>   
> -		calculate_chunk_sz(i915, src_is_lmem, &src_sz, &ccs_sz,
> +		calculate_chunk_sz(i915, src_is_lmem, &src_sz,
>   				   bytes_to_cpy, ccs_bytes_to_cpy);
>   
>   		len = emit_pte(rq, &it_src, src_cache_level, src_is_lmem,
> @@ -835,33 +827,29 @@ intel_context_migrate_copy(struct intel_context *ce,
>   			if (err)
>   				goto out_rq;
>   
> +			ccs_sz = GET_CCS_BYTES(i915, len);
>   			err = emit_pte(rq, &it_ccs, ccs_cache_level, false,
>   				       ccs_is_src ? src_offset : dst_offset,
>   				       ccs_sz);
> +			if (err < 0)
> +				goto out_rq;
> +			if (err < ccs_sz) {
> +				err = -EINVAL;
> +				goto out_rq;
> +			}
>   
>   			err = rq->engine->emit_flush(rq, EMIT_INVALIDATE);
>   			if (err)
>   				goto out_rq;
>   
> -			/*
> -			 * Using max of src_sz and dst_sz, as we need to
> -			 * pass the lmem size corresponding to the ccs
> -			 * blocks we need to handle.
> -			 */
> -			ccs_sz = max_t(int, ccs_is_src ? ccs_sz : src_sz,
> -				       ccs_is_src ? dst_sz : ccs_sz);
> -
>   			err = emit_copy_ccs(rq, dst_offset, dst_access,
> -					    src_offset, src_access, ccs_sz);
> +					    src_offset, src_access, len);
>   			if (err)
>   				goto out_rq;
>   
>   			err = rq->engine->emit_flush(rq, EMIT_INVALIDATE);
>   			if (err)
>   				goto out_rq;
> -
> -			/* Converting back to ccs bytes */
> -			ccs_sz = GET_CCS_BYTES(rq->engine->i915, ccs_sz);
>   			ccs_bytes_to_cpy -= ccs_sz;
>   		}
>   

^ permalink raw reply	[flat|nested] 20+ messages in thread

* Re: [Intel-gfx] [PATCH v2 2/4] drm/i915/gt: optimize the ccs_sz calculation per chunk
@ 2022-04-27 19:24     ` Matthew Auld
  0 siblings, 0 replies; 20+ messages in thread
From: Matthew Auld @ 2022-04-27 19:24 UTC (permalink / raw)
  To: Ramalingam C, intel-gfx, dri-devel; +Cc: Hellstrom Thomas

On 25/04/2022 17:24, Ramalingam C wrote:
> Calculate the ccs_sz that needs to be emitted based on the src
> and dst pages emitted per chunk. And handle the return value of emit_pte
> for the ccs pages.
> 
> Signed-off-by: Ramalingam C <ramalingam.c@intel.com>
> ---
>   drivers/gpu/drm/i915/gt/intel_migrate.c | 36 +++++++++----------------
>   1 file changed, 12 insertions(+), 24 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/gt/intel_migrate.c b/drivers/gpu/drm/i915/gt/intel_migrate.c
> index 29d761da02c4..463a6a14b5f9 100644
> --- a/drivers/gpu/drm/i915/gt/intel_migrate.c
> +++ b/drivers/gpu/drm/i915/gt/intel_migrate.c
> @@ -647,17 +647,9 @@ static int scatter_list_length(struct scatterlist *sg)
>   
>   static void
>   calculate_chunk_sz(struct drm_i915_private *i915, bool src_is_lmem,
> -		   int *src_sz, int *ccs_sz, u32 bytes_to_cpy,
> -		   u32 ccs_bytes_to_cpy)
> +		   int *src_sz, u32 bytes_to_cpy, u32 ccs_bytes_to_cpy)
>   {
>   	if (ccs_bytes_to_cpy) {
> -		/*
> -		 * We can only copy the ccs data corresponding to
> -		 * the CHUNK_SZ of lmem which is
> -		 * GET_CCS_BYTES(i915, CHUNK_SZ))
> -		 */
> -		*ccs_sz = min_t(int, ccs_bytes_to_cpy, GET_CCS_BYTES(i915, CHUNK_SZ));
> -
>   		if (!src_is_lmem)
>   			/*
>   			 * When CHUNK_SZ is passed all the pages upto CHUNK_SZ
> @@ -713,10 +705,10 @@ intel_context_migrate_copy(struct intel_context *ce,
>   	struct drm_i915_private *i915 = ce->engine->i915;
>   	u32 ccs_bytes_to_cpy = 0, bytes_to_cpy;
>   	enum i915_cache_level ccs_cache_level;
> -	int src_sz, dst_sz, ccs_sz;
>   	u32 src_offset, dst_offset;
>   	u8 src_access, dst_access;
>   	struct i915_request *rq;
> +	int src_sz, dst_sz;
>   	bool ccs_is_src;
>   	int err;
>   
> @@ -770,7 +762,7 @@ intel_context_migrate_copy(struct intel_context *ce,
>   	}
>   
>   	do {
> -		int len;
> +		int len, ccs_sz;

This could be moved into the reduced scope below.

Reviewed-by: Matthew Auld <matthew.auld@intel.com>

>   
>   		rq = i915_request_create(ce);
>   		if (IS_ERR(rq)) {
> @@ -797,7 +789,7 @@ intel_context_migrate_copy(struct intel_context *ce,
>   		if (err)
>   			goto out_rq;
>   
> -		calculate_chunk_sz(i915, src_is_lmem, &src_sz, &ccs_sz,
> +		calculate_chunk_sz(i915, src_is_lmem, &src_sz,
>   				   bytes_to_cpy, ccs_bytes_to_cpy);
>   
>   		len = emit_pte(rq, &it_src, src_cache_level, src_is_lmem,
> @@ -835,33 +827,29 @@ intel_context_migrate_copy(struct intel_context *ce,
>   			if (err)
>   				goto out_rq;
>   
> +			ccs_sz = GET_CCS_BYTES(i915, len);
>   			err = emit_pte(rq, &it_ccs, ccs_cache_level, false,
>   				       ccs_is_src ? src_offset : dst_offset,
>   				       ccs_sz);
> +			if (err < 0)
> +				goto out_rq;
> +			if (err < ccs_sz) {
> +				err = -EINVAL;
> +				goto out_rq;
> +			}
>   
>   			err = rq->engine->emit_flush(rq, EMIT_INVALIDATE);
>   			if (err)
>   				goto out_rq;
>   
> -			/*
> -			 * Using max of src_sz and dst_sz, as we need to
> -			 * pass the lmem size corresponding to the ccs
> -			 * blocks we need to handle.
> -			 */
> -			ccs_sz = max_t(int, ccs_is_src ? ccs_sz : src_sz,
> -				       ccs_is_src ? dst_sz : ccs_sz);
> -
>   			err = emit_copy_ccs(rq, dst_offset, dst_access,
> -					    src_offset, src_access, ccs_sz);
> +					    src_offset, src_access, len);
>   			if (err)
>   				goto out_rq;
>   
>   			err = rq->engine->emit_flush(rq, EMIT_INVALIDATE);
>   			if (err)
>   				goto out_rq;
> -
> -			/* Converting back to ccs bytes */
> -			ccs_sz = GET_CCS_BYTES(rq->engine->i915, ccs_sz);
>   			ccs_bytes_to_cpy -= ccs_sz;
>   		}
>   

^ permalink raw reply	[flat|nested] 20+ messages in thread

* Re: [Intel-gfx] [PATCH v2 1/4] drm/i915/gt: GEM_BUG_ON unexpected NULL at scatterlist walking
  2022-04-25 16:24   ` [Intel-gfx] " Ramalingam C
@ 2022-04-27 19:27     ` Matthew Auld
  -1 siblings, 0 replies; 20+ messages in thread
From: Matthew Auld @ 2022-04-27 19:27 UTC (permalink / raw)
  To: Ramalingam C, intel-gfx, dri-devel; +Cc: Hellstrom Thomas

On 25/04/2022 17:24, Ramalingam C wrote:
> While locating the start of ccs scatterlist in smem scatterlist, that has
> to be the size of lmem obj size + corresponding ccs data size. Report bug
> if scatterlist terminate before that length.
> 
> Signed-off-by: Ramalingam C <ramalingam.c@intel.com>
> ---
>   drivers/gpu/drm/i915/gt/intel_migrate.c | 6 ++++++
>   1 file changed, 6 insertions(+)
> 
> diff --git a/drivers/gpu/drm/i915/gt/intel_migrate.c b/drivers/gpu/drm/i915/gt/intel_migrate.c
> index 9d552f30b627..29d761da02c4 100644
> --- a/drivers/gpu/drm/i915/gt/intel_migrate.c
> +++ b/drivers/gpu/drm/i915/gt/intel_migrate.c
> @@ -687,6 +687,12 @@ static void get_ccs_sg_sgt(struct sgt_dma *it, u32 bytes_to_cpy)
>   		bytes_to_cpy -= len;
>   
>   		it->sg = __sg_next(it->sg);
> +
> +		/*
> +		 * scatterlist supposed to be the size of
> +		 * bytes_to_cpy + GET_CCS_BYTES(bytes_to_copy).
> +		 */
> +		GEM_BUG_ON(!it->sg);

It will crash and burn anyway, with the below NULL deref. Not sure if 
BUG_ON() is really much better, but I guess with the additional comment,
Reviewed-by: Matthew Auld <matthew.auld@intel.com>

>   		it->dma = sg_dma_address(it->sg);
>   		it->max = it->dma + sg_dma_len(it->sg);
>   	} while (bytes_to_cpy);

^ permalink raw reply	[flat|nested] 20+ messages in thread

* Re: [PATCH v2 1/4] drm/i915/gt: GEM_BUG_ON unexpected NULL at scatterlist walking
@ 2022-04-27 19:27     ` Matthew Auld
  0 siblings, 0 replies; 20+ messages in thread
From: Matthew Auld @ 2022-04-27 19:27 UTC (permalink / raw)
  To: Ramalingam C, intel-gfx, dri-devel; +Cc: Hellstrom Thomas

On 25/04/2022 17:24, Ramalingam C wrote:
> While locating the start of ccs scatterlist in smem scatterlist, that has
> to be the size of lmem obj size + corresponding ccs data size. Report bug
> if scatterlist terminate before that length.
> 
> Signed-off-by: Ramalingam C <ramalingam.c@intel.com>
> ---
>   drivers/gpu/drm/i915/gt/intel_migrate.c | 6 ++++++
>   1 file changed, 6 insertions(+)
> 
> diff --git a/drivers/gpu/drm/i915/gt/intel_migrate.c b/drivers/gpu/drm/i915/gt/intel_migrate.c
> index 9d552f30b627..29d761da02c4 100644
> --- a/drivers/gpu/drm/i915/gt/intel_migrate.c
> +++ b/drivers/gpu/drm/i915/gt/intel_migrate.c
> @@ -687,6 +687,12 @@ static void get_ccs_sg_sgt(struct sgt_dma *it, u32 bytes_to_cpy)
>   		bytes_to_cpy -= len;
>   
>   		it->sg = __sg_next(it->sg);
> +
> +		/*
> +		 * scatterlist supposed to be the size of
> +		 * bytes_to_cpy + GET_CCS_BYTES(bytes_to_copy).
> +		 */
> +		GEM_BUG_ON(!it->sg);

It will crash and burn anyway, with the below NULL deref. Not sure if 
BUG_ON() is really much better, but I guess with the additional comment,
Reviewed-by: Matthew Auld <matthew.auld@intel.com>

>   		it->dma = sg_dma_address(it->sg);
>   		it->max = it->dma + sg_dma_len(it->sg);
>   	} while (bytes_to_cpy);

^ permalink raw reply	[flat|nested] 20+ messages in thread

end of thread, other threads:[~2022-04-27 19:27 UTC | newest]

Thread overview: 20+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2022-04-25 16:24 [PATCH v2 0/4] Flat-CCS eviction enhancements Ramalingam C
2022-04-25 16:24 ` [Intel-gfx] " Ramalingam C
2022-04-25 16:24 ` [PATCH v2 1/4] drm/i915/gt: GEM_BUG_ON unexpected NULL at scatterlist walking Ramalingam C
2022-04-25 16:24   ` [Intel-gfx] " Ramalingam C
2022-04-27 19:27   ` Matthew Auld
2022-04-27 19:27     ` Matthew Auld
2022-04-25 16:24 ` [PATCH v2 2/4] drm/i915/gt: optimize the ccs_sz calculation per chunk Ramalingam C
2022-04-25 16:24   ` [Intel-gfx] " Ramalingam C
2022-04-27 19:24   ` Matthew Auld
2022-04-27 19:24     ` [Intel-gfx] " Matthew Auld
2022-04-25 16:24 ` [PATCH v2 3/4] drm/i915/gt: Document the eviction of the Flat-CCS objects Ramalingam C
2022-04-25 16:24   ` [Intel-gfx] " Ramalingam C
2022-04-27 16:29   ` Matthew Auld
2022-04-27 16:29     ` [Intel-gfx] " Matthew Auld
2022-04-25 16:24 ` [PATCH v2 4/4] uapi/drm/i915: Document memory residency and Flat-CCS capability of obj Ramalingam C
2022-04-25 16:24   ` [Intel-gfx] " Ramalingam C
2022-04-27 17:09   ` Matthew Auld
2022-04-27 17:09     ` [Intel-gfx] " Matthew Auld
2022-04-25 17:29 ` [Intel-gfx] ✗ Fi.CI.SPARSE: warning for Flat-CCS eviction enhancements (rev3) Patchwork
2022-04-25 18:02 ` [Intel-gfx] ✗ Fi.CI.BAT: failure " Patchwork

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