From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 91FA4C433F5 for ; Thu, 12 May 2022 09:31:32 +0000 (UTC) Received: from localhost ([::1]:38206 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1np5AR-0001oW-CD for qemu-devel@archiver.kernel.org; Thu, 12 May 2022 05:31:31 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:59832) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1np4bQ-0003eX-FM; Thu, 12 May 2022 04:55:21 -0400 Received: from mail-b.sr.ht ([173.195.146.151]:45264) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1np4bN-0001cX-JZ; Thu, 12 May 2022 04:55:19 -0400 Authentication-Results: mail-b.sr.ht; dkim=none Received: from git.sr.ht (unknown [173.195.146.142]) by mail-b.sr.ht (Postfix) with ESMTPSA id 9D76011F0A1; Thu, 12 May 2022 08:55:13 +0000 (UTC) From: ~eopxd Date: Thu, 17 Mar 2022 02:32:47 -0700 Subject: [PATCH qemu v3 09/10] target/riscv: rvv: Add mask agnostic for vector permutation instructions Message-ID: <165234571195.20102.85010942779919381-9@git.sr.ht> X-Mailer: git.sr.ht In-Reply-To: <165234571195.20102.85010942779919381-0@git.sr.ht> To: qemu-devel@nongnu.org, qemu-riscv@nongnu.org Cc: Palmer Dabbelt , Alistair Francis , Bin Meng , Frank Chang , WeiWei Li , eop Chen Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Received-SPF: pass client-ip=173.195.146.151; envelope-from=outgoing@sr.ht; helo=mail-b.sr.ht X-Spam_score_int: 36 X-Spam_score: 3.6 X-Spam_bar: +++ X-Spam_report: (3.6 / 5.0 requ) BAYES_00=-1.9, DATE_IN_PAST_96_XX=3.405, FREEMAIL_FORGED_REPLYTO=2.095, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Reply-To: ~eopxd Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" From: Yueh-Ting (eop) Chen Signed-off-by: eop Chen Reviewed-by: Frank Chang Reviewed-by: Weiwei Li --- target/riscv/insn_trans/trans_rvv.c.inc | 1 + target/riscv/vector_helper.c | 26 +++++++++++++++++++++++-- 2 files changed, 25 insertions(+), 2 deletions(-) diff --git a/target/riscv/insn_trans/trans_rvv.c.inc b/target/riscv/insn_tran= s/trans_rvv.c.inc index e25d5bb8d8..26b2df009c 100644 --- a/target/riscv/insn_trans/trans_rvv.c.inc +++ b/target/riscv/insn_trans/trans_rvv.c.inc @@ -3888,6 +3888,7 @@ static bool int_ext_op(DisasContext *s, arg_rmr *a, uin= t8_t seq) data =3D FIELD_DP32(data, VDATA, VM, a->vm); data =3D FIELD_DP32(data, VDATA, LMUL, s->lmul); data =3D FIELD_DP32(data, VDATA, VTA, s->vta); + data =3D FIELD_DP32(data, VDATA, VMA, s->vma); =20 tcg_gen_gvec_3_ptr(vreg_ofs(s, a->rd), vreg_ofs(s, 0), vreg_ofs(s, a->rs2), cpu_env, diff --git a/target/riscv/vector_helper.c b/target/riscv/vector_helper.c index 09a32c7432..f95967df99 100644 --- a/target/riscv/vector_helper.c +++ b/target/riscv/vector_helper.c @@ -5017,11 +5017,14 @@ void HELPER(NAME)(void *vd, void *v0, target_ulong s1= , void *vs2, \ uint32_t esz =3D sizeof(ETYPE); \ uint32_t total_elems =3D vext_get_total_elems(env, desc, esz); \ uint32_t vta =3D vext_vta(desc); \ + uint32_t vma =3D vext_vma(desc); \ target_ulong offset =3D s1, i_min, i; \ \ i_min =3D MAX(env->vstart, offset); \ for (i =3D i_min; i < vl; i++) { \ if (!vm && !vext_elem_mask(v0, i)) { \ + /* set masked-off elements to 1s */ \ + vext_set_elems_1s(vd, vma, i * esz, (i + 1) * esz); \ continue; \ } \ *((ETYPE *)vd + H(i)) =3D *((ETYPE *)vs2 + H(i - offset)); \ @@ -5046,13 +5049,17 @@ void HELPER(NAME)(void *vd, void *v0, target_ulong s1= , void *vs2, \ uint32_t esz =3D sizeof(ETYPE); \ uint32_t total_elems =3D vext_get_total_elems(env, desc, esz); \ uint32_t vta =3D vext_vta(desc); \ + uint32_t vma =3D vext_vma(desc); \ target_ulong i_max, i; \ \ i_max =3D MAX(MIN(s1 < vlmax ? vlmax - s1 : 0, vl), env->vstart); \ for (i =3D env->vstart; i < i_max; ++i) { \ - if (vm || vext_elem_mask(v0, i)) { \ - *((ETYPE *)vd + H(i)) =3D *((ETYPE *)vs2 + H(i + s1)); \ + if (!vm && !vext_elem_mask(v0, i)) { \ + /* set masked-off elements to 1s */ \ + vext_set_elems_1s(vd, vma, i * esz, (i + 1) * esz); \ + continue; \ } \ + *((ETYPE *)vd + H(i)) =3D *((ETYPE *)vs2 + H(i + s1)); \ } \ \ for (i =3D i_max; i < vl; ++i) { \ @@ -5082,10 +5089,13 @@ static void vslide1up_##BITWIDTH(void *vd, void *v0, = target_ulong s1, \ uint32_t esz =3D sizeof(ETYPE); = \ uint32_t total_elems =3D vext_get_total_elems(env, desc, esz); = \ uint32_t vta =3D vext_vta(desc); = \ + uint32_t vma =3D vext_vma(desc); = \ uint32_t i; \ \ for (i =3D env->vstart; i < vl; i++) { = \ if (!vm && !vext_elem_mask(v0, i)) { \ + /* set masked-off elements to 1s */ \ + vext_set_elems_1s(vd, vma, i * esz, (i + 1) * esz); \ continue; \ } \ if (i =3D=3D 0) { = \ @@ -5127,10 +5137,13 @@ static void vslide1down_##BITWIDTH(void *vd, void *v0= , target_ulong s1, \ uint32_t esz =3D sizeof(ETYPE); = \ uint32_t total_elems =3D vext_get_total_elems(env, desc, esz); = \ uint32_t vta =3D vext_vta(desc); = \ + uint32_t vma =3D vext_vma(desc); = \ uint32_t i; = \ = \ for (i =3D env->vstart; i < vl; i++) { = \ if (!vm && !vext_elem_mask(v0, i)) { = \ + /* set masked-off elements to 1s */ = \ + vext_set_elems_1s(vd, vma, i * esz, (i + 1) * esz); = \ continue; = \ } = \ if (i =3D=3D vl - 1) { = \ @@ -5198,11 +5211,14 @@ void HELPER(NAME)(void *vd, void *v0, void *vs1, void= *vs2, \ uint32_t esz =3D sizeof(TS2); \ uint32_t total_elems =3D vext_get_total_elems(env, desc, esz); \ uint32_t vta =3D vext_vta(desc); \ + uint32_t vma =3D vext_vma(desc); \ uint64_t index; \ uint32_t i; \ \ for (i =3D env->vstart; i < vl; i++) { \ if (!vm && !vext_elem_mask(v0, i)) { \ + /* set masked-off elements to 1s */ \ + vext_set_elems_1s(vd, vma, i * esz, (i + 1) * esz); \ continue; \ } \ index =3D *((TS1 *)vs1 + HS1(i)); \ @@ -5238,11 +5254,14 @@ void HELPER(NAME)(void *vd, void *v0, target_ulong s1= , void *vs2, \ uint32_t esz =3D sizeof(ETYPE); \ uint32_t total_elems =3D vext_get_total_elems(env, desc, esz); \ uint32_t vta =3D vext_vta(desc); \ + uint32_t vma =3D vext_vma(desc); \ uint64_t index =3D s1; \ uint32_t i; \ \ for (i =3D env->vstart; i < vl; i++) { \ if (!vm && !vext_elem_mask(v0, i)) { \ + /* set masked-off elements to 1s */ \ + vext_set_elems_1s(vd, vma, i * esz, (i + 1) * esz); \ continue; \ } \ if (index >=3D vlmax) { \ @@ -5317,10 +5336,13 @@ void HELPER(NAME)(void *vd, void *v0, void *vs2, = \ uint32_t esz =3D sizeof(ETYPE); \ uint32_t total_elems =3D vext_get_total_elems(env, desc, esz); \ uint32_t vta =3D vext_vta(desc); \ + uint32_t vma =3D vext_vma(desc); \ uint32_t i; \ \ for (i =3D env->vstart; i < vl; i++) { \ if (!vm && !vext_elem_mask(v0, i)) { \ + /* set masked-off elements to 1s */ \ + vext_set_elems_1s(vd, vma, i * esz, (i + 1) * esz); \ continue; \ } \ *((ETYPE *)vd + HD(i)) =3D *((DTYPE *)vs2 + HS1(i)); \ --=20 2.34.2 From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from list by lists.gnu.org with archive (Exim 4.90_1) id 1np4bj-0003yP-Mm for mharc-qemu-riscv@gnu.org; Thu, 12 May 2022 04:55:39 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:59832) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1np4bQ-0003eX-FM; Thu, 12 May 2022 04:55:21 -0400 Received: from mail-b.sr.ht ([173.195.146.151]:45264) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1np4bN-0001cX-JZ; Thu, 12 May 2022 04:55:19 -0400 Authentication-Results: mail-b.sr.ht; dkim=none Received: from git.sr.ht (unknown [173.195.146.142]) by mail-b.sr.ht (Postfix) with ESMTPSA id 9D76011F0A1; Thu, 12 May 2022 08:55:13 +0000 (UTC) From: ~eopxd Subject: [PATCH qemu v3 09/10] target/riscv: rvv: Add mask agnostic for vector permutation instructions Message-ID: <165234571195.20102.85010942779919381-9@git.sr.ht> X-Mailer: git.sr.ht Reply-to: ~eopxd In-Reply-To: <165234571195.20102.85010942779919381-0@git.sr.ht> To: qemu-devel@nongnu.org, qemu-riscv@nongnu.org Cc: Palmer Dabbelt , Alistair Francis , Bin Meng , Frank Chang , WeiWei Li , eop Chen Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Received-SPF: pass client-ip=173.195.146.151; envelope-from=outgoing@sr.ht; helo=mail-b.sr.ht X-Spam_score_int: 36 X-Spam_score: 3.6 X-Spam_bar: +++ X-Spam_report: (3.6 / 5.0 requ) BAYES_00=-1.9, DATE_IN_PAST_96_XX=3.405, FREEMAIL_FORGED_REPLYTO=2.095, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-riscv@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Date: Thu, 12 May 2022 08:55:23 -0000 X-Original-Date: Thu, 17 Mar 2022 02:32:47 -0700 X-List-Received-Date: Thu, 12 May 2022 08:55:23 -0000 From: Yueh-Ting (eop) Chen Signed-off-by: eop Chen Reviewed-by: Frank Chang Reviewed-by: Weiwei Li --- target/riscv/insn_trans/trans_rvv.c.inc | 1 + target/riscv/vector_helper.c | 26 +++++++++++++++++++++++-- 2 files changed, 25 insertions(+), 2 deletions(-) diff --git a/target/riscv/insn_trans/trans_rvv.c.inc b/target/riscv/insn_tran= s/trans_rvv.c.inc index e25d5bb8d8..26b2df009c 100644 --- a/target/riscv/insn_trans/trans_rvv.c.inc +++ b/target/riscv/insn_trans/trans_rvv.c.inc @@ -3888,6 +3888,7 @@ static bool int_ext_op(DisasContext *s, arg_rmr *a, uin= t8_t seq) data =3D FIELD_DP32(data, VDATA, VM, a->vm); data =3D FIELD_DP32(data, VDATA, LMUL, s->lmul); data =3D FIELD_DP32(data, VDATA, VTA, s->vta); + data =3D FIELD_DP32(data, VDATA, VMA, s->vma); =20 tcg_gen_gvec_3_ptr(vreg_ofs(s, a->rd), vreg_ofs(s, 0), vreg_ofs(s, a->rs2), cpu_env, diff --git a/target/riscv/vector_helper.c b/target/riscv/vector_helper.c index 09a32c7432..f95967df99 100644 --- a/target/riscv/vector_helper.c +++ b/target/riscv/vector_helper.c @@ -5017,11 +5017,14 @@ void HELPER(NAME)(void *vd, void *v0, target_ulong s1= , void *vs2, \ uint32_t esz =3D sizeof(ETYPE); \ uint32_t total_elems =3D vext_get_total_elems(env, desc, esz); \ uint32_t vta =3D vext_vta(desc); \ + uint32_t vma =3D vext_vma(desc); \ target_ulong offset =3D s1, i_min, i; \ \ i_min =3D MAX(env->vstart, offset); \ for (i =3D i_min; i < vl; i++) { \ if (!vm && !vext_elem_mask(v0, i)) { \ + /* set masked-off elements to 1s */ \ + vext_set_elems_1s(vd, vma, i * esz, (i + 1) * esz); \ continue; \ } \ *((ETYPE *)vd + H(i)) =3D *((ETYPE *)vs2 + H(i - offset)); \ @@ -5046,13 +5049,17 @@ void HELPER(NAME)(void *vd, void *v0, target_ulong s1= , void *vs2, \ uint32_t esz =3D sizeof(ETYPE); \ uint32_t total_elems =3D vext_get_total_elems(env, desc, esz); \ uint32_t vta =3D vext_vta(desc); \ + uint32_t vma =3D vext_vma(desc); \ target_ulong i_max, i; \ \ i_max =3D MAX(MIN(s1 < vlmax ? vlmax - s1 : 0, vl), env->vstart); \ for (i =3D env->vstart; i < i_max; ++i) { \ - if (vm || vext_elem_mask(v0, i)) { \ - *((ETYPE *)vd + H(i)) =3D *((ETYPE *)vs2 + H(i + s1)); \ + if (!vm && !vext_elem_mask(v0, i)) { \ + /* set masked-off elements to 1s */ \ + vext_set_elems_1s(vd, vma, i * esz, (i + 1) * esz); \ + continue; \ } \ + *((ETYPE *)vd + H(i)) =3D *((ETYPE *)vs2 + H(i + s1)); \ } \ \ for (i =3D i_max; i < vl; ++i) { \ @@ -5082,10 +5089,13 @@ static void vslide1up_##BITWIDTH(void *vd, void *v0, = target_ulong s1, \ uint32_t esz =3D sizeof(ETYPE); = \ uint32_t total_elems =3D vext_get_total_elems(env, desc, esz); = \ uint32_t vta =3D vext_vta(desc); = \ + uint32_t vma =3D vext_vma(desc); = \ uint32_t i; \ \ for (i =3D env->vstart; i < vl; i++) { = \ if (!vm && !vext_elem_mask(v0, i)) { \ + /* set masked-off elements to 1s */ \ + vext_set_elems_1s(vd, vma, i * esz, (i + 1) * esz); \ continue; \ } \ if (i =3D=3D 0) { = \ @@ -5127,10 +5137,13 @@ static void vslide1down_##BITWIDTH(void *vd, void *v0= , target_ulong s1, \ uint32_t esz =3D sizeof(ETYPE); = \ uint32_t total_elems =3D vext_get_total_elems(env, desc, esz); = \ uint32_t vta =3D vext_vta(desc); = \ + uint32_t vma =3D vext_vma(desc); = \ uint32_t i; = \ = \ for (i =3D env->vstart; i < vl; i++) { = \ if (!vm && !vext_elem_mask(v0, i)) { = \ + /* set masked-off elements to 1s */ = \ + vext_set_elems_1s(vd, vma, i * esz, (i + 1) * esz); = \ continue; = \ } = \ if (i =3D=3D vl - 1) { = \ @@ -5198,11 +5211,14 @@ void HELPER(NAME)(void *vd, void *v0, void *vs1, void= *vs2, \ uint32_t esz =3D sizeof(TS2); \ uint32_t total_elems =3D vext_get_total_elems(env, desc, esz); \ uint32_t vta =3D vext_vta(desc); \ + uint32_t vma =3D vext_vma(desc); \ uint64_t index; \ uint32_t i; \ \ for (i =3D env->vstart; i < vl; i++) { \ if (!vm && !vext_elem_mask(v0, i)) { \ + /* set masked-off elements to 1s */ \ + vext_set_elems_1s(vd, vma, i * esz, (i + 1) * esz); \ continue; \ } \ index =3D *((TS1 *)vs1 + HS1(i)); \ @@ -5238,11 +5254,14 @@ void HELPER(NAME)(void *vd, void *v0, target_ulong s1= , void *vs2, \ uint32_t esz =3D sizeof(ETYPE); \ uint32_t total_elems =3D vext_get_total_elems(env, desc, esz); \ uint32_t vta =3D vext_vta(desc); \ + uint32_t vma =3D vext_vma(desc); \ uint64_t index =3D s1; \ uint32_t i; \ \ for (i =3D env->vstart; i < vl; i++) { \ if (!vm && !vext_elem_mask(v0, i)) { \ + /* set masked-off elements to 1s */ \ + vext_set_elems_1s(vd, vma, i * esz, (i + 1) * esz); \ continue; \ } \ if (index >=3D vlmax) { \ @@ -5317,10 +5336,13 @@ void HELPER(NAME)(void *vd, void *v0, void *vs2, = \ uint32_t esz =3D sizeof(ETYPE); \ uint32_t total_elems =3D vext_get_total_elems(env, desc, esz); \ uint32_t vta =3D vext_vta(desc); \ + uint32_t vma =3D vext_vma(desc); \ uint32_t i; \ \ for (i =3D env->vstart; i < vl; i++) { \ if (!vm && !vext_elem_mask(v0, i)) { \ + /* set masked-off elements to 1s */ \ + vext_set_elems_1s(vd, vma, i * esz, (i + 1) * esz); \ continue; \ } \ *((ETYPE *)vd + HD(i)) =3D *((DTYPE *)vs2 + HS1(i)); \ --=20 2.34.2