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From: Loic Poulain <loic.poulain@linaro.org>
To: trini@konsulko.com
Cc: u-boot@lists.denx.de, michal.simek@xilinx.com,
	kettenis@openbsd.org, Loic Poulain <loic.poulain@linaro.org>
Subject: [PATCH v2 4/5] lib: sha256: Add support for hardware specific sha256_process
Date: Wed,  1 Jun 2022 20:26:30 +0200	[thread overview]
Message-ID: <1654107991-598-5-git-send-email-loic.poulain@linaro.org> (raw)
In-Reply-To: <1654107991-598-1-git-send-email-loic.poulain@linaro.org>

Mark sha256_process as weak to allow hardware specific implementation.
Add parameter for supporting multiple blocks processing.

Signed-off-by: Loic Poulain <loic.poulain@linaro.org>
---
 lib/sha256.c | 26 +++++++++++++++++++-------
 1 file changed, 19 insertions(+), 7 deletions(-)

diff --git a/lib/sha256.c b/lib/sha256.c
index c1fe93d..50b0b51 100644
--- a/lib/sha256.c
+++ b/lib/sha256.c
@@ -14,6 +14,8 @@
 #include <watchdog.h>
 #include <u-boot/sha256.h>
 
+#include <linux/compiler_attributes.h>
+
 const uint8_t sha256_der_prefix[SHA256_DER_LEN] = {
 	0x30, 0x31, 0x30, 0x0d, 0x06, 0x09, 0x60, 0x86,
 	0x48, 0x01, 0x65, 0x03, 0x04, 0x02, 0x01, 0x05,
@@ -55,7 +57,7 @@ void sha256_starts(sha256_context * ctx)
 	ctx->state[7] = 0x5BE0CD19;
 }
 
-static void sha256_process(sha256_context *ctx, const uint8_t data[64])
+static void sha256_process_one(sha256_context *ctx, const uint8_t data[64])
 {
 	uint32_t temp1, temp2;
 	uint32_t W[64];
@@ -186,6 +188,18 @@ static void sha256_process(sha256_context *ctx, const uint8_t data[64])
 	ctx->state[7] += H;
 }
 
+__weak void sha256_process(sha256_context *ctx, const unsigned char *data,
+			   unsigned int blocks)
+{
+	if (!blocks)
+		return;
+
+	while (blocks--) {
+		sha256_process_one(ctx, data);
+		data += 64;
+	}
+}
+
 void sha256_update(sha256_context *ctx, const uint8_t *input, uint32_t length)
 {
 	uint32_t left, fill;
@@ -204,17 +218,15 @@ void sha256_update(sha256_context *ctx, const uint8_t *input, uint32_t length)
 
 	if (left && length >= fill) {
 		memcpy((void *) (ctx->buffer + left), (void *) input, fill);
-		sha256_process(ctx, ctx->buffer);
+		sha256_process(ctx, ctx->buffer, 1);
 		length -= fill;
 		input += fill;
 		left = 0;
 	}
 
-	while (length >= 64) {
-		sha256_process(ctx, input);
-		length -= 64;
-		input += 64;
-	}
+	sha256_process(ctx, input, length / 64);
+	input += length / 64 * 64;
+	length = length % 64;
 
 	if (length)
 		memcpy((void *) (ctx->buffer + left), (void *) input, length);
-- 
2.7.4


  parent reply	other threads:[~2022-06-01 18:27 UTC|newest]

Thread overview: 23+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-06-01 18:26 [PATCH v2 0/5] Add ARMv8 CE sha1/sha256 support Loic Poulain
2022-06-01 18:26 ` [PATCH v2 1/5] lib: sha1: Add support for hardware specific sha1_process Loic Poulain
2022-06-27 21:30   ` Tom Rini
2022-06-01 18:26 ` [PATCH v2 2/5] sha1: Fix digest state size/type Loic Poulain
2022-06-27 21:31   ` Tom Rini
2022-06-01 18:26 ` [PATCH v2 3/5] armv8 SHA-1 using ARMv8 Crypto Extensions: Loic Poulain
2022-06-27 21:31   ` Tom Rini
2022-06-01 18:26 ` Loic Poulain [this message]
2022-06-27 21:31   ` [PATCH v2 4/5] lib: sha256: Add support for hardware specific sha256_process Tom Rini
2023-02-06 17:12   ` Simon Glass
2023-02-06 22:12     ` Loic Poulain
2023-02-07  4:02       ` Simon Glass
2023-02-07 21:47         ` Loic Poulain
2023-02-07 22:25           ` Simon Glass
2023-02-08  0:10             ` Tom Rini
2023-02-08 18:28               ` Simon Glass
2023-02-08 18:38                 ` Tom Rini
2022-06-01 18:26 ` [PATCH v2 5/5] armv8 SHA-256 using ARMv8 Crypto Extensions Loic Poulain
2022-06-23 19:51   ` [PATCH] qemu_arm64: Enable CONFIG_ARMV8_CRYPTO support Tom Rini
2022-06-27 21:31     ` Tom Rini
2022-06-27 21:31   ` [PATCH v2 5/5] armv8 SHA-256 using ARMv8 Crypto Extensions Tom Rini
2022-06-15 23:04 ` [PATCH v2 0/5] Add ARMv8 CE sha1/sha256 support Loic Poulain
2022-06-16 14:39   ` Tom Rini

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