From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 75C14CCA479 for ; Fri, 17 Jun 2022 23:27:19 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1383697AbiFQX1R (ORCPT ); Fri, 17 Jun 2022 19:27:17 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:59568 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S236606AbiFQX1Q (ORCPT ); Fri, 17 Jun 2022 19:27:16 -0400 Received: from mail-io1-f52.google.com (mail-io1-f52.google.com [209.85.166.52]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 97F9566AFA; Fri, 17 Jun 2022 16:27:15 -0700 (PDT) Received: by mail-io1-f52.google.com with SMTP id q11so5960892iod.8; Fri, 17 Jun 2022 16:27:15 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:in-reply-to:references:subject:date :message-id; bh=mrnGJfuJSJ8KmPJjJNK/2HMET0pHuhxW1Qzfgjvk8ws=; b=bTu3lpFGMOsAQarUg7u8XQZ2vbjRtsqI7VIJP4bewayRdH8DomGHyn5PDCc8S3DgxM EoGGkvEEffbGCubozQ/AORc71vuMoD0Fu61lmsF2h5Y7NfI8HkUsEmMb3ho9SmeYy/QN bGbMZsXt8xmgJwdE+7NCTEF6svZUms8zoqaCCSAKozRrnoIZyFdJxp30l8Q74sQHjGBO E7XxsOBo/Bqtc+JycROB0iX0P7+MZ4eYiSgUJfFVu1gY+o/MFXw9FIOqcIndkpLJgAHJ Sq1swLjEyj6K3pSq30n6imJJhbuJJge0d/5VVzRGPuhSquHdTLJvIyQdHi55Ux5yZIsE FX4Q== X-Gm-Message-State: AJIora9uWbExxcB45AaxhYauMfv7C3Jzbdyb67K9X1N3vBse00ii3sHb C0HgVSk2UGA+rBTHhLwJzg== X-Google-Smtp-Source: AGRyM1tifihKpTdp799WxK6Tc+JX6s/X9nrpMyulN4Y0ijrWTb5i6wkhgCyeLD424gLNC7G3gBG1Aw== X-Received: by 2002:a05:6638:138f:b0:332:1c0:1e81 with SMTP id w15-20020a056638138f00b0033201c01e81mr6550749jad.293.1655508434839; Fri, 17 Jun 2022 16:27:14 -0700 (PDT) Received: from robh.at.kernel.org ([64.188.179.251]) by smtp.gmail.com with ESMTPSA id h20-20020a02b614000000b0032e70c4e12fsm2771998jam.28.2022.06.17.16.27.13 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 17 Jun 2022 16:27:14 -0700 (PDT) Received: (nullmailer pid 2635209 invoked by uid 1000); Fri, 17 Jun 2022 23:27:12 -0000 From: Rob Herring To: Sean Anderson Cc: Eric Dumazet , Vinod Koul , netdev@vger.kernel.org, Rob Herring , linux-kernel@vger.kernel.org, Paolo Abeni , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Jakub Kicinski , Russell King , Kishon Vijay Abraham I , "David S . Miller" , linux-phy@lists.infradead.org, Krzysztof Kozlowski , Madalin Bucur In-Reply-To: <20220617203312.3799646-2-sean.anderson@seco.com> References: <20220617203312.3799646-1-sean.anderson@seco.com> <20220617203312.3799646-2-sean.anderson@seco.com> Subject: Re: [PATCH net-next 01/28] dt-bindings: phy: Add QorIQ SerDes binding Date: Fri, 17 Jun 2022 17:27:12 -0600 Message-Id: <1655508432.548094.2635208.nullmailer@robh.at.kernel.org> Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Fri, 17 Jun 2022 16:32:45 -0400, Sean Anderson wrote: > This adds a binding for the SerDes module found on QorIQ processors. The > phy reference has two cells, one for the first lane and one for the > last. This should allow for good support of multi-lane protocols when > (if) they are added. There is no protocol option, because the driver is > designed to be able to completely reconfigure lanes at runtime. > Generally, the phy consumer can select the appropriate protocol using > set_mode. For the most part there is only one protocol controller > (consumer) per lane/protocol combination. The exception to this is the > B4860 processor, which has some lanes which can be connected to > multiple MACs. For that processor, I anticipate the easiest way to > resolve this will be to add an additional cell with a "protocol > controller instance" property. > > Each serdes has a unique set of supported protocols (and lanes). The > support matrix is stored in the driver and is selected based on the > compatible string. It is anticipated that a new compatible string will > need to be added for each serdes on each SoC that drivers support is > added for. > > There are two PLLs, each of which can be used as the master clock for > each lane. Each PLL has its own reference. For the moment they are > required, because it simplifies the driver implementation. Absent > reference clocks can be modeled by a fixed-clock with a rate of 0. > > Signed-off-by: Sean Anderson > --- > > .../bindings/phy/fsl,qoriq-serdes.yaml | 78 +++++++++++++++++++ > 1 file changed, 78 insertions(+) > create mode 100644 Documentation/devicetree/bindings/phy/fsl,qoriq-serdes.yaml > My bot found errors running 'make DT_CHECKER_FLAGS=-m dt_binding_check' on your patch (DT_CHECKER_FLAGS is new in v5.13): yamllint warnings/errors: dtschema/dtc warnings/errors: /builds/robherring/linux-dt-review/Documentation/devicetree/bindings/phy/fsl,qoriq-serdes.example.dtb: phy@1ea0000: reg: [[0, 32112640], [0, 8192]] is too long From schema: /builds/robherring/linux-dt-review/Documentation/devicetree/bindings/phy/fsl,qoriq-serdes.yaml doc reference errors (make refcheckdocs): See https://patchwork.ozlabs.org/patch/ This check can fail if there are any dependencies. The base for a patch series is generally the most recent rc1. If you already ran 'make dt_binding_check' and didn't see the above error(s), then make sure 'yamllint' is installed and dt-schema is up to date: pip3 install dtschema --upgrade Please check and re-submit. From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 78BCDC433EF for ; Fri, 17 Jun 2022 23:28:16 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:MIME-Version:List-Subscribe:List-Help: List-Post:List-Archive:List-Unsubscribe:List-Id:Message-Id:Date:Subject: References:In-Reply-To:Cc:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=1sJRemu+Fjy0vD9QxOlVWNJKZ6YGkcNB7Mje/KtsC4Q=; b=Sfs0hNnAVaJE6C HGWI5TxjYwmMGLPG5oO1PHfhvI0KRYodZqizbFskVloGf7bfnYrJl38v7C6c0bKzmd2RbRawTpsPG uaJiDzc8CsXiDU4TwujKMLCPB+XkT1doaHOKt7qOnOb7XfJOKe3yLM1r6+IyORjU+GUyjwXc1KG3s I3FWX20Y2oRm2cSnvqV4Ve1Bq58qUEsKlP6JgbaKz/YYwaUHkASqn4G9QJ22/Vl/u+O+G61C1EC+i B+Z4tPJPSurpiT/n4YIr5qxPOJIa7/yuZ58vscMiuHN3WSLLLj0yYZfVFPNtP+PsIjRmNL1qhJhAK bOWWZdND/pU/5HvtAiSw==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1o2LN1-009d8L-SN; Fri, 17 Jun 2022 23:27:19 +0000 Received: from mail-io1-f46.google.com ([209.85.166.46]) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1o2LMy-009d6q-1p; Fri, 17 Jun 2022 23:27:17 +0000 Received: by mail-io1-f46.google.com with SMTP id q11so5960893iod.8; Fri, 17 Jun 2022 16:27:15 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:in-reply-to:references:subject:date :message-id; bh=mrnGJfuJSJ8KmPJjJNK/2HMET0pHuhxW1Qzfgjvk8ws=; b=rZsogEkXbKXYx4Ev+PgB5ScDpx/5WmqwwcEzsjhwMZl5FhsWZ1KpJcY3CJP0TVvIYf EfcJ8WioZ/WrTjwu0Z9xtbtTWNARK4VUKxttEqb8zcH6NSKfUz552hmwV/ISUSI4IELq NGl12ivpZ6b9LVBpF+D3Oi6EMwOaHZROl5tiO6bP0NjE78S4pCnP6T3c/9fjxOu9UbVc FeC0EoUZwATpmz0kA2lyzEDTCjkBLDoI4G7YxnQCUrQkM+cQfsdHRYbAT3ZmzPGhpHUZ mkFNnlarjMUa19YvJif6OLywS+pXYse0TwCgM39JV0w8hGz20k1D9wUqEwf8YxjBCa8x sbzg== X-Gm-Message-State: AJIora9+VH+JCgVhIEEQaPrbGekDz0SyeZuBi00c7hz8gSvEoWmNbU5p a6J7XY3Pi7ClxNu7rcx71g== X-Google-Smtp-Source: AGRyM1tifihKpTdp799WxK6Tc+JX6s/X9nrpMyulN4Y0ijrWTb5i6wkhgCyeLD424gLNC7G3gBG1Aw== X-Received: by 2002:a05:6638:138f:b0:332:1c0:1e81 with SMTP id w15-20020a056638138f00b0033201c01e81mr6550749jad.293.1655508434839; Fri, 17 Jun 2022 16:27:14 -0700 (PDT) Received: from robh.at.kernel.org ([64.188.179.251]) by smtp.gmail.com with ESMTPSA id h20-20020a02b614000000b0032e70c4e12fsm2771998jam.28.2022.06.17.16.27.13 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 17 Jun 2022 16:27:14 -0700 (PDT) Received: (nullmailer pid 2635209 invoked by uid 1000); Fri, 17 Jun 2022 23:27:12 -0000 From: Rob Herring To: Sean Anderson Cc: Eric Dumazet , Vinod Koul , netdev@vger.kernel.org, Rob Herring , linux-kernel@vger.kernel.org, Paolo Abeni , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Jakub Kicinski , Russell King , Kishon Vijay Abraham I , "David S . Miller" , linux-phy@lists.infradead.org, Krzysztof Kozlowski , Madalin Bucur In-Reply-To: <20220617203312.3799646-2-sean.anderson@seco.com> References: <20220617203312.3799646-1-sean.anderson@seco.com> <20220617203312.3799646-2-sean.anderson@seco.com> Subject: Re: [PATCH net-next 01/28] dt-bindings: phy: Add QorIQ SerDes binding Date: Fri, 17 Jun 2022 17:27:12 -0600 Message-Id: <1655508432.548094.2635208.nullmailer@robh.at.kernel.org> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20220617_162716_129611_5DA19DDC X-CRM114-Status: GOOD ( 23.38 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On Fri, 17 Jun 2022 16:32:45 -0400, Sean Anderson wrote: > This adds a binding for the SerDes module found on QorIQ processors. The > phy reference has two cells, one for the first lane and one for the > last. This should allow for good support of multi-lane protocols when > (if) they are added. There is no protocol option, because the driver is > designed to be able to completely reconfigure lanes at runtime. > Generally, the phy consumer can select the appropriate protocol using > set_mode. For the most part there is only one protocol controller > (consumer) per lane/protocol combination. The exception to this is the > B4860 processor, which has some lanes which can be connected to > multiple MACs. For that processor, I anticipate the easiest way to > resolve this will be to add an additional cell with a "protocol > controller instance" property. > > Each serdes has a unique set of supported protocols (and lanes). The > support matrix is stored in the driver and is selected based on the > compatible string. It is anticipated that a new compatible string will > need to be added for each serdes on each SoC that drivers support is > added for. > > There are two PLLs, each of which can be used as the master clock for > each lane. Each PLL has its own reference. For the moment they are > required, because it simplifies the driver implementation. Absent > reference clocks can be modeled by a fixed-clock with a rate of 0. > > Signed-off-by: Sean Anderson > --- > > .../bindings/phy/fsl,qoriq-serdes.yaml | 78 +++++++++++++++++++ > 1 file changed, 78 insertions(+) > create mode 100644 Documentation/devicetree/bindings/phy/fsl,qoriq-serdes.yaml > My bot found errors running 'make DT_CHECKER_FLAGS=-m dt_binding_check' on your patch (DT_CHECKER_FLAGS is new in v5.13): yamllint warnings/errors: dtschema/dtc warnings/errors: /builds/robherring/linux-dt-review/Documentation/devicetree/bindings/phy/fsl,qoriq-serdes.example.dtb: phy@1ea0000: reg: [[0, 32112640], [0, 8192]] is too long From schema: /builds/robherring/linux-dt-review/Documentation/devicetree/bindings/phy/fsl,qoriq-serdes.yaml doc reference errors (make refcheckdocs): See https://patchwork.ozlabs.org/patch/ This check can fail if there are any dependencies. The base for a patch series is generally the most recent rc1. If you already ran 'make dt_binding_check' and didn't see the above error(s), then make sure 'yamllint' is installed and dt-schema is up to date: pip3 install dtschema --upgrade Please check and re-submit. _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 03215C43334 for ; Fri, 17 Jun 2022 23:27:31 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:MIME-Version:List-Subscribe:List-Help: List-Post:List-Archive:List-Unsubscribe:List-Id:Message-Id:Date:Subject: References:In-Reply-To:Cc:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=5pylo2Y1dDaCDFroA0zx5Xe/6qFrCZaugsoIJ7i8RlQ=; b=wdgSr6NUevCKt7 xw+eKy3DKaU2fJXVja19dtB44GGMs7hjj+G7GqxUjtRGNaWzdOnLIfz2gn5V2sM1qPdyiNvYAoa19 P8LPn8nqn8cPO/UOy2sEDTEEoO6/QEKHwnI/GMlI9dlcFcfFSwOxOOGD1QOzEfQJbq5GX0z8dG+Nj KDIm8B933qe4h5LSXZWCNcrZ5uJMS0sQYVbiu0ddwvx9UVayKtbK5r3QEOea4meFyxgeRuxeDaIBk 9IOC1dkXYyVBiNoIONopKmBaBPRcrs2uTg9EotyJ/3ZbrH++XdooUPakVIzlMI6M10eFFm9X3cCB6 5fKSpUvYrmqyohX8aoFg==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1o2LND-009dD7-AC; Fri, 17 Jun 2022 23:27:31 +0000 Received: from mail-io1-f46.google.com ([209.85.166.46]) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1o2LMy-009d6q-1p; Fri, 17 Jun 2022 23:27:17 +0000 Received: by mail-io1-f46.google.com with SMTP id q11so5960893iod.8; Fri, 17 Jun 2022 16:27:15 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:in-reply-to:references:subject:date :message-id; bh=mrnGJfuJSJ8KmPJjJNK/2HMET0pHuhxW1Qzfgjvk8ws=; b=rZsogEkXbKXYx4Ev+PgB5ScDpx/5WmqwwcEzsjhwMZl5FhsWZ1KpJcY3CJP0TVvIYf EfcJ8WioZ/WrTjwu0Z9xtbtTWNARK4VUKxttEqb8zcH6NSKfUz552hmwV/ISUSI4IELq NGl12ivpZ6b9LVBpF+D3Oi6EMwOaHZROl5tiO6bP0NjE78S4pCnP6T3c/9fjxOu9UbVc FeC0EoUZwATpmz0kA2lyzEDTCjkBLDoI4G7YxnQCUrQkM+cQfsdHRYbAT3ZmzPGhpHUZ mkFNnlarjMUa19YvJif6OLywS+pXYse0TwCgM39JV0w8hGz20k1D9wUqEwf8YxjBCa8x sbzg== X-Gm-Message-State: AJIora9+VH+JCgVhIEEQaPrbGekDz0SyeZuBi00c7hz8gSvEoWmNbU5p a6J7XY3Pi7ClxNu7rcx71g== X-Google-Smtp-Source: AGRyM1tifihKpTdp799WxK6Tc+JX6s/X9nrpMyulN4Y0ijrWTb5i6wkhgCyeLD424gLNC7G3gBG1Aw== X-Received: by 2002:a05:6638:138f:b0:332:1c0:1e81 with SMTP id w15-20020a056638138f00b0033201c01e81mr6550749jad.293.1655508434839; Fri, 17 Jun 2022 16:27:14 -0700 (PDT) Received: from robh.at.kernel.org ([64.188.179.251]) by smtp.gmail.com with ESMTPSA id h20-20020a02b614000000b0032e70c4e12fsm2771998jam.28.2022.06.17.16.27.13 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 17 Jun 2022 16:27:14 -0700 (PDT) Received: (nullmailer pid 2635209 invoked by uid 1000); Fri, 17 Jun 2022 23:27:12 -0000 From: Rob Herring To: Sean Anderson Cc: Eric Dumazet , Vinod Koul , netdev@vger.kernel.org, Rob Herring , linux-kernel@vger.kernel.org, Paolo Abeni , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Jakub Kicinski , Russell King , Kishon Vijay Abraham I , "David S . Miller" , linux-phy@lists.infradead.org, Krzysztof Kozlowski , Madalin Bucur In-Reply-To: <20220617203312.3799646-2-sean.anderson@seco.com> References: <20220617203312.3799646-1-sean.anderson@seco.com> <20220617203312.3799646-2-sean.anderson@seco.com> Subject: Re: [PATCH net-next 01/28] dt-bindings: phy: Add QorIQ SerDes binding Date: Fri, 17 Jun 2022 17:27:12 -0600 Message-Id: <1655508432.548094.2635208.nullmailer@robh.at.kernel.org> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20220617_162716_129611_5DA19DDC X-CRM114-Status: GOOD ( 23.38 ) X-BeenThere: linux-phy@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: Linux Phy Mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-phy" Errors-To: linux-phy-bounces+linux-phy=archiver.kernel.org@lists.infradead.org On Fri, 17 Jun 2022 16:32:45 -0400, Sean Anderson wrote: > This adds a binding for the SerDes module found on QorIQ processors. The > phy reference has two cells, one for the first lane and one for the > last. This should allow for good support of multi-lane protocols when > (if) they are added. There is no protocol option, because the driver is > designed to be able to completely reconfigure lanes at runtime. > Generally, the phy consumer can select the appropriate protocol using > set_mode. For the most part there is only one protocol controller > (consumer) per lane/protocol combination. The exception to this is the > B4860 processor, which has some lanes which can be connected to > multiple MACs. For that processor, I anticipate the easiest way to > resolve this will be to add an additional cell with a "protocol > controller instance" property. > > Each serdes has a unique set of supported protocols (and lanes). The > support matrix is stored in the driver and is selected based on the > compatible string. It is anticipated that a new compatible string will > need to be added for each serdes on each SoC that drivers support is > added for. > > There are two PLLs, each of which can be used as the master clock for > each lane. Each PLL has its own reference. For the moment they are > required, because it simplifies the driver implementation. Absent > reference clocks can be modeled by a fixed-clock with a rate of 0. > > Signed-off-by: Sean Anderson > --- > > .../bindings/phy/fsl,qoriq-serdes.yaml | 78 +++++++++++++++++++ > 1 file changed, 78 insertions(+) > create mode 100644 Documentation/devicetree/bindings/phy/fsl,qoriq-serdes.yaml > My bot found errors running 'make DT_CHECKER_FLAGS=-m dt_binding_check' on your patch (DT_CHECKER_FLAGS is new in v5.13): yamllint warnings/errors: dtschema/dtc warnings/errors: /builds/robherring/linux-dt-review/Documentation/devicetree/bindings/phy/fsl,qoriq-serdes.example.dtb: phy@1ea0000: reg: [[0, 32112640], [0, 8192]] is too long From schema: /builds/robherring/linux-dt-review/Documentation/devicetree/bindings/phy/fsl,qoriq-serdes.yaml doc reference errors (make refcheckdocs): See https://patchwork.ozlabs.org/patch/ This check can fail if there are any dependencies. The base for a patch series is generally the most recent rc1. If you already ran 'make dt_binding_check' and didn't see the above error(s), then make sure 'yamllint' is installed and dt-schema is up to date: pip3 install dtschema --upgrade Please check and re-submit. -- linux-phy mailing list linux-phy@lists.infradead.org https://lists.infradead.org/mailman/listinfo/linux-phy