All of lore.kernel.org
 help / color / mirror / Atom feed
From: Babu Moger <babu.moger@amd.com>
To: <corbet@lwn.net>, <reinette.chatre@intel.com>,
	<tglx@linutronix.de>, <mingo@redhat.com>, <bp@alien8.de>
Cc: <fenghua.yu@intel.com>, <dave.hansen@linux.intel.com>,
	<x86@kernel.org>, <hpa@zytor.com>, <paulmck@kernel.org>,
	<akpm@linux-foundation.org>, <quic_neeraju@quicinc.com>,
	<rdunlap@infradead.org>, <damien.lemoal@opensource.wdc.com>,
	<songmuchun@bytedance.com>, <peterz@infradead.org>,
	<jpoimboe@kernel.org>, <pbonzini@redhat.com>,
	<babu.moger@amd.com>, <chang.seok.bae@intel.com>,
	<pawan.kumar.gupta@linux.intel.com>, <jmattson@google.com>,
	<daniel.sneddon@linux.intel.com>, <sandipan.das@amd.com>,
	<tony.luck@intel.com>, <james.morse@arm.com>,
	<linux-doc@vger.kernel.org>, <linux-kernel@vger.kernel.org>,
	<bagasdotme@gmail.com>, <eranian@google.com>
Subject: [PATCH v5 05/12] x86/resctrl: Detect and configure Slow Memory Bandwidth allocation
Date: Tue, 27 Sep 2022 15:26:06 -0500	[thread overview]
Message-ID: <166431036678.373387.1230453387335709239.stgit@bmoger-ubuntu> (raw)
In-Reply-To: <166431016617.373387.1968875281081252467.stgit@bmoger-ubuntu>

The QoS slow memory configuration details are available via
CPUID_Fn80000020_EDX_x02. Detect the available details and
initialize the rest to defaults.

Signed-off-by: Babu Moger <babu.moger@amd.com>
---
 arch/x86/kernel/cpu/resctrl/core.c        |   29 +++++++++++++++++++++++++++--
 arch/x86/kernel/cpu/resctrl/ctrlmondata.c |    2 +-
 arch/x86/kernel/cpu/resctrl/internal.h    |    1 +
 arch/x86/kernel/cpu/resctrl/rdtgroup.c    |    8 +++++---
 4 files changed, 34 insertions(+), 6 deletions(-)

diff --git a/arch/x86/kernel/cpu/resctrl/core.c b/arch/x86/kernel/cpu/resctrl/core.c
index 53fbc3acad81..56c96607259c 100644
--- a/arch/x86/kernel/cpu/resctrl/core.c
+++ b/arch/x86/kernel/cpu/resctrl/core.c
@@ -227,9 +227,15 @@ static bool __rdt_get_mem_config_amd(struct rdt_resource *r)
 	struct rdt_hw_resource *hw_res = resctrl_to_arch_res(r);
 	union cpuid_0x10_3_eax eax;
 	union cpuid_0x10_x_edx edx;
-	u32 ebx, ecx;
+	u32 ebx, ecx, subleaf;
+
+	/*
+	 * Query CPUID_Fn80000020_EDX_x01 for MBA and
+	 * CPUID_Fn80000020_EDX_x02 for SMBA
+	 */
+	subleaf = (r->rid == RDT_RESOURCE_SMBA) ? 2 :  1;
 
-	cpuid_count(0x80000020, 1, &eax.full, &ebx, &ecx, &edx.full);
+	cpuid_count(0x80000020, subleaf, &eax.full, &ebx, &ecx, &edx.full);
 	hw_res->num_closid = edx.split.cos_max + 1;
 	r->default_ctrl = MAX_MBA_BW_AMD;
 
@@ -791,6 +797,19 @@ static __init bool get_mem_config(void)
 	return false;
 }
 
+static __init bool get_slow_mem_config(void)
+{
+	struct rdt_hw_resource *hw_res = &rdt_resources_all[RDT_RESOURCE_SMBA];
+
+	if (!rdt_cpu_has(X86_FEATURE_SMBA))
+		return false;
+
+	if (boot_cpu_data.x86_vendor == X86_VENDOR_AMD)
+		return __rdt_get_mem_config_amd(&hw_res->r_resctrl);
+
+	return false;
+}
+
 static __init bool get_rdt_alloc_resources(void)
 {
 	struct rdt_resource *r;
@@ -821,6 +840,9 @@ static __init bool get_rdt_alloc_resources(void)
 	if (get_mem_config())
 		ret = true;
 
+	if (get_slow_mem_config())
+		ret = true;
+
 	return ret;
 }
 
@@ -910,6 +932,9 @@ static __init void rdt_init_res_defs_amd(void)
 		} else if (r->rid == RDT_RESOURCE_MBA) {
 			hw_res->msr_base = MSR_IA32_MBA_BW_BASE;
 			hw_res->msr_update = mba_wrmsr_amd;
+		} else if (r->rid == RDT_RESOURCE_SMBA) {
+			hw_res->msr_base = MSR_IA32_SMBA_BW_BASE;
+			hw_res->msr_update = mba_wrmsr_amd;
 		}
 	}
 }
diff --git a/arch/x86/kernel/cpu/resctrl/ctrlmondata.c b/arch/x86/kernel/cpu/resctrl/ctrlmondata.c
index 7f38c8bd8429..480600b8e4cf 100644
--- a/arch/x86/kernel/cpu/resctrl/ctrlmondata.c
+++ b/arch/x86/kernel/cpu/resctrl/ctrlmondata.c
@@ -202,7 +202,7 @@ static int parse_line(char *line, struct resctrl_schema *s,
 	unsigned long dom_id;
 
 	if (rdtgrp->mode == RDT_MODE_PSEUDO_LOCKSETUP &&
-	    r->rid == RDT_RESOURCE_MBA) {
+	    (r->rid == RDT_RESOURCE_MBA || r->rid == RDT_RESOURCE_SMBA)) {
 		rdt_last_cmd_puts("Cannot pseudo-lock MBA resource\n");
 		return -EINVAL;
 	}
diff --git a/arch/x86/kernel/cpu/resctrl/internal.h b/arch/x86/kernel/cpu/resctrl/internal.h
index 24a1dfeb6cb2..c049a274383c 100644
--- a/arch/x86/kernel/cpu/resctrl/internal.h
+++ b/arch/x86/kernel/cpu/resctrl/internal.h
@@ -14,6 +14,7 @@
 #define MSR_IA32_L2_CBM_BASE		0xd10
 #define MSR_IA32_MBA_THRTL_BASE		0xd50
 #define MSR_IA32_MBA_BW_BASE		0xc0000200
+#define MSR_IA32_SMBA_BW_BASE		0xc0000280
 
 #define MSR_IA32_QM_CTR			0x0c8e
 #define MSR_IA32_QM_EVTSEL		0x0c8d
diff --git a/arch/x86/kernel/cpu/resctrl/rdtgroup.c b/arch/x86/kernel/cpu/resctrl/rdtgroup.c
index f276aff521e8..04b519bca50d 100644
--- a/arch/x86/kernel/cpu/resctrl/rdtgroup.c
+++ b/arch/x86/kernel/cpu/resctrl/rdtgroup.c
@@ -1218,7 +1218,7 @@ static bool rdtgroup_mode_test_exclusive(struct rdtgroup *rdtgrp)
 
 	list_for_each_entry(s, &resctrl_schema_all, list) {
 		r = s->res;
-		if (r->rid == RDT_RESOURCE_MBA)
+		if (r->rid == RDT_RESOURCE_MBA || r->rid == RDT_RESOURCE_SMBA)
 			continue;
 		has_cache = true;
 		list_for_each_entry(d, &r->domains, list) {
@@ -1399,7 +1399,8 @@ static int rdtgroup_size_show(struct kernfs_open_file *of,
 				ctrl = resctrl_arch_get_config(r, d,
 							       rdtgrp->closid,
 							       schema->conf_type);
-				if (r->rid == RDT_RESOURCE_MBA)
+				if (r->rid == RDT_RESOURCE_MBA ||
+				    r->rid == RDT_RESOURCE_SMBA)
 					size = ctrl;
 				else
 					size = rdtgroup_cbm_to_size(r, d, ctrl);
@@ -2807,7 +2808,8 @@ static int rdtgroup_init_alloc(struct rdtgroup *rdtgrp)
 
 	list_for_each_entry(s, &resctrl_schema_all, list) {
 		r = s->res;
-		if (r->rid == RDT_RESOURCE_MBA) {
+		if (r->rid == RDT_RESOURCE_MBA ||
+		    r->rid == RDT_RESOURCE_SMBA) {
 			rdtgroup_init_mba(r);
 		} else {
 			ret = rdtgroup_init_cat(s, rdtgrp->closid);



  parent reply	other threads:[~2022-09-27 20:26 UTC|newest]

Thread overview: 36+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-09-27 20:25 [PATCH v5 00/12] x86/resctrl: Support for AMD QoS new features Babu Moger
2022-09-27 20:25 ` [PATCH v5 01/12] x86/cpufeatures: Add Slow Memory Bandwidth Allocation feature flag Babu Moger
2022-09-29 21:58   ` Reinette Chatre
2022-10-03 14:45     ` Moger, Babu
2022-10-03 15:24       ` Reinette Chatre
2022-10-03 15:35         ` Moger, Babu
2022-09-27 20:25 ` [PATCH v5 02/12] x86/resctrl: Add a new resource type RDT_RESOURCE_SMBA Babu Moger
2022-09-27 20:25 ` [PATCH v5 03/12] x86/cpufeatures: Add Bandwidth Monitoring Event Configuration feature flag Babu Moger
2022-09-27 20:25 ` [PATCH v5 04/12] x86/resctrl: Include new features in command line options Babu Moger
2022-09-27 20:26 ` Babu Moger [this message]
2022-09-27 20:26 ` [PATCH v5 06/12] x86/resctrl: Introduce data structure to support monitor configuration Babu Moger
2022-09-27 22:25   ` Yu, Fenghua
2022-09-28 12:56     ` Moger, Babu
2022-09-27 20:26 ` [PATCH v5 07/12] x86/resctrl: Add sysfs interface to read mbm_total_bytes event configuration Babu Moger
2022-09-27 20:26 ` [PATCH v5 08/12] x86/resctrl: Add sysfs interface to read mbm_local_bytes " Babu Moger
2022-09-27 22:42   ` Yu, Fenghua
2022-09-28 14:43     ` Moger, Babu
2022-09-27 20:26 ` [PATCH v5 09/12] x86/resctrl: Add sysfs interface to write mbm_total_bytes " Babu Moger
2022-09-27 22:32   ` Yu, Fenghua
2022-09-28 12:58     ` Moger, Babu
2022-09-27 20:26 ` [PATCH v5 10/12] x86/resctrl: Add sysfs interface to write mbm_local_bytes " Babu Moger
2022-09-27 20:26 ` [PATCH v5 11/12] x86/resctrl: Replace smp_call_function_many() with on_each_cpu_mask() Babu Moger
2022-09-27 20:27 ` [PATCH v5 12/12] Documentation/x86: Update resctrl_ui.rst for new features Babu Moger
2022-09-28  4:25   ` Bagas Sanjaya
2022-09-28 15:23     ` Moger, Babu
2022-09-29  8:48       ` Bagas Sanjaya
2022-09-29 13:22         ` Moger, Babu
2022-09-29 13:33           ` Bagas Sanjaya
2022-09-29 22:10   ` Reinette Chatre
2022-10-03 14:28     ` Moger, Babu
2022-10-03 15:36       ` Reinette Chatre
2022-10-04 14:00         ` Moger, Babu
2022-10-04 16:15           ` Reinette Chatre
     [not found]             ` <a7766c60-5e2e-77f7-97ba-8a9628d3cca8@amd.com>
2022-10-04 19:05               ` Reinette Chatre
2022-10-07  8:33 ` [PATCH v5 00/12] x86/resctrl: Support for AMD QoS " Bagas Sanjaya
2022-10-07 15:51   ` Moger, Babu

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=166431036678.373387.1230453387335709239.stgit@bmoger-ubuntu \
    --to=babu.moger@amd.com \
    --cc=akpm@linux-foundation.org \
    --cc=bagasdotme@gmail.com \
    --cc=bp@alien8.de \
    --cc=chang.seok.bae@intel.com \
    --cc=corbet@lwn.net \
    --cc=damien.lemoal@opensource.wdc.com \
    --cc=daniel.sneddon@linux.intel.com \
    --cc=dave.hansen@linux.intel.com \
    --cc=eranian@google.com \
    --cc=fenghua.yu@intel.com \
    --cc=hpa@zytor.com \
    --cc=james.morse@arm.com \
    --cc=jmattson@google.com \
    --cc=jpoimboe@kernel.org \
    --cc=linux-doc@vger.kernel.org \
    --cc=linux-kernel@vger.kernel.org \
    --cc=mingo@redhat.com \
    --cc=paulmck@kernel.org \
    --cc=pawan.kumar.gupta@linux.intel.com \
    --cc=pbonzini@redhat.com \
    --cc=peterz@infradead.org \
    --cc=quic_neeraju@quicinc.com \
    --cc=rdunlap@infradead.org \
    --cc=reinette.chatre@intel.com \
    --cc=sandipan.das@amd.com \
    --cc=songmuchun@bytedance.com \
    --cc=tglx@linutronix.de \
    --cc=tony.luck@intel.com \
    --cc=x86@kernel.org \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.