* [Intel-gfx] [PATCH 1/2] drm/i915/pps: Add get_pps_idx() hook as part of pps_get_register() cleanup
@ 2022-10-18 8:39 Animesh Manna
2022-10-18 8:39 ` [Intel-gfx] [PATCH 2/2] drm/i915/pps: Enable 2nd pps for dual EDP scenario Animesh Manna
` (3 more replies)
0 siblings, 4 replies; 8+ messages in thread
From: Animesh Manna @ 2022-10-18 8:39 UTC (permalink / raw)
To: intel-gfx; +Cc: Jani Nikula
Simplified pps_get_register() which use get_pps_idx() hook to derive the
pps instance and get_pps_idx() will be initialized at pps_init().
v1: Initial version. Got r-b from Jani.
v2: Corrected unintentional change around memset() call. [Jani]
Cc: Jani Nikula <jani.nikula@intel.com>
Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
Cc: Uma Shankar <uma.shankar@intel.com>
Signed-off-by: Animesh Manna <animesh.manna@intel.com>
---
drivers/gpu/drm/i915/display/intel_display_types.h | 1 +
drivers/gpu/drm/i915/display/intel_pps.c | 14 +++++++++-----
2 files changed, 10 insertions(+), 5 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_display_types.h b/drivers/gpu/drm/i915/display/intel_display_types.h
index e2b853e9e51d..44ab296c1f04 100644
--- a/drivers/gpu/drm/i915/display/intel_display_types.h
+++ b/drivers/gpu/drm/i915/display/intel_display_types.h
@@ -1694,6 +1694,7 @@ struct intel_dp {
u8 (*preemph_max)(struct intel_dp *intel_dp);
u8 (*voltage_max)(struct intel_dp *intel_dp,
const struct intel_crtc_state *crtc_state);
+ int (*get_pps_idx)(struct intel_dp *intel_dp);
/* Displayport compliance testing */
struct intel_dp_compliance compliance;
diff --git a/drivers/gpu/drm/i915/display/intel_pps.c b/drivers/gpu/drm/i915/display/intel_pps.c
index 21944f5bf3a8..9ed62c891b8c 100644
--- a/drivers/gpu/drm/i915/display/intel_pps.c
+++ b/drivers/gpu/drm/i915/display/intel_pps.c
@@ -365,11 +365,8 @@ static void intel_pps_get_registers(struct intel_dp *intel_dp,
int pps_idx = 0;
memset(regs, 0, sizeof(*regs));
-
- if (IS_GEMINILAKE(dev_priv) || IS_BROXTON(dev_priv))
- pps_idx = bxt_power_sequencer_idx(intel_dp);
- else if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv))
- pps_idx = vlv_power_sequencer_pipe(intel_dp);
+ if (intel_dp->get_pps_idx)
+ pps_idx = intel_dp->get_pps_idx(intel_dp);
regs->pp_ctrl = PP_CONTROL(pps_idx);
regs->pp_stat = PP_STATUS(pps_idx);
@@ -1432,6 +1429,13 @@ void intel_pps_init(struct intel_dp *intel_dp)
intel_dp->pps.initializing = true;
INIT_DELAYED_WORK(&intel_dp->pps.panel_vdd_work, edp_panel_vdd_work);
+ if (IS_GEMINILAKE(i915) || IS_BROXTON(i915))
+ intel_dp->get_pps_idx = bxt_power_sequencer_idx;
+ else if (IS_VALLEYVIEW(i915) || IS_CHERRYVIEW(i915))
+ intel_dp->get_pps_idx = vlv_power_sequencer_pipe;
+ else
+ intel_dp->get_pps_idx = NULL;
+
pps_init_timestamps(intel_dp);
with_intel_pps_lock(intel_dp, wakeref) {
--
2.29.0
^ permalink raw reply related [flat|nested] 8+ messages in thread
* [Intel-gfx] [PATCH 2/2] drm/i915/pps: Enable 2nd pps for dual EDP scenario
2022-10-18 8:39 [Intel-gfx] [PATCH 1/2] drm/i915/pps: Add get_pps_idx() hook as part of pps_get_register() cleanup Animesh Manna
@ 2022-10-18 8:39 ` Animesh Manna
2022-10-18 9:16 ` [Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [1/2] drm/i915/pps: Add get_pps_idx() hook as part of pps_get_register() cleanup Patchwork
` (2 subsequent siblings)
3 siblings, 0 replies; 8+ messages in thread
From: Animesh Manna @ 2022-10-18 8:39 UTC (permalink / raw)
To: intel-gfx; +Cc: Jani Nikula
From display gen12 onwards to support dual EDP two instances of pps added.
Currently backlight controller and pps instance can be mapped together
for a specific panel. Currently dual PPS support is broken. This patch
fixes it and enables for display 12+.
v1: Iniital revision.
v2: Called intel_bios_panel_init w/o PNPID before intel_pps_init. [Jani]
v3: Set pps_id to -1 for pnpid type of panel which will be used by
bxt_power_sequencer_idx() to set 2nd pps instance as default for
2nd EDP panel. [Jani]
v4: Early return for PANEL_TYPE_FALLBACK. [Jani]
v5: Removed additional pps_id variable and reused backlight
controller. [Jani]
Cc: Jani Nikula <jani.nikula@intel.com>
Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
Cc: Uma Shankar <uma.shankar@intel.com>
Signed-off-by: Animesh Manna <animesh.manna@intel.com>
---
drivers/gpu/drm/i915/display/intel_bios.c | 9 ++++++++-
drivers/gpu/drm/i915/display/intel_bios.h | 2 +-
drivers/gpu/drm/i915/display/intel_dp.c | 10 +++++++---
drivers/gpu/drm/i915/display/intel_pps.c | 12 +++++++++++-
4 files changed, 27 insertions(+), 6 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_bios.c b/drivers/gpu/drm/i915/display/intel_bios.c
index c2987f2c2b2e..1c1eea061fbb 100644
--- a/drivers/gpu/drm/i915/display/intel_bios.c
+++ b/drivers/gpu/drm/i915/display/intel_bios.c
@@ -3183,7 +3183,7 @@ void intel_bios_init(struct drm_i915_private *i915)
kfree(oprom_vbt);
}
-void intel_bios_init_panel(struct drm_i915_private *i915,
+bool intel_bios_init_panel(struct drm_i915_private *i915,
struct intel_panel *panel,
const struct intel_bios_encoder_data *devdata,
const struct edid *edid)
@@ -3192,6 +3192,11 @@ void intel_bios_init_panel(struct drm_i915_private *i915,
panel->vbt.panel_type = get_panel_type(i915, devdata, edid);
+ if (panel->vbt.panel_type == PANEL_TYPE_FALLBACK && !edid) {
+ panel->vbt.backlight.controller = -1;
+ return true;
+ }
+
parse_panel_options(i915, panel);
parse_generic_dtd(i915, panel);
parse_lfp_data(i915, panel);
@@ -3203,6 +3208,8 @@ void intel_bios_init_panel(struct drm_i915_private *i915,
parse_psr(i915, panel);
parse_mipi_config(i915, panel);
parse_mipi_sequence(i915, panel);
+
+ return false;
}
/**
diff --git a/drivers/gpu/drm/i915/display/intel_bios.h b/drivers/gpu/drm/i915/display/intel_bios.h
index e375405a7828..f8ef0274f3ee 100644
--- a/drivers/gpu/drm/i915/display/intel_bios.h
+++ b/drivers/gpu/drm/i915/display/intel_bios.h
@@ -232,7 +232,7 @@ struct mipi_pps_data {
} __packed;
void intel_bios_init(struct drm_i915_private *dev_priv);
-void intel_bios_init_panel(struct drm_i915_private *dev_priv,
+bool intel_bios_init_panel(struct drm_i915_private *dev_priv,
struct intel_panel *panel,
const struct intel_bios_encoder_data *devdata,
const struct edid *edid);
diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
index a060903891b2..6d3a0fe06359 100644
--- a/drivers/gpu/drm/i915/display/intel_dp.c
+++ b/drivers/gpu/drm/i915/display/intel_dp.c
@@ -5234,6 +5234,7 @@ static bool intel_edp_init_connector(struct intel_dp *intel_dp,
struct intel_encoder *encoder = &dp_to_dig_port(intel_dp)->base;
bool has_dpcd;
struct edid *edid;
+ bool retry;
if (!intel_dp_is_edp(intel_dp))
return true;
@@ -5253,6 +5254,9 @@ static bool intel_edp_init_connector(struct intel_dp *intel_dp,
return false;
}
+ retry = intel_bios_init_panel(dev_priv, &intel_connector->panel,
+ encoder->devdata, NULL);
+
intel_pps_init(intel_dp);
/* Cache DPCD and EDID for edp. */
@@ -5287,9 +5291,9 @@ static bool intel_edp_init_connector(struct intel_dp *intel_dp,
edid = ERR_PTR(-ENOENT);
}
intel_connector->edid = edid;
-
- intel_bios_init_panel(dev_priv, &intel_connector->panel,
- encoder->devdata, IS_ERR(edid) ? NULL : edid);
+ if (retry)
+ intel_bios_init_panel(dev_priv, &intel_connector->panel,
+ encoder->devdata, IS_ERR(edid) ? NULL : edid);
intel_panel_add_edid_fixed_modes(intel_connector, true);
diff --git a/drivers/gpu/drm/i915/display/intel_pps.c b/drivers/gpu/drm/i915/display/intel_pps.c
index 9ed62c891b8c..f9899305d6e0 100644
--- a/drivers/gpu/drm/i915/display/intel_pps.c
+++ b/drivers/gpu/drm/i915/display/intel_pps.c
@@ -218,6 +218,16 @@ bxt_power_sequencer_idx(struct intel_dp *intel_dp)
/* We should never land here with regular DP ports */
drm_WARN_ON(&dev_priv->drm, !intel_dp_is_edp(intel_dp));
+ if (backlight_controller == -1) {
+ /*
+ * Use 2nd PPS instance as default for 2nd EDP panel.
+ */
+ if (connector->encoder->port == PORT_A)
+ return 0;
+ else
+ return 1;
+ }
+
if (!intel_dp->pps.pps_reset)
return backlight_controller;
@@ -1429,7 +1439,7 @@ void intel_pps_init(struct intel_dp *intel_dp)
intel_dp->pps.initializing = true;
INIT_DELAYED_WORK(&intel_dp->pps.panel_vdd_work, edp_panel_vdd_work);
- if (IS_GEMINILAKE(i915) || IS_BROXTON(i915))
+ if (IS_GEMINILAKE(i915) || IS_BROXTON(i915) || DISPLAY_VER(i915) >= 12)
intel_dp->get_pps_idx = bxt_power_sequencer_idx;
else if (IS_VALLEYVIEW(i915) || IS_CHERRYVIEW(i915))
intel_dp->get_pps_idx = vlv_power_sequencer_pipe;
--
2.29.0
^ permalink raw reply related [flat|nested] 8+ messages in thread
* [Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [1/2] drm/i915/pps: Add get_pps_idx() hook as part of pps_get_register() cleanup
2022-10-18 8:39 [Intel-gfx] [PATCH 1/2] drm/i915/pps: Add get_pps_idx() hook as part of pps_get_register() cleanup Animesh Manna
2022-10-18 8:39 ` [Intel-gfx] [PATCH 2/2] drm/i915/pps: Enable 2nd pps for dual EDP scenario Animesh Manna
@ 2022-10-18 9:16 ` Patchwork
2022-10-19 3:58 ` [Intel-gfx] ✓ Fi.CI.IGT: " Patchwork
2022-11-04 11:58 ` [Intel-gfx] ✗ Fi.CI.BAT: failure for series starting with [1/2] drm/i915/pps: Add get_pps_idx() hook as part of pps_get_register() cleanup (rev2) Patchwork
3 siblings, 0 replies; 8+ messages in thread
From: Patchwork @ 2022-10-18 9:16 UTC (permalink / raw)
To: Manna, Animesh; +Cc: intel-gfx
[-- Attachment #1: Type: text/plain, Size: 4887 bytes --]
== Series Details ==
Series: series starting with [1/2] drm/i915/pps: Add get_pps_idx() hook as part of pps_get_register() cleanup
URL : https://patchwork.freedesktop.org/series/109820/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_12254 -> Patchwork_109820v1
====================================================
Summary
-------
**SUCCESS**
No regressions found.
External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109820v1/index.html
Participating hosts (45 -> 43)
------------------------------
Additional (2): fi-hsw-4770 bat-atsm-1
Missing (4): fi-kbl-soraka fi-bdw-samus fi-icl-u2 fi-kbl-guc
Known issues
------------
Here are the changes found in Patchwork_109820v1 that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@gem_exec_suspend@basic-s3@smem:
- fi-bdw-gvtdvm: NOTRUN -> [FAIL][1] ([fdo#103375])
[1]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109820v1/fi-bdw-gvtdvm/igt@gem_exec_suspend@basic-s3@smem.html
* igt@i915_pm_backlight@basic-brightness:
- fi-hsw-4770: NOTRUN -> [SKIP][2] ([fdo#109271] / [i915#3012])
[2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109820v1/fi-hsw-4770/igt@i915_pm_backlight@basic-brightness.html
* igt@i915_pm_rpm@module-reload:
- fi-hsw-4770: NOTRUN -> [INCOMPLETE][3] ([i915#7221])
[3]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109820v1/fi-hsw-4770/igt@i915_pm_rpm@module-reload.html
* igt@kms_addfb_basic@addfb25-y-tiled-small-legacy:
- fi-hsw-4770: NOTRUN -> [SKIP][4] ([fdo#109271]) +9 similar issues
[4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109820v1/fi-hsw-4770/igt@kms_addfb_basic@addfb25-y-tiled-small-legacy.html
* igt@kms_chamelium@common-hpd-after-suspend:
- fi-bdw-gvtdvm: NOTRUN -> [SKIP][5] ([fdo#109271] / [fdo#111827])
[5]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109820v1/fi-bdw-gvtdvm/igt@kms_chamelium@common-hpd-after-suspend.html
* igt@kms_chamelium@dp-crc-fast:
- fi-hsw-4770: NOTRUN -> [SKIP][6] ([fdo#109271] / [fdo#111827]) +7 similar issues
[6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109820v1/fi-hsw-4770/igt@kms_chamelium@dp-crc-fast.html
* igt@kms_pipe_crc_basic@suspend-read-crc:
- fi-bdw-gvtdvm: NOTRUN -> [SKIP][7] ([fdo#109271])
[7]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109820v1/fi-bdw-gvtdvm/igt@kms_pipe_crc_basic@suspend-read-crc.html
* igt@kms_psr@sprite_plane_onoff:
- fi-hsw-4770: NOTRUN -> [SKIP][8] ([fdo#109271] / [i915#1072]) +3 similar issues
[8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109820v1/fi-hsw-4770/igt@kms_psr@sprite_plane_onoff.html
* igt@runner@aborted:
- fi-hsw-4770: NOTRUN -> [FAIL][9] ([fdo#109271] / [i915#4312] / [i915#5594])
[9]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109820v1/fi-hsw-4770/igt@runner@aborted.html
#### Warnings ####
* igt@i915_suspend@basic-s3-without-i915:
- fi-bdw-gvtdvm: [INCOMPLETE][10] ([i915#146]) -> [FAIL][11] ([fdo#103375])
[10]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12254/fi-bdw-gvtdvm/igt@i915_suspend@basic-s3-without-i915.html
[11]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109820v1/fi-bdw-gvtdvm/igt@i915_suspend@basic-s3-without-i915.html
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
[fdo#103375]: https://bugs.freedesktop.org/show_bug.cgi?id=103375
[fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
[fdo#111827]: https://bugs.freedesktop.org/show_bug.cgi?id=111827
[i915#1072]: https://gitlab.freedesktop.org/drm/intel/issues/1072
[i915#146]: https://gitlab.freedesktop.org/drm/intel/issues/146
[i915#3012]: https://gitlab.freedesktop.org/drm/intel/issues/3012
[i915#4312]: https://gitlab.freedesktop.org/drm/intel/issues/4312
[i915#5594]: https://gitlab.freedesktop.org/drm/intel/issues/5594
[i915#7220]: https://gitlab.freedesktop.org/drm/intel/issues/7220
[i915#7221]: https://gitlab.freedesktop.org/drm/intel/issues/7221
Build changes
-------------
* Linux: CI_DRM_12254 -> Patchwork_109820v1
CI-20190529: 20190529
CI_DRM_12254: 2e6cdde56f896add665edb8d2f6d3dfce8b1b3b6 @ git://anongit.freedesktop.org/gfx-ci/linux
IGT_7018: 8312a2fe3f3287ba4ac4bc8d100de0734480f482 @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
Patchwork_109820v1: 2e6cdde56f896add665edb8d2f6d3dfce8b1b3b6 @ git://anongit.freedesktop.org/gfx-ci/linux
### Linux commits
d30c74ae83d9 drm/i915/pps: Enable 2nd pps for dual EDP scenario
9826402fcca7 drm/i915/pps: Add get_pps_idx() hook as part of pps_get_register() cleanup
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109820v1/index.html
[-- Attachment #2: Type: text/html, Size: 6203 bytes --]
^ permalink raw reply [flat|nested] 8+ messages in thread
* [Intel-gfx] ✓ Fi.CI.IGT: success for series starting with [1/2] drm/i915/pps: Add get_pps_idx() hook as part of pps_get_register() cleanup
2022-10-18 8:39 [Intel-gfx] [PATCH 1/2] drm/i915/pps: Add get_pps_idx() hook as part of pps_get_register() cleanup Animesh Manna
2022-10-18 8:39 ` [Intel-gfx] [PATCH 2/2] drm/i915/pps: Enable 2nd pps for dual EDP scenario Animesh Manna
2022-10-18 9:16 ` [Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [1/2] drm/i915/pps: Add get_pps_idx() hook as part of pps_get_register() cleanup Patchwork
@ 2022-10-19 3:58 ` Patchwork
2022-11-04 11:58 ` [Intel-gfx] ✗ Fi.CI.BAT: failure for series starting with [1/2] drm/i915/pps: Add get_pps_idx() hook as part of pps_get_register() cleanup (rev2) Patchwork
3 siblings, 0 replies; 8+ messages in thread
From: Patchwork @ 2022-10-19 3:58 UTC (permalink / raw)
To: Manna, Animesh; +Cc: intel-gfx
[-- Attachment #1: Type: text/plain, Size: 6476 bytes --]
== Series Details ==
Series: series starting with [1/2] drm/i915/pps: Add get_pps_idx() hook as part of pps_get_register() cleanup
URL : https://patchwork.freedesktop.org/series/109820/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_12254_full -> Patchwork_109820v1_full
====================================================
Summary
-------
**SUCCESS**
No regressions found.
Participating hosts (11 -> 11)
------------------------------
No changes in participating hosts
Known issues
------------
Here are the changes found in Patchwork_109820v1_full that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@gen9_exec_parse@allowed-single:
- shard-tglb: NOTRUN -> [SKIP][1] ([i915#2527] / [i915#2856])
[1]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109820v1/shard-tglb1/igt@gen9_exec_parse@allowed-single.html
* igt@i915_selftest@live@workarounds:
- shard-tglb: NOTRUN -> [INCOMPLETE][2] ([i915#7222])
[2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109820v1/shard-tglb1/igt@i915_selftest@live@workarounds.html
* igt@kms_ccs@pipe-b-crc-sprite-planes-basic-4_tiled_dg2_mc_ccs:
- shard-tglb: NOTRUN -> [SKIP][3] ([i915#6095])
[3]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109820v1/shard-tglb1/igt@kms_ccs@pipe-b-crc-sprite-planes-basic-4_tiled_dg2_mc_ccs.html
* igt@kms_ccs@pipe-c-bad-pixel-format-y_tiled_gen12_mc_ccs:
- shard-tglb: NOTRUN -> [SKIP][4] ([i915#3689] / [i915#3886])
[4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109820v1/shard-tglb1/igt@kms_ccs@pipe-c-bad-pixel-format-y_tiled_gen12_mc_ccs.html
* igt@kms_content_protection@content_type_change:
- shard-tglb: NOTRUN -> [SKIP][5] ([i915#7118])
[5]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109820v1/shard-tglb1/igt@kms_content_protection@content_type_change.html
* igt@kms_cursor_crc@cursor-sliding-32x10:
- shard-tglb: NOTRUN -> [SKIP][6] ([i915#3555]) +1 similar issue
[6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109820v1/shard-tglb1/igt@kms_cursor_crc@cursor-sliding-32x10.html
* igt@kms_flip@2x-flip-vs-dpms-off-vs-modeset-interruptible:
- shard-tglb: NOTRUN -> [SKIP][7] ([fdo#109274] / [fdo#111825] / [i915#3637])
[7]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109820v1/shard-tglb1/igt@kms_flip@2x-flip-vs-dpms-off-vs-modeset-interruptible.html
* igt@kms_frontbuffer_tracking@fbcpsr-2p-primscrn-indfb-pgflip-blt:
- shard-tglb: NOTRUN -> [SKIP][8] ([fdo#109280] / [fdo#111825]) +2 similar issues
[8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109820v1/shard-tglb1/igt@kms_frontbuffer_tracking@fbcpsr-2p-primscrn-indfb-pgflip-blt.html
* igt@kms_plane_scaling@plane-upscale-with-rotation-factor-0-25@pipe-c-edp-1:
- shard-tglb: NOTRUN -> [SKIP][9] ([i915#5176]) +3 similar issues
[9]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109820v1/shard-tglb1/igt@kms_plane_scaling@plane-upscale-with-rotation-factor-0-25@pipe-c-edp-1.html
#### Possible fixes ####
* igt@gem_exec_fair@basic-flow@rcs0:
- shard-tglb: [FAIL][10] ([i915#2842]) -> [PASS][11]
[10]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12254/shard-tglb1/igt@gem_exec_fair@basic-flow@rcs0.html
[11]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109820v1/shard-tglb1/igt@gem_exec_fair@basic-flow@rcs0.html
* igt@gem_huc_copy@huc-copy:
- shard-tglb: [SKIP][12] ([i915#2190]) -> [PASS][13]
[12]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12254/shard-tglb7/igt@gem_huc_copy@huc-copy.html
[13]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109820v1/shard-tglb1/igt@gem_huc_copy@huc-copy.html
#### Warnings ####
* igt@gem_pwrite@basic-exhaustion:
- shard-apl: [INCOMPLETE][14] ([i915#7248]) -> [INCOMPLETE][15] ([i915#7227] / [i915#7248])
[14]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12254/shard-apl7/igt@gem_pwrite@basic-exhaustion.html
[15]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109820v1/shard-apl7/igt@gem_pwrite@basic-exhaustion.html
* igt@gem_workarounds@suspend-resume:
- shard-apl: [INCOMPLETE][16] ([i915#7231] / [i915#7259]) -> [INCOMPLETE][17] ([i915#7259])
[16]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12254/shard-apl3/igt@gem_workarounds@suspend-resume.html
[17]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109820v1/shard-apl6/igt@gem_workarounds@suspend-resume.html
[fdo#109274]: https://bugs.freedesktop.org/show_bug.cgi?id=109274
[fdo#109280]: https://bugs.freedesktop.org/show_bug.cgi?id=109280
[fdo#111825]: https://bugs.freedesktop.org/show_bug.cgi?id=111825
[i915#2190]: https://gitlab.freedesktop.org/drm/intel/issues/2190
[i915#2527]: https://gitlab.freedesktop.org/drm/intel/issues/2527
[i915#2842]: https://gitlab.freedesktop.org/drm/intel/issues/2842
[i915#2856]: https://gitlab.freedesktop.org/drm/intel/issues/2856
[i915#3555]: https://gitlab.freedesktop.org/drm/intel/issues/3555
[i915#3637]: https://gitlab.freedesktop.org/drm/intel/issues/3637
[i915#3689]: https://gitlab.freedesktop.org/drm/intel/issues/3689
[i915#3886]: https://gitlab.freedesktop.org/drm/intel/issues/3886
[i915#5176]: https://gitlab.freedesktop.org/drm/intel/issues/5176
[i915#6095]: https://gitlab.freedesktop.org/drm/intel/issues/6095
[i915#7118]: https://gitlab.freedesktop.org/drm/intel/issues/7118
[i915#7222]: https://gitlab.freedesktop.org/drm/intel/issues/7222
[i915#7227]: https://gitlab.freedesktop.org/drm/intel/issues/7227
[i915#7231]: https://gitlab.freedesktop.org/drm/intel/issues/7231
[i915#7248]: https://gitlab.freedesktop.org/drm/intel/issues/7248
[i915#7259]: https://gitlab.freedesktop.org/drm/intel/issues/7259
Build changes
-------------
* Linux: CI_DRM_12254 -> Patchwork_109820v1
CI-20190529: 20190529
CI_DRM_12254: 2e6cdde56f896add665edb8d2f6d3dfce8b1b3b6 @ git://anongit.freedesktop.org/gfx-ci/linux
IGT_7018: 8312a2fe3f3287ba4ac4bc8d100de0734480f482 @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
Patchwork_109820v1: 2e6cdde56f896add665edb8d2f6d3dfce8b1b3b6 @ git://anongit.freedesktop.org/gfx-ci/linux
piglit_4509: fdc5a4ca11124ab8413c7988896eec4c97336694 @ git://anongit.freedesktop.org/piglit
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109820v1/index.html
[-- Attachment #2: Type: text/html, Size: 7577 bytes --]
^ permalink raw reply [flat|nested] 8+ messages in thread
* [Intel-gfx] ✗ Fi.CI.BAT: failure for series starting with [1/2] drm/i915/pps: Add get_pps_idx() hook as part of pps_get_register() cleanup (rev2)
2022-10-18 8:39 [Intel-gfx] [PATCH 1/2] drm/i915/pps: Add get_pps_idx() hook as part of pps_get_register() cleanup Animesh Manna
` (2 preceding siblings ...)
2022-10-19 3:58 ` [Intel-gfx] ✓ Fi.CI.IGT: " Patchwork
@ 2022-11-04 11:58 ` Patchwork
3 siblings, 0 replies; 8+ messages in thread
From: Patchwork @ 2022-11-04 11:58 UTC (permalink / raw)
To: Animesh Manna; +Cc: intel-gfx
[-- Attachment #1: Type: text/plain, Size: 8802 bytes --]
== Series Details ==
Series: series starting with [1/2] drm/i915/pps: Add get_pps_idx() hook as part of pps_get_register() cleanup (rev2)
URL : https://patchwork.freedesktop.org/series/109820/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_12342 -> Patchwork_109820v2
====================================================
Summary
-------
**FAILURE**
Serious unknown changes coming with Patchwork_109820v2 absolutely need to be
verified manually.
If you think the reported changes have nothing to do with the changes
introduced in Patchwork_109820v2, please notify your bug team to allow them
to document this new failure mode, which will reduce false positives in CI.
External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109820v2/index.html
Participating hosts (27 -> 35)
------------------------------
Additional (10): bat-dg2-8 bat-dg2-9 bat-adlp-6 bat-adlp-4 bat-adln-1 bat-rplp-1 bat-rpls-1 bat-rpls-2 bat-dg2-11 bat-jsl-1
Missing (2): fi-ctg-p8600 fi-bdw-samus
Possible new issues
-------------------
Here are the unknown changes that may have been introduced in Patchwork_109820v2:
### IGT changes ###
#### Possible regressions ####
* igt@i915_module_load@load:
- bat-adlp-4: NOTRUN -> [DMESG-WARN][1]
[1]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109820v2/bat-adlp-4/igt@i915_module_load@load.html
#### Suppressed ####
The following results come from untrusted machines, tests, or statuses.
They do not affect the overall result.
* igt@i915_module_load@load:
- {bat-rplp-1}: NOTRUN -> [DMESG-WARN][2]
[2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109820v2/bat-rplp-1/igt@i915_module_load@load.html
Known issues
------------
Here are the changes found in Patchwork_109820v2 that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@core_hotunplug@unbind-rebind:
- fi-apl-guc: [PASS][3] -> [INCOMPLETE][4] ([i915#7073])
[3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12342/fi-apl-guc/igt@core_hotunplug@unbind-rebind.html
[4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109820v2/fi-apl-guc/igt@core_hotunplug@unbind-rebind.html
* igt@gem_exec_gttfill@basic:
- fi-pnv-d510: [PASS][5] -> [FAIL][6] ([i915#7229])
[5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12342/fi-pnv-d510/igt@gem_exec_gttfill@basic.html
[6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109820v2/fi-pnv-d510/igt@gem_exec_gttfill@basic.html
* igt@gem_linear_blits@basic:
- fi-pnv-d510: [PASS][7] -> [SKIP][8] ([fdo#109271])
[7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12342/fi-pnv-d510/igt@gem_linear_blits@basic.html
[8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109820v2/fi-pnv-d510/igt@gem_linear_blits@basic.html
* igt@i915_selftest@live@hangcheck:
- fi-hsw-4770: [PASS][9] -> [INCOMPLETE][10] ([i915#4785])
[9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12342/fi-hsw-4770/igt@i915_selftest@live@hangcheck.html
[10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109820v2/fi-hsw-4770/igt@i915_selftest@live@hangcheck.html
- fi-hsw-g3258: [PASS][11] -> [INCOMPLETE][12] ([i915#3303] / [i915#4785])
[11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12342/fi-hsw-g3258/igt@i915_selftest@live@hangcheck.html
[12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109820v2/fi-hsw-g3258/igt@i915_selftest@live@hangcheck.html
* igt@runner@aborted:
- fi-hsw-4770: NOTRUN -> [FAIL][13] ([fdo#109271] / [i915#4312] / [i915#5594])
[13]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109820v2/fi-hsw-4770/igt@runner@aborted.html
- bat-adlp-4: NOTRUN -> [FAIL][14] ([i915#4312])
[14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109820v2/bat-adlp-4/igt@runner@aborted.html
- fi-hsw-g3258: NOTRUN -> [FAIL][15] ([fdo#109271] / [i915#4312] / [i915#4991])
[15]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109820v2/fi-hsw-g3258/igt@runner@aborted.html
#### Possible fixes ####
* igt@kms_cursor_legacy@basic-busy-flip-before-cursor@atomic-transitions-varying-size:
- fi-bsw-kefka: [FAIL][16] ([i915#6298]) -> [PASS][17]
[16]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12342/fi-bsw-kefka/igt@kms_cursor_legacy@basic-busy-flip-before-cursor@atomic-transitions-varying-size.html
[17]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109820v2/fi-bsw-kefka/igt@kms_cursor_legacy@basic-busy-flip-before-cursor@atomic-transitions-varying-size.html
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
[fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
[fdo#109285]: https://bugs.freedesktop.org/show_bug.cgi?id=109285
[fdo#109295]: https://bugs.freedesktop.org/show_bug.cgi?id=109295
[fdo#111827]: https://bugs.freedesktop.org/show_bug.cgi?id=111827
[i915#1072]: https://gitlab.freedesktop.org/drm/intel/issues/1072
[i915#1155]: https://gitlab.freedesktop.org/drm/intel/issues/1155
[i915#1845]: https://gitlab.freedesktop.org/drm/intel/issues/1845
[i915#1849]: https://gitlab.freedesktop.org/drm/intel/issues/1849
[i915#2190]: https://gitlab.freedesktop.org/drm/intel/issues/2190
[i915#2582]: https://gitlab.freedesktop.org/drm/intel/issues/2582
[i915#3003]: https://gitlab.freedesktop.org/drm/intel/issues/3003
[i915#3282]: https://gitlab.freedesktop.org/drm/intel/issues/3282
[i915#3291]: https://gitlab.freedesktop.org/drm/intel/issues/3291
[i915#3301]: https://gitlab.freedesktop.org/drm/intel/issues/3301
[i915#3303]: https://gitlab.freedesktop.org/drm/intel/issues/3303
[i915#3555]: https://gitlab.freedesktop.org/drm/intel/issues/3555
[i915#3637]: https://gitlab.freedesktop.org/drm/intel/issues/3637
[i915#3708]: https://gitlab.freedesktop.org/drm/intel/issues/3708
[i915#4077]: https://gitlab.freedesktop.org/drm/intel/issues/4077
[i915#4079]: https://gitlab.freedesktop.org/drm/intel/issues/4079
[i915#4083]: https://gitlab.freedesktop.org/drm/intel/issues/4083
[i915#4103]: https://gitlab.freedesktop.org/drm/intel/issues/4103
[i915#4212]: https://gitlab.freedesktop.org/drm/intel/issues/4212
[i915#4213]: https://gitlab.freedesktop.org/drm/intel/issues/4213
[i915#4215]: https://gitlab.freedesktop.org/drm/intel/issues/4215
[i915#4258]: https://gitlab.freedesktop.org/drm/intel/issues/4258
[i915#4312]: https://gitlab.freedesktop.org/drm/intel/issues/4312
[i915#4579]: https://gitlab.freedesktop.org/drm/intel/issues/4579
[i915#4613]: https://gitlab.freedesktop.org/drm/intel/issues/4613
[i915#4785]: https://gitlab.freedesktop.org/drm/intel/issues/4785
[i915#4873]: https://gitlab.freedesktop.org/drm/intel/issues/4873
[i915#4991]: https://gitlab.freedesktop.org/drm/intel/issues/4991
[i915#5190]: https://gitlab.freedesktop.org/drm/intel/issues/5190
[i915#5274]: https://gitlab.freedesktop.org/drm/intel/issues/5274
[i915#5278]: https://gitlab.freedesktop.org/drm/intel/issues/5278
[i915#5354]: https://gitlab.freedesktop.org/drm/intel/issues/5354
[i915#5594]: https://gitlab.freedesktop.org/drm/intel/issues/5594
[i915#6298]: https://gitlab.freedesktop.org/drm/intel/issues/6298
[i915#6367]: https://gitlab.freedesktop.org/drm/intel/issues/6367
[i915#6434]: https://gitlab.freedesktop.org/drm/intel/issues/6434
[i915#6559]: https://gitlab.freedesktop.org/drm/intel/issues/6559
[i915#6621]: https://gitlab.freedesktop.org/drm/intel/issues/6621
[i915#6645]: https://gitlab.freedesktop.org/drm/intel/issues/6645
[i915#6763]: https://gitlab.freedesktop.org/drm/intel/issues/6763
[i915#6997]: https://gitlab.freedesktop.org/drm/intel/issues/6997
[i915#7073]: https://gitlab.freedesktop.org/drm/intel/issues/7073
[i915#7229]: https://gitlab.freedesktop.org/drm/intel/issues/7229
[i915#7346]: https://gitlab.freedesktop.org/drm/intel/issues/7346
[i915#7456]: https://gitlab.freedesktop.org/drm/intel/issues/7456
Build changes
-------------
* Linux: CI_DRM_12342 -> Patchwork_109820v2
CI-20190529: 20190529
CI_DRM_12342: 44f62f6f335a4bec6854162b502c637e061030f0 @ git://anongit.freedesktop.org/gfx-ci/linux
IGT_7043: eef0a0c904846509f8185330ccd210a578ba55ec @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
Patchwork_109820v2: 44f62f6f335a4bec6854162b502c637e061030f0 @ git://anongit.freedesktop.org/gfx-ci/linux
### Linux commits
99bad070459c drm/i915/pps: Enable 2nd pps for dual EDP scenario
034e607d6a0b drm/i915/pps: Add get_pps_idx() hook as part of pps_get_register() cleanup
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109820v2/index.html
[-- Attachment #2: Type: text/html, Size: 7291 bytes --]
^ permalink raw reply [flat|nested] 8+ messages in thread
* [Intel-gfx] [PATCH 1/2] drm/i915/pps: Add get_pps_idx() hook as part of pps_get_register() cleanup
@ 2022-10-10 15:54 Animesh Manna
2022-10-10 16:56 ` [Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [1/2] " Patchwork
0 siblings, 1 reply; 8+ messages in thread
From: Animesh Manna @ 2022-10-10 15:54 UTC (permalink / raw)
To: intel-gfx; +Cc: Jani Nikula
Simplified pps_get_register() which use get_pps_idx() hook to derive the
pps instance and get_pps_idx() will be initialized at pps_init().
v1: Initial version. Got r-b from Jani.
Cc: Jani Nikula <jani.nikula@intel.com>
Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
Cc: Uma Shankar <uma.shankar@intel.com>
Signed-off-by: Animesh Manna <animesh.manna@intel.com>
---
.../gpu/drm/i915/display/intel_display_types.h | 1 +
drivers/gpu/drm/i915/display/intel_pps.c | 15 ++++++++++-----
2 files changed, 11 insertions(+), 5 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_display_types.h b/drivers/gpu/drm/i915/display/intel_display_types.h
index e2b853e9e51d..44ab296c1f04 100644
--- a/drivers/gpu/drm/i915/display/intel_display_types.h
+++ b/drivers/gpu/drm/i915/display/intel_display_types.h
@@ -1694,6 +1694,7 @@ struct intel_dp {
u8 (*preemph_max)(struct intel_dp *intel_dp);
u8 (*voltage_max)(struct intel_dp *intel_dp,
const struct intel_crtc_state *crtc_state);
+ int (*get_pps_idx)(struct intel_dp *intel_dp);
/* Displayport compliance testing */
struct intel_dp_compliance compliance;
diff --git a/drivers/gpu/drm/i915/display/intel_pps.c b/drivers/gpu/drm/i915/display/intel_pps.c
index 21944f5bf3a8..b972fa6ec00d 100644
--- a/drivers/gpu/drm/i915/display/intel_pps.c
+++ b/drivers/gpu/drm/i915/display/intel_pps.c
@@ -364,12 +364,10 @@ static void intel_pps_get_registers(struct intel_dp *intel_dp,
struct drm_i915_private *dev_priv = dp_to_i915(intel_dp);
int pps_idx = 0;
- memset(regs, 0, sizeof(*regs));
+ if (intel_dp->get_pps_idx)
+ pps_idx = intel_dp->get_pps_idx(intel_dp);
- if (IS_GEMINILAKE(dev_priv) || IS_BROXTON(dev_priv))
- pps_idx = bxt_power_sequencer_idx(intel_dp);
- else if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv))
- pps_idx = vlv_power_sequencer_pipe(intel_dp);
+ memset(regs, 0, sizeof(*regs));
regs->pp_ctrl = PP_CONTROL(pps_idx);
regs->pp_stat = PP_STATUS(pps_idx);
@@ -1432,6 +1430,13 @@ void intel_pps_init(struct intel_dp *intel_dp)
intel_dp->pps.initializing = true;
INIT_DELAYED_WORK(&intel_dp->pps.panel_vdd_work, edp_panel_vdd_work);
+ if (IS_GEMINILAKE(i915) || IS_BROXTON(i915))
+ intel_dp->get_pps_idx = bxt_power_sequencer_idx;
+ else if (IS_VALLEYVIEW(i915) || IS_CHERRYVIEW(i915))
+ intel_dp->get_pps_idx = vlv_power_sequencer_pipe;
+ else
+ intel_dp->get_pps_idx = NULL;
+
pps_init_timestamps(intel_dp);
with_intel_pps_lock(intel_dp, wakeref) {
--
2.29.0
^ permalink raw reply related [flat|nested] 8+ messages in thread
* [Intel-gfx] [PATCH 1/2] drm/i915/pps: Add get_pps_idx() hook as part of pps_get_register() cleanup
@ 2022-09-27 17:45 Animesh Manna
2022-09-28 2:51 ` [Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [1/2] " Patchwork
0 siblings, 1 reply; 8+ messages in thread
From: Animesh Manna @ 2022-09-27 17:45 UTC (permalink / raw)
To: intel-gfx; +Cc: Jani Nikula
Simplified pps_get_register() which use get_pps_idx() hook to derive the
pps instance and get_pps_idx() will be initialized at pps_init().
v1: Initial version. Got r-b from Jani.
Cc: Jani Nikula <jani.nikula@intel.com>
Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
Cc: Uma Shankar <uma.shankar@intel.com>
Signed-off-by: Animesh Manna <animesh.manna@intel.com>
---
.../gpu/drm/i915/display/intel_display_types.h | 1 +
drivers/gpu/drm/i915/display/intel_pps.c | 15 ++++++++++-----
2 files changed, 11 insertions(+), 5 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_display_types.h b/drivers/gpu/drm/i915/display/intel_display_types.h
index 0da9b208d56e..b78b29951241 100644
--- a/drivers/gpu/drm/i915/display/intel_display_types.h
+++ b/drivers/gpu/drm/i915/display/intel_display_types.h
@@ -1693,6 +1693,7 @@ struct intel_dp {
u8 (*preemph_max)(struct intel_dp *intel_dp);
u8 (*voltage_max)(struct intel_dp *intel_dp,
const struct intel_crtc_state *crtc_state);
+ int (*get_pps_idx)(struct intel_dp *intel_dp);
/* Displayport compliance testing */
struct intel_dp_compliance compliance;
diff --git a/drivers/gpu/drm/i915/display/intel_pps.c b/drivers/gpu/drm/i915/display/intel_pps.c
index 21944f5bf3a8..b972fa6ec00d 100644
--- a/drivers/gpu/drm/i915/display/intel_pps.c
+++ b/drivers/gpu/drm/i915/display/intel_pps.c
@@ -364,12 +364,10 @@ static void intel_pps_get_registers(struct intel_dp *intel_dp,
struct drm_i915_private *dev_priv = dp_to_i915(intel_dp);
int pps_idx = 0;
- memset(regs, 0, sizeof(*regs));
+ if (intel_dp->get_pps_idx)
+ pps_idx = intel_dp->get_pps_idx(intel_dp);
- if (IS_GEMINILAKE(dev_priv) || IS_BROXTON(dev_priv))
- pps_idx = bxt_power_sequencer_idx(intel_dp);
- else if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv))
- pps_idx = vlv_power_sequencer_pipe(intel_dp);
+ memset(regs, 0, sizeof(*regs));
regs->pp_ctrl = PP_CONTROL(pps_idx);
regs->pp_stat = PP_STATUS(pps_idx);
@@ -1432,6 +1430,13 @@ void intel_pps_init(struct intel_dp *intel_dp)
intel_dp->pps.initializing = true;
INIT_DELAYED_WORK(&intel_dp->pps.panel_vdd_work, edp_panel_vdd_work);
+ if (IS_GEMINILAKE(i915) || IS_BROXTON(i915))
+ intel_dp->get_pps_idx = bxt_power_sequencer_idx;
+ else if (IS_VALLEYVIEW(i915) || IS_CHERRYVIEW(i915))
+ intel_dp->get_pps_idx = vlv_power_sequencer_pipe;
+ else
+ intel_dp->get_pps_idx = NULL;
+
pps_init_timestamps(intel_dp);
with_intel_pps_lock(intel_dp, wakeref) {
--
2.29.0
^ permalink raw reply related [flat|nested] 8+ messages in thread
* [Intel-gfx] [PATCH 1/2] drm/i915/pps: Add get_pps_idx() hook as part of pps_get_register() cleanup
@ 2022-09-16 8:31 Animesh Manna
2022-09-16 10:16 ` [Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [1/2] " Patchwork
0 siblings, 1 reply; 8+ messages in thread
From: Animesh Manna @ 2022-09-16 8:31 UTC (permalink / raw)
To: intel-gfx; +Cc: Jani Nikula
Simplified pps_get_register() which use get_pps_idx() hook to derive the
pps instance and get_pps_idx() will be initialized at pps_init().
v1: Initial version. Got r-b from Jani.
Cc: Jani Nikula <jani.nikula@intel.com>
Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
Cc: Uma Shankar <uma.shankar@intel.com>
Signed-off-by: Animesh Manna <animesh.manna@intel.com>
---
.../gpu/drm/i915/display/intel_display_types.h | 1 +
drivers/gpu/drm/i915/display/intel_pps.c | 15 ++++++++++-----
2 files changed, 11 insertions(+), 5 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_display_types.h b/drivers/gpu/drm/i915/display/intel_display_types.h
index 0da9b208d56e..b78b29951241 100644
--- a/drivers/gpu/drm/i915/display/intel_display_types.h
+++ b/drivers/gpu/drm/i915/display/intel_display_types.h
@@ -1693,6 +1693,7 @@ struct intel_dp {
u8 (*preemph_max)(struct intel_dp *intel_dp);
u8 (*voltage_max)(struct intel_dp *intel_dp,
const struct intel_crtc_state *crtc_state);
+ int (*get_pps_idx)(struct intel_dp *intel_dp);
/* Displayport compliance testing */
struct intel_dp_compliance compliance;
diff --git a/drivers/gpu/drm/i915/display/intel_pps.c b/drivers/gpu/drm/i915/display/intel_pps.c
index 21944f5bf3a8..b972fa6ec00d 100644
--- a/drivers/gpu/drm/i915/display/intel_pps.c
+++ b/drivers/gpu/drm/i915/display/intel_pps.c
@@ -364,12 +364,10 @@ static void intel_pps_get_registers(struct intel_dp *intel_dp,
struct drm_i915_private *dev_priv = dp_to_i915(intel_dp);
int pps_idx = 0;
- memset(regs, 0, sizeof(*regs));
+ if (intel_dp->get_pps_idx)
+ pps_idx = intel_dp->get_pps_idx(intel_dp);
- if (IS_GEMINILAKE(dev_priv) || IS_BROXTON(dev_priv))
- pps_idx = bxt_power_sequencer_idx(intel_dp);
- else if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv))
- pps_idx = vlv_power_sequencer_pipe(intel_dp);
+ memset(regs, 0, sizeof(*regs));
regs->pp_ctrl = PP_CONTROL(pps_idx);
regs->pp_stat = PP_STATUS(pps_idx);
@@ -1432,6 +1430,13 @@ void intel_pps_init(struct intel_dp *intel_dp)
intel_dp->pps.initializing = true;
INIT_DELAYED_WORK(&intel_dp->pps.panel_vdd_work, edp_panel_vdd_work);
+ if (IS_GEMINILAKE(i915) || IS_BROXTON(i915))
+ intel_dp->get_pps_idx = bxt_power_sequencer_idx;
+ else if (IS_VALLEYVIEW(i915) || IS_CHERRYVIEW(i915))
+ intel_dp->get_pps_idx = vlv_power_sequencer_pipe;
+ else
+ intel_dp->get_pps_idx = NULL;
+
pps_init_timestamps(intel_dp);
with_intel_pps_lock(intel_dp, wakeref) {
--
2.29.0
^ permalink raw reply related [flat|nested] 8+ messages in thread
end of thread, other threads:[~2022-11-04 11:58 UTC | newest]
Thread overview: 8+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2022-10-18 8:39 [Intel-gfx] [PATCH 1/2] drm/i915/pps: Add get_pps_idx() hook as part of pps_get_register() cleanup Animesh Manna
2022-10-18 8:39 ` [Intel-gfx] [PATCH 2/2] drm/i915/pps: Enable 2nd pps for dual EDP scenario Animesh Manna
2022-10-18 9:16 ` [Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [1/2] drm/i915/pps: Add get_pps_idx() hook as part of pps_get_register() cleanup Patchwork
2022-10-19 3:58 ` [Intel-gfx] ✓ Fi.CI.IGT: " Patchwork
2022-11-04 11:58 ` [Intel-gfx] ✗ Fi.CI.BAT: failure for series starting with [1/2] drm/i915/pps: Add get_pps_idx() hook as part of pps_get_register() cleanup (rev2) Patchwork
-- strict thread matches above, loose matches on Subject: below --
2022-10-10 15:54 [Intel-gfx] [PATCH 1/2] drm/i915/pps: Add get_pps_idx() hook as part of pps_get_register() cleanup Animesh Manna
2022-10-10 16:56 ` [Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [1/2] " Patchwork
2022-09-27 17:45 [Intel-gfx] [PATCH 1/2] " Animesh Manna
2022-09-28 2:51 ` [Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [1/2] " Patchwork
2022-09-16 8:31 [Intel-gfx] [PATCH 1/2] " Animesh Manna
2022-09-16 10:16 ` [Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [1/2] " Patchwork
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