From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-0.8 required=3.0 tests=DKIM_SIGNED,DKIM_VALID, DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS,MAILING_LIST_MULTI,SPF_PASS, URIBL_BLOCKED autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id EDF23ECDFD0 for ; Fri, 14 Sep 2018 10:00:21 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 9A1FB20853 for ; Fri, 14 Sep 2018 10:00:21 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (1024-bit key) header.d=ideasonboard.com header.i=@ideasonboard.com header.b="rNIWs6Ep" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 9A1FB20853 Authentication-Results: mail.kernel.org; dmarc=none (p=none dis=none) header.from=ideasonboard.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727999AbeINPOF (ORCPT ); Fri, 14 Sep 2018 11:14:05 -0400 Received: from perceval.ideasonboard.com ([213.167.242.64]:33136 "EHLO perceval.ideasonboard.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726868AbeINPOF (ORCPT ); Fri, 14 Sep 2018 11:14:05 -0400 Received: from avalon.localnet (unknown [IPv6:2a02:a03f:44f6:3500:d929:375b:d608:66c7]) by perceval.ideasonboard.com (Postfix) with ESMTPSA id 9713CCE; Fri, 14 Sep 2018 12:00:15 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=ideasonboard.com; s=mail; t=1536919216; bh=fkLDJ1vcjotoev74fEWdu5Z6ky57HKqSmdVCAeaRR0o=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=rNIWs6EpF0YE3kX//u4gQe3zLf1H4WG4l0aHhvRMYp9Fsb3X6cs4yAPUcY5cjZoB9 SilGEDHqyPyal8tAsWzGYH22M7V2AkpV5jFbyw95SggEkiBE3S5FhwuDiSF07i+bMU XBKp5EUH+M8DGBt0CA+U0PvECU90wa/dcctiWW4w= From: Laurent Pinchart To: Stefan Agner Cc: linus.walleij@linaro.org, airlied@linux.ie, robh+dt@kernel.org, mark.rutland@arm.com, shawnguo@kernel.org, s.hauer@pengutronix.de, p.zabel@pengutronix.de, kernel@pengutronix.de, fabio.estevam@nxp.com, linux-imx@nxp.com, architt@codeaurora.org, a.hajda@samsung.com, gustavo@padovan.org, maarten.lankhorst@linux.intel.com, sean@poorly.run, marcel.ziswiler@toradex.com, max.krummenacher@toradex.com, dri-devel@lists.freedesktop.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Subject: Re: [PATCH v2 6/8] drm/imx: support handling bridge timings bus flags Date: Fri, 14 Sep 2018 13:00:29 +0300 Message-ID: <1666767.e3BgH42IGz@avalon> Organization: Ideas on Board Oy In-Reply-To: <20180912183222.25414-7-stefan@agner.ch> References: <20180912183222.25414-1-stefan@agner.ch> <20180912183222.25414-7-stefan@agner.ch> MIME-Version: 1.0 Content-Transfer-Encoding: 7Bit Content-Type: text/plain; charset="us-ascii" Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Hi Stefan, Thank you for the patch. On Wednesday, 12 September 2018 21:32:20 EEST Stefan Agner wrote: > A bridge might require specific settings for the pixel data on > the bus. Copy the bus flags from the bridge timings if a bridge > is in use. > > Signed-off-by: Stefan Agner > --- > drivers/gpu/drm/imx/parallel-display.c | 3 +++ > 1 file changed, 3 insertions(+) > > diff --git a/drivers/gpu/drm/imx/parallel-display.c > b/drivers/gpu/drm/imx/parallel-display.c index aefd04e18f93..7798a0621df7 > 100644 > --- a/drivers/gpu/drm/imx/parallel-display.c > +++ b/drivers/gpu/drm/imx/parallel-display.c > @@ -239,6 +239,9 @@ static int imx_pd_bind(struct device *dev, struct device > *master, void *data) if (ret && ret != -ENODEV) > return ret; > > + if (imxpd->bridge && imxpd->bridge->timings) > + imxpd->bus_flags = imxpd->bridge->timings->input_bus_flags; As explained in different replies in this mail thread (and in v1), we need something more complex than this. How about creating a helper function that would take a sampling edge, setup and hold times, clock frequency and internal delay on the driving side, and return which edge to drive the data on ? I agree with you that the logic is complex, so we shouldn't duplicate it in multiple drivers. If you submit such a patch I'll implement support for configuring the clock edge in the R-Car DU driver and test it with the ADV7123. > imxpd->dev = dev; > > ret = imx_pd_register(drm, imxpd); -- Regards, Laurent Pinchart From mboxrd@z Thu Jan 1 00:00:00 1970 From: Laurent Pinchart Subject: Re: [PATCH v2 6/8] drm/imx: support handling bridge timings bus flags Date: Fri, 14 Sep 2018 13:00:29 +0300 Message-ID: <1666767.e3BgH42IGz@avalon> References: <20180912183222.25414-1-stefan@agner.ch> <20180912183222.25414-7-stefan@agner.ch> Mime-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: base64 Return-path: In-Reply-To: <20180912183222.25414-7-stefan@agner.ch> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" To: Stefan Agner Cc: mark.rutland@arm.com, devicetree@vger.kernel.org, max.krummenacher@toradex.com, kernel@pengutronix.de, marcel.ziswiler@toradex.com, airlied@linux.ie, linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org, robh+dt@kernel.org, linux-imx@nxp.com, fabio.estevam@nxp.com, sean@poorly.run, shawnguo@kernel.org, linux-arm-kernel@lists.infradead.org List-Id: devicetree@vger.kernel.org SGkgU3RlZmFuLAoKVGhhbmsgeW91IGZvciB0aGUgcGF0Y2guCgpPbiBXZWRuZXNkYXksIDEyIFNl cHRlbWJlciAyMDE4IDIxOjMyOjIwIEVFU1QgU3RlZmFuIEFnbmVyIHdyb3RlOgo+IEEgYnJpZGdl IG1pZ2h0IHJlcXVpcmUgc3BlY2lmaWMgc2V0dGluZ3MgZm9yIHRoZSBwaXhlbCBkYXRhIG9uCj4g dGhlIGJ1cy4gQ29weSB0aGUgYnVzIGZsYWdzIGZyb20gdGhlIGJyaWRnZSB0aW1pbmdzIGlmIGEg YnJpZGdlCj4gaXMgaW4gdXNlLgo+IAo+IFNpZ25lZC1vZmYtYnk6IFN0ZWZhbiBBZ25lciA8c3Rl ZmFuQGFnbmVyLmNoPgo+IC0tLQo+ICBkcml2ZXJzL2dwdS9kcm0vaW14L3BhcmFsbGVsLWRpc3Bs YXkuYyB8IDMgKysrCj4gIDEgZmlsZSBjaGFuZ2VkLCAzIGluc2VydGlvbnMoKykKPiAKPiBkaWZm IC0tZ2l0IGEvZHJpdmVycy9ncHUvZHJtL2lteC9wYXJhbGxlbC1kaXNwbGF5LmMKPiBiL2RyaXZl cnMvZ3B1L2RybS9pbXgvcGFyYWxsZWwtZGlzcGxheS5jIGluZGV4IGFlZmQwNGUxOGY5My4uNzc5 OGEwNjIxZGY3Cj4gMTAwNjQ0Cj4gLS0tIGEvZHJpdmVycy9ncHUvZHJtL2lteC9wYXJhbGxlbC1k aXNwbGF5LmMKPiArKysgYi9kcml2ZXJzL2dwdS9kcm0vaW14L3BhcmFsbGVsLWRpc3BsYXkuYwo+ IEBAIC0yMzksNiArMjM5LDkgQEAgc3RhdGljIGludCBpbXhfcGRfYmluZChzdHJ1Y3QgZGV2aWNl ICpkZXYsIHN0cnVjdCBkZXZpY2UKPiAqbWFzdGVyLCB2b2lkICpkYXRhKSBpZiAocmV0ICYmIHJl dCAhPSAtRU5PREVWKQo+ICAJCXJldHVybiByZXQ7Cj4gCj4gKwlpZiAoaW14cGQtPmJyaWRnZSAm JiBpbXhwZC0+YnJpZGdlLT50aW1pbmdzKQo+ICsJCWlteHBkLT5idXNfZmxhZ3MgPSBpbXhwZC0+ YnJpZGdlLT50aW1pbmdzLT5pbnB1dF9idXNfZmxhZ3M7CgpBcyBleHBsYWluZWQgaW4gZGlmZmVy ZW50IHJlcGxpZXMgaW4gdGhpcyBtYWlsIHRocmVhZCAoYW5kIGluIHYxKSwgd2UgbmVlZCAKc29t ZXRoaW5nIG1vcmUgY29tcGxleCB0aGFuIHRoaXMuCgpIb3cgYWJvdXQgY3JlYXRpbmcgYSBoZWxw ZXIgZnVuY3Rpb24gdGhhdCB3b3VsZCB0YWtlIGEgc2FtcGxpbmcgZWRnZSwgc2V0dXAgCmFuZCBo b2xkIHRpbWVzLCBjbG9jayBmcmVxdWVuY3kgYW5kIGludGVybmFsIGRlbGF5IG9uIHRoZSBkcml2 aW5nIHNpZGUsIGFuZCAKcmV0dXJuIHdoaWNoIGVkZ2UgdG8gZHJpdmUgdGhlIGRhdGEgb24gPyBJ IGFncmVlIHdpdGggeW91IHRoYXQgdGhlIGxvZ2ljIGlzIApjb21wbGV4LCBzbyB3ZSBzaG91bGRu J3QgZHVwbGljYXRlIGl0IGluIG11bHRpcGxlIGRyaXZlcnMuIElmIHlvdSBzdWJtaXQgc3VjaCAK YSBwYXRjaCBJJ2xsIGltcGxlbWVudCBzdXBwb3J0IGZvciBjb25maWd1cmluZyB0aGUgY2xvY2sg ZWRnZSBpbiB0aGUgUi1DYXIgRFUgCmRyaXZlciBhbmQgdGVzdCBpdCB3aXRoIHRoZSBBRFY3MTIz LgoKPiAgCWlteHBkLT5kZXYgPSBkZXY7Cj4gCj4gIAlyZXQgPSBpbXhfcGRfcmVnaXN0ZXIoZHJt LCBpbXhwZCk7CgotLSAKUmVnYXJkcywKCkxhdXJlbnQgUGluY2hhcnQKCgoKX19fX19fX19fX19f X19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX18KZHJpLWRldmVsIG1haWxpbmcgbGlz dApkcmktZGV2ZWxAbGlzdHMuZnJlZWRlc2t0b3Aub3JnCmh0dHBzOi8vbGlzdHMuZnJlZWRlc2t0 b3Aub3JnL21haWxtYW4vbGlzdGluZm8vZHJpLWRldmVsCg== From mboxrd@z Thu Jan 1 00:00:00 1970 From: laurent.pinchart@ideasonboard.com (Laurent Pinchart) Date: Fri, 14 Sep 2018 13:00:29 +0300 Subject: [PATCH v2 6/8] drm/imx: support handling bridge timings bus flags In-Reply-To: <20180912183222.25414-7-stefan@agner.ch> References: <20180912183222.25414-1-stefan@agner.ch> <20180912183222.25414-7-stefan@agner.ch> Message-ID: <1666767.e3BgH42IGz@avalon> To: linux-arm-kernel@lists.infradead.org List-Id: linux-arm-kernel.lists.infradead.org Hi Stefan, Thank you for the patch. On Wednesday, 12 September 2018 21:32:20 EEST Stefan Agner wrote: > A bridge might require specific settings for the pixel data on > the bus. Copy the bus flags from the bridge timings if a bridge > is in use. > > Signed-off-by: Stefan Agner > --- > drivers/gpu/drm/imx/parallel-display.c | 3 +++ > 1 file changed, 3 insertions(+) > > diff --git a/drivers/gpu/drm/imx/parallel-display.c > b/drivers/gpu/drm/imx/parallel-display.c index aefd04e18f93..7798a0621df7 > 100644 > --- a/drivers/gpu/drm/imx/parallel-display.c > +++ b/drivers/gpu/drm/imx/parallel-display.c > @@ -239,6 +239,9 @@ static int imx_pd_bind(struct device *dev, struct device > *master, void *data) if (ret && ret != -ENODEV) > return ret; > > + if (imxpd->bridge && imxpd->bridge->timings) > + imxpd->bus_flags = imxpd->bridge->timings->input_bus_flags; As explained in different replies in this mail thread (and in v1), we need something more complex than this. How about creating a helper function that would take a sampling edge, setup and hold times, clock frequency and internal delay on the driving side, and return which edge to drive the data on ? I agree with you that the logic is complex, so we shouldn't duplicate it in multiple drivers. If you submit such a patch I'll implement support for configuring the clock edge in the R-Car DU driver and test it with the ADV7123. > imxpd->dev = dev; > > ret = imx_pd_register(drm, imxpd); -- Regards, Laurent Pinchart