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Thu, 9 Jul 2020 13:56:19 -0400 (EDT) Received: from mail03.efficios.com (mail03.efficios.com [167.114.26.124]) by mail.efficios.com (Postfix) with ESMTP id A984A29158E; Thu, 9 Jul 2020 13:56:19 -0400 (EDT) Date: Thu, 9 Jul 2020 13:56:19 -0400 (EDT) From: Mathieu Desnoyers To: Segher Boessenkool Message-ID: <1682947575.7422.1594317379612.JavaMail.zimbra@efficios.com> In-Reply-To: <1584179170.7410.1594316576293.JavaMail.zimbra@efficios.com> References: <972420887.755.1594149430308.JavaMail.zimbra@efficios.com> <87k0ze2nv4.fsf@mpe.ellerman.id.au> <20200708235331.GA3598@gate.crashing.org> <1968953502.5815.1594252883512.JavaMail.zimbra@efficios.com> <20200709001837.GD3598@gate.crashing.org> <1769596686.6365.1594302227962.JavaMail.zimbra@efficios.com> <20200709173712.GL3598@gate.crashing.org> <1584179170.7410.1594316576293.JavaMail.zimbra@efficios.com> Subject: Re: Failure to build librseq on ppc MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: 7bit X-Originating-IP: [167.114.26.124] X-Mailer: Zimbra 8.8.15_GA_3955 (ZimbraWebClient - FF78 (Linux)/8.8.15_GA_3953) Thread-Topic: Failure to build librseq on ppc Thread-Index: q69V8GVx/SoKpVhL7JIT4yP2NgYiwCJBkMC5 X-BeenThere: linuxppc-dev@lists.ozlabs.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Linux on PowerPC Developers Mail List List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Boqun Feng , linuxppc-dev , Michael Jeanson Errors-To: linuxppc-dev-bounces+linuxppc-dev=archiver.kernel.org@lists.ozlabs.org Sender: "Linuxppc-dev" ----- On Jul 9, 2020, at 1:42 PM, Mathieu Desnoyers mathieu.desnoyers@efficios.com wrote: > ----- On Jul 9, 2020, at 1:37 PM, Segher Boessenkool segher@kernel.crashing.org > wrote: > >> On Thu, Jul 09, 2020 at 09:43:47AM -0400, Mathieu Desnoyers wrote: >>> > What protects r17 *after* this asm statement? >>> >>> As discussed in the other leg of the thread (with the code example), >>> r17 is in the clobber list of all asm statements using this macro, and >>> is used as a temporary register within each inline asm. >> >> That works fine then, for a testcase. Using r17 is not a great idea for >> performance (it increases the active register footprint, and causes more >> registers to be saved in the prologue of the functions, esp. on older >> compilers), and it is easier to just let the compiler choose a good >> register to use. But maybe you want to see r17 in the generated >> testcases, as eyecatcher or something, dunno :-) > > Just to make sure I understand your recommendation. So rather than > hard coding r17 as the temporary registers, we could explicitly > declare the temporary register as a C variable, pass it as an > input operand to the inline asm, and then refer to it by operand > name in the macros using it. This way the compiler would be free > to perform its own register allocation. > > If that is what you have in mind, then yes, I think it makes a > lot of sense. Except that asm goto have this limitation with gcc: those cannot have any output operand, only inputs, clobbers and target labels. We cannot modify a temporary register received as input operand. So I don't see how to get a temporary register allocated by the compiler considering this limitation. Thanks, Mathieu -- Mathieu Desnoyers EfficiOS Inc. http://www.efficios.com