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[77.130.208.48]) by smtp.googlemail.com with ESMTPSA id w8sm6942862wmc.0.2019.03.17.13.52.11 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Sun, 17 Mar 2019 13:52:16 -0700 (PDT) Subject: Re: [PATCH 0/7] Timer & SPI support for Allwinner suniv F1C100s To: Icenowy Zheng , Thomas Gleixner , Mesih Kilinc , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-clk@vger.kernel.org, linux-sunxi@googlegroups.com Cc: Maxime Ripard , Chen-Yu Tsai , Linus Walleij , Rob Herring References: <2485e6c52810df376a0df6eb7f749f35b7b19044.camel@aosc.xyz> From: Daniel Lezcano Message-ID: <177e2598-3491-03af-8638-c60e77cc4a34@linaro.org> Date: Sun, 17 Mar 2019 21:52:09 +0100 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:60.0) Gecko/20100101 Thunderbird/60.5.1 MIME-Version: 1.0 In-Reply-To: <2485e6c52810df376a0df6eb7f749f35b7b19044.camel@aosc.xyz> Content-Type: text/plain; charset=utf-8 Content-Language: en-US Content-Transfer-Encoding: 8bit Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 17/03/2019 18:39, Icenowy Zheng wrote: > 在 2019-02-11一的 12:21 +0300，Mesih Kilinc写道： >> This is followup series for F1C100s initial support patchset. >> All patches merged except patch 1 ~ 2 which is related to timer. >> I am resending those since they are already have Acked tags. > > Ping. > > Could you please merge these timer-related patches? Hi, I acked the timer-related patches. If you resend the patches with my acked-by I will consider them to go through the allwinner tree. Do you want me to take 1 and 2 through my tree? >> Our dt-bindings for F1C100s are merged, we can now use them at our >> device tree source - patch 3. >> >> Also this series add spi support and enables spi flash at Lichee-pi >> Nano >> in patch 4 ~ 7. This patches are based on Icenowy's work. >> >> Thanks! >> >> Mesih Kilinc (7): >> dt-bindings: timer: Add Allwinner suniv timer >> clocksource: sun4i: add a compatible for suniv >> ARM: dts: suniv: Add dt-binding headers for F1C100s >> dt-bindings: spi: Add Support for Allwinner F1C100s >> ARM: dts: suniv: Add SPI device-tree nodes >> ARM: dts: suniv: Add pinmux for SPI0 and SPI1 of F1C100s >> ARM: dts: f1c100s: Activate SPI flash on Lichee Pi Nano >> >> .../devicetree/bindings/spi/spi-sun6i.txt | 5 +- >> .../bindings/timer/allwinner,sun4i-timer.txt | 4 +- >> arch/arm/boot/dts/suniv-f1c100s-licheepi-nano.dts | 13 ++++++ >> arch/arm/boot/dts/suniv-f1c100s.dtsi | 53 >> +++++++++++++++++++--- >> drivers/clocksource/timer-sun4i.c | 5 +- >> 5 files changed, 70 insertions(+), 10 deletions(-) >> > -- Linaro.org │ Open source software for ARM SoCs Follow Linaro: Facebook | Twitter | Blog From mboxrd@z Thu Jan 1 00:00:00 1970 From: Daniel Lezcano Subject: Re: [PATCH 0/7] Timer & SPI support for Allwinner suniv F1C100s Date: Sun, 17 Mar 2019 21:52:09 +0100 Message-ID: <177e2598-3491-03af-8638-c60e77cc4a34@linaro.org> References: <2485e6c52810df376a0df6eb7f749f35b7b19044.camel@aosc.xyz> Reply-To: daniel.lezcano-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org Mime-Version: 1.0 Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable Return-path: Sender: linux-sunxi-/JYPxA39Uh5TLH3MbocFFw@public.gmane.org In-Reply-To: <2485e6c52810df376a0df6eb7f749f35b7b19044.camel-ymACFijhrKM@public.gmane.org> Content-Language: en-US List-Post: , List-Help: , List-Archive: , List-Unsubscribe: , To: Icenowy Zheng , Thomas Gleixner , Mesih Kilinc , devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org, linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org, linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org, linux-clk-u79uwXL29TY76Z2rM5mHXA@public.gmane.org, linux-sunxi-/JYPxA39Uh5TLH3MbocFFw@public.gmane.org Cc: Maxime Ripard , Chen-Yu Tsai , Linus Walleij , Rob Herring List-Id: devicetree@vger.kernel.org On 17/03/2019 18:39, Icenowy Zheng wrote: > =E5=9C=A8 2019-02-11=E4=B8=80=E7=9A=84 12:21 +0300=EF=BC=8CMesih Kilinc= =E5=86=99=E9=81=93=EF=BC=9A >> This is followup series for F1C100s initial support patchset.=20 >> All patches merged except patch 1 ~ 2 which is related to timer. >> I am resending those since they are already have Acked tags. >=20 > Ping. >=20 > Could you please merge these timer-related patches? Hi, I acked the timer-related patches. If you resend the patches with my acked-by I will consider them to go through the allwinner tree. Do you want me to take 1 and 2 through my tree? >> Our dt-bindings for F1C100s are merged, we can now use them at our=20 >> device tree source - patch 3. >> >> Also this series add spi support and enables spi flash at Lichee-pi >> Nano >> in patch 4 ~ 7. This patches are based on Icenowy's work. >> >> Thanks! >> >> Mesih Kilinc (7): >> dt-bindings: timer: Add Allwinner suniv timer >> clocksource: sun4i: add a compatible for suniv >> ARM: dts: suniv: Add dt-binding headers for F1C100s >> dt-bindings: spi: Add Support for Allwinner F1C100s >> ARM: dts: suniv: Add SPI device-tree nodes >> ARM: dts: suniv: Add pinmux for SPI0 and SPI1 of F1C100s >> ARM: dts: f1c100s: Activate SPI flash on Lichee Pi Nano >> >> .../devicetree/bindings/spi/spi-sun6i.txt | 5 +- >> .../bindings/timer/allwinner,sun4i-timer.txt | 4 +- >> arch/arm/boot/dts/suniv-f1c100s-licheepi-nano.dts | 13 ++++++ >> arch/arm/boot/dts/suniv-f1c100s.dtsi | 53 >> +++++++++++++++++++--- >> drivers/clocksource/timer-sun4i.c | 5 +- >> 5 files changed, 70 insertions(+), 10 deletions(-) >> >=20 --=20 Linaro.org =E2=94=82 Open source software for ARM= SoCs Follow Linaro: Facebook | Twitter | Blog --=20 You received this message because you are subscribed to the Google Groups "= linux-sunxi" group. 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[77.130.208.48]) by smtp.googlemail.com with ESMTPSA id w8sm6942862wmc.0.2019.03.17.13.52.11 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Sun, 17 Mar 2019 13:52:16 -0700 (PDT) Subject: Re: [PATCH 0/7] Timer & SPI support for Allwinner suniv F1C100s To: Icenowy Zheng , Thomas Gleixner , Mesih Kilinc , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-clk@vger.kernel.org, linux-sunxi@googlegroups.com References: <2485e6c52810df376a0df6eb7f749f35b7b19044.camel@aosc.xyz> From: Daniel Lezcano Message-ID: <177e2598-3491-03af-8638-c60e77cc4a34@linaro.org> Date: Sun, 17 Mar 2019 21:52:09 +0100 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:60.0) Gecko/20100101 Thunderbird/60.5.1 MIME-Version: 1.0 In-Reply-To: <2485e6c52810df376a0df6eb7f749f35b7b19044.camel@aosc.xyz> Content-Language: en-US X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20190317_135220_800651_1E196361 X-CRM114-Status: GOOD ( 15.61 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Maxime Ripard , Rob Herring , Chen-Yu Tsai , Linus Walleij Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: base64 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+infradead-linux-arm-kernel=archiver.kernel.org@lists.infradead.org T24gMTcvMDMvMjAxOSAxODozOSwgSWNlbm93eSBaaGVuZyB3cm90ZToKPiDlnKggMjAxOS0wMi0x MeS4gOeahCAxMjoyMSArMDMwMO+8jE1lc2loIEtpbGluY+WGmemBk++8mgo+PiBUaGlzIGlzIGZv bGxvd3VwIHNlcmllcyBmb3IgRjFDMTAwcyBpbml0aWFsIHN1cHBvcnQgcGF0Y2hzZXQuIAo+PiBB bGwgcGF0Y2hlcyBtZXJnZWQgZXhjZXB0IHBhdGNoIDEgfiAyIHdoaWNoIGlzIHJlbGF0ZWQgdG8g dGltZXIuCj4+IEkgYW0gcmVzZW5kaW5nIHRob3NlIHNpbmNlIHRoZXkgYXJlIGFscmVhZHkgaGF2 ZSBBY2tlZCB0YWdzLgo+IAo+IFBpbmcuCj4gCj4gQ291bGQgeW91IHBsZWFzZSBtZXJnZSB0aGVz ZSB0aW1lci1yZWxhdGVkIHBhdGNoZXM/CgpIaSwKCkkgYWNrZWQgdGhlIHRpbWVyLXJlbGF0ZWQg cGF0Y2hlcy4gSWYgeW91IHJlc2VuZCB0aGUgcGF0Y2hlcyB3aXRoIG15CmFja2VkLWJ5IEkgd2ls bCBjb25zaWRlciB0aGVtIHRvIGdvIHRocm91Z2ggdGhlIGFsbHdpbm5lciB0cmVlLgoKRG8geW91 IHdhbnQgbWUgdG8gdGFrZSAxIGFuZCAyIHRocm91Z2ggbXkgdHJlZT8KCgoKPj4gT3VyIGR0LWJp bmRpbmdzIGZvciBGMUMxMDBzIGFyZSBtZXJnZWQsIHdlIGNhbiBub3cgdXNlIHRoZW0gYXQgb3Vy IAo+PiBkZXZpY2UgdHJlZSBzb3VyY2UgLSBwYXRjaCAzLgo+Pgo+PiBBbHNvIHRoaXMgc2VyaWVz IGFkZCBzcGkgc3VwcG9ydCBhbmQgZW5hYmxlcyBzcGkgZmxhc2ggYXQgTGljaGVlLXBpCj4+IE5h bm8KPj4gaW4gcGF0Y2ggNCB+IDcuIFRoaXMgcGF0Y2hlcyBhcmUgYmFzZWQgb24gSWNlbm93eSdz IHdvcmsuCj4+Cj4+IFRoYW5rcyEKPj4KPj4gTWVzaWggS2lsaW5jICg3KToKPj4gICBkdC1iaW5k aW5nczogdGltZXI6IEFkZCBBbGx3aW5uZXIgc3VuaXYgdGltZXIKPj4gICBjbG9ja3NvdXJjZTog c3VuNGk6IGFkZCBhIGNvbXBhdGlibGUgZm9yIHN1bml2Cj4+ICAgQVJNOiBkdHM6IHN1bml2OiBB ZGQgZHQtYmluZGluZyBoZWFkZXJzIGZvciBGMUMxMDBzCj4+ICAgZHQtYmluZGluZ3M6IHNwaTog QWRkIFN1cHBvcnQgZm9yIEFsbHdpbm5lciBGMUMxMDBzCj4+ICAgQVJNOiBkdHM6IHN1bml2OiBB ZGQgU1BJIGRldmljZS10cmVlIG5vZGVzCj4+ICAgQVJNOiBkdHM6IHN1bml2OiBBZGQgcGlubXV4 IGZvciBTUEkwIGFuZCBTUEkxIG9mIEYxQzEwMHMKPj4gICBBUk06IGR0czogZjFjMTAwczogQWN0 aXZhdGUgU1BJIGZsYXNoIG9uIExpY2hlZSBQaSBOYW5vCj4+Cj4+ICAuLi4vZGV2aWNldHJlZS9i aW5kaW5ncy9zcGkvc3BpLXN1bjZpLnR4dCAgICAgICAgICB8ICA1ICstCj4+ICAuLi4vYmluZGlu Z3MvdGltZXIvYWxsd2lubmVyLHN1bjRpLXRpbWVyLnR4dCAgICAgICB8ICA0ICstCj4+ICBhcmNo L2FybS9ib290L2R0cy9zdW5pdi1mMWMxMDBzLWxpY2hlZXBpLW5hbm8uZHRzICB8IDEzICsrKysr Kwo+PiAgYXJjaC9hcm0vYm9vdC9kdHMvc3VuaXYtZjFjMTAwcy5kdHNpICAgICAgICAgICAgICAg fCA1Mwo+PiArKysrKysrKysrKysrKysrKysrLS0tCj4+ICBkcml2ZXJzL2Nsb2Nrc291cmNlL3Rp bWVyLXN1bjRpLmMgICAgICAgICAgICAgICAgICB8ICA1ICstCj4+ICA1IGZpbGVzIGNoYW5nZWQs IDcwIGluc2VydGlvbnMoKyksIDEwIGRlbGV0aW9ucygtKQo+Pgo+IAoKCi0tIAogPGh0dHA6Ly93 d3cubGluYXJvLm9yZy8+IExpbmFyby5vcmcg4pSCIE9wZW4gc291cmNlIHNvZnR3YXJlIGZvciBB Uk0gU29DcwoKRm9sbG93IExpbmFybzogIDxodHRwOi8vd3d3LmZhY2Vib29rLmNvbS9wYWdlcy9M aW5hcm8+IEZhY2Vib29rIHwKPGh0dHA6Ly90d2l0dGVyLmNvbS8jIS9saW5hcm9vcmc+IFR3aXR0 ZXIgfAo8aHR0cDovL3d3dy5saW5hcm8ub3JnL2xpbmFyby1ibG9nLz4gQmxvZwoKCl9fX19fX19f X19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fCmxpbnV4LWFybS1rZXJuZWwg bWFpbGluZyBsaXN0CmxpbnV4LWFybS1rZXJuZWxAbGlzdHMuaW5mcmFkZWFkLm9yZwpodHRwOi8v bGlzdHMuaW5mcmFkZWFkLm9yZy9tYWlsbWFuL2xpc3RpbmZvL2xpbnV4LWFybS1rZXJuZWwK