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From: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
To: "Srinivas, Vidya" <vidya.srinivas@intel.com>,
	"Intel Graphics Development" <intel-gfx@lists.freedesktop.org>,
	"Ville Syrjälä" <ville.syrjala@linux.intel.com>
Subject: Re: [PATCH v1 5/6] drm/i915: Do not do fb src adjustments for NV12
Date: Thu, 12 Apr 2018 13:10:55 +0200	[thread overview]
Message-ID: <186dbdbd-60c8-c866-e975-f4c63706502d@linux.intel.com> (raw)
In-Reply-To: <F653A0A18852B74D88578FA2EB7094EAB684F70E@BGSMSX108.gar.corp.intel.com>

Op 12-04-18 om 12:07 schreef Srinivas, Vidya:
>
>> -----Original Message-----
>> From: Maarten Lankhorst [mailto:maarten.lankhorst@linux.intel.com]
>> Sent: Wednesday, April 11, 2018 4:08 PM
>> To: Srinivas, Vidya <vidya.srinivas@intel.com>; intel-gfx-
>> trybot@lists.freedesktop.org
>> Cc: Kamath, Sunil <sunil.kamath@intel.com>; Saarinen, Jani
>> <jani.saarinen@intel.com>
>> Subject: Re: [PATCH v1 5/6] drm/i915: Do not do fb src adjustments for
>> NV12
>>
>> Op 11-04-18 om 11:09 schreef Vidya Srinivas:
>>> We skip src trunction/adjustments for
>>> NV12 case and handle the sizes directly.
>>> Without this, pipe fifo underruns are seen on APL/KBL.
>>>
>>> Credits-to: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
>>> Signed-off-by: Vidya Srinivas <vidya.srinivas@intel.com>
>>> ---
>>>  drivers/gpu/drm/i915/intel_display.c | 88
>>> ++++++++++++++++++++++++++++++++++--
>>>  drivers/gpu/drm/i915/intel_sprite.c  | 10 +++-
>>>  2 files changed, 92 insertions(+), 6 deletions(-)
>>>
>>> diff --git a/drivers/gpu/drm/i915/intel_display.c
>>> b/drivers/gpu/drm/i915/intel_display.c
>>> index ebb3f8e..e4cf7a6 100644
>>> --- a/drivers/gpu/drm/i915/intel_display.c
>>> +++ b/drivers/gpu/drm/i915/intel_display.c
>>> @@ -12951,6 +12951,86 @@ skl_max_scale(struct intel_crtc *intel_crtc,
>>> }
>>>
>>>  static int
>>> +intel_primary_plane_state(struct drm_plane_state *plane_state,
>>> +			  const struct drm_crtc_state *crtc_state,
>>> +			  int min_scale, int max_scale,
>>> +			  bool can_position, bool can_update_disabled) {
>>> +	struct drm_framebuffer *fb = plane_state->fb;
>>> +	struct drm_rect *src = &plane_state->src;
>>> +	struct drm_rect *dst = &plane_state->dst;
>>> +	unsigned int rotation = plane_state->rotation;
>>> +	struct drm_rect clip = {};
>>> +	int hscale, vscale;
>>> +
>>> +	WARN_ON(plane_state->crtc && plane_state->crtc != crtc_state-
>>> crtc);
>>> +
>>> +	*src = drm_plane_state_src(plane_state);
>>> +	*dst = drm_plane_state_dest(plane_state);
>>> +
>>> +	if (!fb) {
>>> +		plane_state->visible = false;
>>> +		return 0;
>>> +	}
>>> +
>>> +	/* crtc should only be NULL when disabling (i.e., !fb) */
>>> +	if (WARN_ON(!plane_state->crtc)) {
>>> +		plane_state->visible = false;
>>> +		return 0;
>>> +	}
>>> +
>>> +	if (!crtc_state->enable && !can_update_disabled) {
>>> +		DRM_DEBUG_KMS("Cannot update plane of a disabled
>> CRTC.\n");
>>> +		return -EINVAL;
>>> +	}
>>> +
>>> +	drm_rect_rotate(src, fb->width << 16, fb->height << 16, rotation);
>>> +
>>> +	/* Check scaling */
>>> +	hscale = drm_rect_calc_hscale(src, dst, min_scale, max_scale);
>>> +	vscale = drm_rect_calc_vscale(src, dst, min_scale, max_scale);
>>> +	if (hscale < 0 || vscale < 0) {
>>> +		DRM_DEBUG_KMS("Invalid scaling of plane\n");
>>> +		drm_rect_debug_print("src: ", &plane_state->src, true);
>>> +		drm_rect_debug_print("dst: ", &plane_state->dst, false);
>>> +		return -ERANGE;
>>> +	}
>>> +
>>> +	if (crtc_state->enable)
>>> +		drm_mode_get_hv_timing(&crtc_state->mode, &clip.x2,
>> &clip.y2);
>>> +
>>> +	if (fb->format->format == DRM_FORMAT_NV12) {
>>> +		plane_state->visible = true;
>>> +		goto skip_clip;
>>> +	}
>>> +
>>> +	plane_state->visible =
>>> +		drm_rect_clip_scaled(src, dst, &clip, hscale, vscale);
>> The real problem is that it needs to be a multiple of 4. I think the clipping
>> here is harmless, we should just adjust intel_check_sprite_plane for >= SKL.
>> This will make it so we don't have to duplicate its checks.
>>
>> For NV12 we still want to call clip_rect_scaled, but then adjust all
>> coordinates by dividing by 4 on before the check, and multiplying with 4
>> after?
>>
> Thank you. Have made the changes in https://patchwork.freedesktop.org/patch/216682/
> With this, I did not see any underruns. For now, have a WA only when we pass 16x16
> Because, with that it further clips down and gets rejected in skl_update_scaler as it is
> Less than 16. If we increase our buffer in igt, then this issue wont be there.
> Please have a check. Initially, I tried the /4 before the adjustments and *4 later, that wouldn’t work
> We need to have the 16.16 values multiplier of 4. So, just put it towards the end of both plane checks.	
Well, this is annoying.

It seems we never rejected subpixel precision before, and resorted to clipping instead of rejecting.
Could we be more strict about this without breaking existing userspace?

~Maarten
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

  parent reply	other threads:[~2018-04-12 11:10 UTC|newest]

Thread overview: 4+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
     [not found] <1523437770-14596-1-git-send-email-vidya.srinivas@intel.com>
     [not found] ` <1523437770-14596-7-git-send-email-vidya.srinivas@intel.com>
2018-04-11  9:39   ` [PATCH v1 6/6] drm/i915: Enable Display WA 0528 Maarten Lankhorst
2018-04-11  9:49     ` Srinivas, Vidya
     [not found] ` <1523437770-14596-6-git-send-email-vidya.srinivas@intel.com>
     [not found]   ` <0cf05da7-27a1-4a01-c3ef-7ba8c18bf84b@linux.intel.com>
     [not found]     ` <F653A0A18852B74D88578FA2EB7094EAB684F70E@BGSMSX108.gar.corp.intel.com>
2018-04-12 11:10       ` Maarten Lankhorst [this message]
2018-04-13  6:38         ` [PATCH v1 5/6] drm/i915: Do not do fb src adjustments for NV12 Srinivas, Vidya

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