From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752942AbcHZJmQ (ORCPT ); Fri, 26 Aug 2016 05:42:16 -0400 Received: from mout.kundenserver.de ([212.227.17.13]:65296 "EHLO mout.kundenserver.de" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752270AbcHZJmO (ORCPT ); Fri, 26 Aug 2016 05:42:14 -0400 From: Arnd Bergmann To: linux-arm-kernel@lists.infradead.org Cc: Russell King - ARM Linux , Robert Jarzmik , Yoshinori Sato , Nicolas Pitre , netdev@vger.kernel.org, linux-kernel@vger.kernel.org, "David S. Miller" Subject: Re: [PATCH] smc91x: remove ARM hack for unaligned 16-bit writes Date: Fri, 26 Aug 2016 11:41:21 +0200 Message-ID: <1899384.M1jdqOztqi@wuerfel> User-Agent: KMail/5.1.3 (Linux/4.4.0-34-generic; KDE/5.18.0; x86_64; ; ) In-Reply-To: <20160825223743.GK1041@n2100.armlinux.org.uk> References: <20160825144314.1850730-1-arnd@arndb.de> <87inuopw04.fsf@belgarion.home> <20160825223743.GK1041@n2100.armlinux.org.uk> MIME-Version: 1.0 Content-Transfer-Encoding: 7Bit Content-Type: text/plain; charset="us-ascii" X-Provags-ID: V03:K0:lbkdltq16vccn4Be27CI9Sg6DE43yyALFqF2xSNeiTLkbdDf1i/ fjU1BokQGgpZMwo8rtCJwFzfGHEy80lSTpePBc80eWrbX0iJVhQ9JWQVE3idzDXcoQpa4IG Y6RYGDCpyLdwVI7OCgTwRhtH4wHL3HdnA7vuZ23eZG5l1tRqAcod83oYn7XW7bm5ht0m26c GxgkhUbRDHLkHrDhBxDIA== X-UI-Out-Filterresults: notjunk:1;V01:K0:2j/b56rUVdc=:hmpnER92aq74V5SyACWhJZ d07pR3knuuzPPH9n1Yt2OxBNRYrjmbdPiCPpAle7l5wQ4sbDRBYlFAuvNTJ+AFyr0CXi7zgf+ MvTU7zytv8fAGoOkNaCxRcV1qwj+VWEQvx2K0yb770v7NzUjdPUR2NOawRieqFV/aPKkNrZrh dKyINkkt6iSk6O48PjNkgXC42XS+811y4jy7QU/oAQ7QMYPHxSmMJ6E8YZOyZRy3nLNehTOhe nozl3BuK7J0AauDSeNH4dJrwDsAbr4lW7x2JRBM1flwcAf9A3MXHJTKv7zdL9jQKU8vo0Zpzz NznS/9g4mJDFd3uRo2lMOpMr7DuAaLOx1xq+AiUr7NmHCvhqniz1fu1+gWdFYWRlccSp3KCyx WmXoTd8xzLRCNQyEzXwjDnC17sow9RlEbtsmGxTLuRozp7Gqwyr6Avbuxo4ZBuYq3Nc/C7jZE y+eLYOHdBFYgeun8PjPSS7dlKf6XAK1mtii4q93Fj9odzGVKIE2FPBcMKpXlAqbsFRAdXoseV oD38LKPChgRGwunqIck2cF/wOPVGXwzE+UPJ7eN0cV+m5MFDCyWmnPSJLO+Ra4+Z8kRwPglLu 3KfvKbFQLGR7jhXkKYJisU09PqxG9aBIZUPJXeQBWl+HcVcgK6yxJ+EeeXb8tsbLqpavW3Zor VVkP6/8klxc6RdOlEHwre6GhfRzLg0TO3qb656x1yTe27dK31ClaDhRddqTLUOb8rsCc9xzkl Sg03AYVZIWTR5EVe Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Thursday, August 25, 2016 11:37:43 PM CEST Russell King - ARM Linux wrote: > On Thu, Aug 25, 2016 at 08:02:35PM +0200, Robert Jarzmik wrote: > > Arnd Bergmann writes: > /* > + * Any 16-bit access is performed with two 8-bit accesses if the hardware > + * can't do it directly. Most registers are 16-bit so those are mandatory. > + */ > +#define SMC_outw_b(x, a, r) \ > + do { \ > + unsigned int __val16 = (x); \ > + unsigned int __reg = (r); \ > + SMC_outb(__val16, a, __reg); \ > + SMC_outb(__val16 >> 8, a, __reg + (1 << SMC_IO_SHIFT)); \ > + } while (0) > + > +#define SMC_inw_b(a, r) \ > + ({ \ > + unsigned int __val16; \ > + unsigned int __reg = r; \ > + __val16 = SMC_inb(a, __reg); \ > + __val16 |= SMC_inb(a, __reg + (1 << SMC_IO_SHIFT)) << 8; \ > + __val16; \ > + }) > + > +/* > * Define your architecture specific bus configuration parameters here. > */ > > @@ -55,10 +76,30 @@ > #define SMC_IO_SHIFT (lp->io_shift) > > #define SMC_inb(a, r) readb((a) + (r)) > -#define SMC_inw(a, r) readw((a) + (r)) > +#define SMC_inw(a, r) \ > + ({ \ > + unsigned int __smc_r = r; \ > + SMC_16BIT(lp) ? readw((a) + __smc_r) : \ > + SMC_8BIT(lp) ? SMC_inw_b(a, __smc_r) : \ > + ({ BUG(); 0; }); \ > + }) > + I think this breaks machines that declare a device that just lists SMC91X_USE_32BIT but not SMC91X_USE_16BIT. Right now, the way this is interpreted is to use 32-bit accessors for most things, but not avoiding 16-bit reads. That is a bit fishy though, and we could instead change the platform data to always set both SMC91X_USE_32BIT and SMC91X_USE_16BIT. The affected platforms are DT based machines with 32-bit I/O and these board files: arch/arm/mach-pxa/idp.c: .flags = SMC91X_USE_32BIT | SMC91X_USE_DMA | SMC91X_NOWAIT, arch/arm/mach-pxa/xcep.c: .flags = SMC91X_USE_32BIT | SMC91X_NOWAIT | SMC91X_USE_DMA, arch/arm/mach-realview/core.c: .flags = SMC91X_USE_32BIT | SMC91X_NOWAIT, arch/blackfin/mach-bf561/boards/cm_bf561.c: .flags = SMC91X_USE_32BIT | SMC91X_NOWAIT, arch/blackfin/mach-bf561/boards/ezkit.c: .flags = SMC91X_USE_32BIT | SMC91X_NOWAIT, Arnd From mboxrd@z Thu Jan 1 00:00:00 1970 From: arnd@arndb.de (Arnd Bergmann) Date: Fri, 26 Aug 2016 11:41:21 +0200 Subject: [PATCH] smc91x: remove ARM hack for unaligned 16-bit writes In-Reply-To: <20160825223743.GK1041@n2100.armlinux.org.uk> References: <20160825144314.1850730-1-arnd@arndb.de> <87inuopw04.fsf@belgarion.home> <20160825223743.GK1041@n2100.armlinux.org.uk> Message-ID: <1899384.M1jdqOztqi@wuerfel> To: linux-arm-kernel@lists.infradead.org List-Id: linux-arm-kernel.lists.infradead.org On Thursday, August 25, 2016 11:37:43 PM CEST Russell King - ARM Linux wrote: > On Thu, Aug 25, 2016 at 08:02:35PM +0200, Robert Jarzmik wrote: > > Arnd Bergmann writes: > /* > + * Any 16-bit access is performed with two 8-bit accesses if the hardware > + * can't do it directly. Most registers are 16-bit so those are mandatory. > + */ > +#define SMC_outw_b(x, a, r) \ > + do { \ > + unsigned int __val16 = (x); \ > + unsigned int __reg = (r); \ > + SMC_outb(__val16, a, __reg); \ > + SMC_outb(__val16 >> 8, a, __reg + (1 << SMC_IO_SHIFT)); \ > + } while (0) > + > +#define SMC_inw_b(a, r) \ > + ({ \ > + unsigned int __val16; \ > + unsigned int __reg = r; \ > + __val16 = SMC_inb(a, __reg); \ > + __val16 |= SMC_inb(a, __reg + (1 << SMC_IO_SHIFT)) << 8; \ > + __val16; \ > + }) > + > +/* > * Define your architecture specific bus configuration parameters here. > */ > > @@ -55,10 +76,30 @@ > #define SMC_IO_SHIFT (lp->io_shift) > > #define SMC_inb(a, r) readb((a) + (r)) > -#define SMC_inw(a, r) readw((a) + (r)) > +#define SMC_inw(a, r) \ > + ({ \ > + unsigned int __smc_r = r; \ > + SMC_16BIT(lp) ? readw((a) + __smc_r) : \ > + SMC_8BIT(lp) ? SMC_inw_b(a, __smc_r) : \ > + ({ BUG(); 0; }); \ > + }) > + I think this breaks machines that declare a device that just lists SMC91X_USE_32BIT but not SMC91X_USE_16BIT. Right now, the way this is interpreted is to use 32-bit accessors for most things, but not avoiding 16-bit reads. That is a bit fishy though, and we could instead change the platform data to always set both SMC91X_USE_32BIT and SMC91X_USE_16BIT. The affected platforms are DT based machines with 32-bit I/O and these board files: arch/arm/mach-pxa/idp.c: .flags = SMC91X_USE_32BIT | SMC91X_USE_DMA | SMC91X_NOWAIT, arch/arm/mach-pxa/xcep.c: .flags = SMC91X_USE_32BIT | SMC91X_NOWAIT | SMC91X_USE_DMA, arch/arm/mach-realview/core.c: .flags = SMC91X_USE_32BIT | SMC91X_NOWAIT, arch/blackfin/mach-bf561/boards/cm_bf561.c: .flags = SMC91X_USE_32BIT | SMC91X_NOWAIT, arch/blackfin/mach-bf561/boards/ezkit.c: .flags = SMC91X_USE_32BIT | SMC91X_NOWAIT, Arnd