From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S969703AbdDTHDz (ORCPT ); Thu, 20 Apr 2017 03:03:55 -0400 Received: from hermes.aosc.io ([199.195.250.187]:50787 "EHLO hermes.aosc.io" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S965801AbdDTHDr (ORCPT ); Thu, 20 Apr 2017 03:03:47 -0400 MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 8bit Date: Thu, 20 Apr 2017 15:03:38 +0800 From: icenowy@aosc.io To: maxime.ripard@free-electrons.com Cc: Lee Jones , Rob Herring , Chen-Yu Tsai , Liam Girdwood , Mark Brown , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-sunxi@googlegroups.com Subject: Re: [linux-sunxi] Re: [PATCH v3 02/12] arm64: allwinner: a64: add NMI controller on A64 In-Reply-To: <20170420055802.btibui5pspan4qal@lukather> References: <20170417115747.7300-1-icenowy@aosc.io> <20170417115747.7300-3-icenowy@aosc.io> <20170418070016.qsng3qtk76bqxyc5@lukather> <20170420055802.btibui5pspan4qal@lukather> Message-ID: <18ae853e9ce59a83bdeb6b64f96caee0@aosc.io> Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org 在 2017-04-20 13:58，Maxime Ripard 写道： > On Tue, Apr 18, 2017 at 06:56:43PM +0800, Icenowy Zheng wrote: >> >> >> 于 2017年4月18日 GMT+08:00 下午3:00:16, Maxime Ripard >> 写到: >> >On Mon, Apr 17, 2017 at 07:57:37PM +0800, Icenowy Zheng wrote: >> >> Allwinner A64 SoC features a NMI controller, which is usually >> >connected >> >> to the AXP PMIC. >> >> >> >> Add support for it. >> >> >> >> Signed-off-by: Icenowy Zheng >> >> Acked-by: Chen-Yu Tsai >> >> --- >> >> Changes in v2: >> >> - Added Chen-Yu's ACK. >> >> >> >> arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi | 8 ++++++++ >> >> 1 file changed, 8 insertions(+) >> >> >> >> diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi >> >b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi >> >> index 05ec9fc5e81f..53c18ca372ea 100644 >> >> --- a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi >> >> +++ b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi >> >> @@ -403,6 +403,14 @@ >> >> ; >> >> }; >> >> >> >> + nmi_intc: interrupt-controller@01f00c0c { >> >> + compatible = "allwinner,sun6i-a31-sc-nmi"; >> >> + interrupt-controller; >> >> + #interrupt-cells = <2>; >> >> + reg = <0x01f00c0c 0x38>; >> > >> >The base address is not correct, and there's uncertainty on whether >> >this is this particular controller or not. Did you even test this? >> >> Tested by axp20x-pek. > > Still, the base address is wrong, which is yet another hint that this > is not the same interrupt controller, and just works by accident. No, it's the same as other post-sun6i device trees. See other post-sun6i device trees: (or maybe they're all wrong, but as we have no document for it, we should temporarily keep them) sun6i-a31.dtsi ``` nmi_intc: interrupt-controller@01f00c0c { compatible = "allwinner,sun6i-a31-sc-nmi"; interrupt-controller; #interrupt-cells = <2>; reg = <0x01f00c0c 0x38>; interrupts = ; }; ``` sun8i-a23-a33.dtsi ``` nmi_intc: interrupt-controller@01f00c0c { compatible = "allwinner,sun6i-a31-sc-nmi"; interrupt-controller; #interrupt-cells = <2>; reg = <0x01f00c0c 0x38>; interrupts = ; }; ``` But according to the BSP device tree, the base address should be 0x01f00c00. Should I send some patch to fix all of them? (but it will break device tree compatibility) > > Maxime > > -- > Maxime Ripard, Free Electrons > Embedded Linux and Kernel engineering > http://free-electrons.com From mboxrd@z Thu Jan 1 00:00:00 1970 From: icenowy-h8G6r0blFSE@public.gmane.org Subject: Re: Re: [PATCH v3 02/12] arm64: allwinner: a64: add NMI controller on A64 Date: Thu, 20 Apr 2017 15:03:38 +0800 Message-ID: <18ae853e9ce59a83bdeb6b64f96caee0@aosc.io> References: <20170417115747.7300-1-icenowy@aosc.io> <20170417115747.7300-3-icenowy@aosc.io> <20170418070016.qsng3qtk76bqxyc5@lukather> <20170420055802.btibui5pspan4qal@lukather> Reply-To: icenowy-h8G6r0blFSE@public.gmane.org Mime-Version: 1.0 Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: quoted-printable Return-path: Sender: linux-sunxi-/JYPxA39Uh5TLH3MbocFFw@public.gmane.org In-Reply-To: <20170420055802.btibui5pspan4qal@lukather> List-Post: , List-Help: , List-Archive: , List-Unsubscribe: , To: maxime.ripard-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org Cc: Lee Jones , Rob Herring , Chen-Yu Tsai , Liam Girdwood , Mark Brown , devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org, linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org, linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org, linux-sunxi-/JYPxA39Uh5TLH3MbocFFw@public.gmane.org List-Id: devicetree@vger.kernel.org =E5=9C=A8 2017-04-20 13:58=EF=BC=8CMaxime Ripard =E5=86=99=E9=81=93=EF=BC= =9A > On Tue, Apr 18, 2017 at 06:56:43PM +0800, Icenowy Zheng wrote: >>=20 >>=20 >> =E4=BA=8E 2017=E5=B9=B44=E6=9C=8818=E6=97=A5 GMT+08:00 =E4=B8=8B=E5=8D= =883:00:16, Maxime Ripard=20 >> =E5=86=99=E5=88=B0: >> >On Mon, Apr 17, 2017 at 07:57:37PM +0800, Icenowy Zheng wrote: >> >> Allwinner A64 SoC features a NMI controller, which is usually >> >connected >> >> to the AXP PMIC. >> >> >> >> Add support for it. >> >> >> >> Signed-off-by: Icenowy Zheng >> >> Acked-by: Chen-Yu Tsai >> >> --- >> >> Changes in v2: >> >> - Added Chen-Yu's ACK. >> >> >> >> arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi | 8 ++++++++ >> >> 1 file changed, 8 insertions(+) >> >> >> >> diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi >> >b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi >> >> index 05ec9fc5e81f..53c18ca372ea 100644 >> >> --- a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi >> >> +++ b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi >> >> @@ -403,6 +403,14 @@ >> >> ; >> >> }; >> >> >> >> + nmi_intc: interrupt-controller@01f00c0c { >> >> + compatible =3D "allwinner,sun6i-a31-sc-nmi"; >> >> + interrupt-controller; >> >> + #interrupt-cells =3D <2>; >> >> + reg =3D <0x01f00c0c 0x38>; >> > >> >The base address is not correct, and there's uncertainty on whether >> >this is this particular controller or not. Did you even test this? >>=20 >> Tested by axp20x-pek. >=20 > Still, the base address is wrong, which is yet another hint that this > is not the same interrupt controller, and just works by accident. No, it's the same as other post-sun6i device trees. See other post-sun6i device trees: (or maybe they're all wrong, but as we have no document for it, we should temporarily keep them) sun6i-a31.dtsi ``` nmi_intc: interrupt-controller@01f00c0c { compatible =3D "allwinner,sun6i-a31-sc-nmi"; interrupt-controller; #interrupt-cells =3D <2>; reg =3D <0x01f00c0c 0x38>; interrupts =3D ; }; ``` sun8i-a23-a33.dtsi ``` nmi_intc: interrupt-controller@01f00c0c { compatible =3D "allwinner,sun6i-a31-sc-nmi"; interrupt-controller; #interrupt-cells =3D <2>; reg =3D <0x01f00c0c 0x38>; interrupts =3D ; }; ``` But according to the BSP device tree, the base address should be 0x01f00c00. Should I send some patch to fix all of them? (but it will break device tree compatibility) >=20 > Maxime >=20 > -- > Maxime Ripard, Free Electrons > Embedded Linux and Kernel engineering > http://free-electrons.com --=20 You received this message because you are subscribed to the Google Groups "= linux-sunxi" group. To unsubscribe from this group and stop receiving emails from it, send an e= mail to linux-sunxi+unsubscribe-/JYPxA39Uh5TLH3MbocFF+G/Ez6ZCGd0@public.gmane.org For more options, visit https://groups.google.com/d/optout. From mboxrd@z Thu Jan 1 00:00:00 1970 From: icenowy@aosc.io (icenowy at aosc.io) Date: Thu, 20 Apr 2017 15:03:38 +0800 Subject: [linux-sunxi] Re: [PATCH v3 02/12] arm64: allwinner: a64: add NMI controller on A64 In-Reply-To: <20170420055802.btibui5pspan4qal@lukather> References: <20170417115747.7300-1-icenowy@aosc.io> <20170417115747.7300-3-icenowy@aosc.io> <20170418070016.qsng3qtk76bqxyc5@lukather> <20170420055802.btibui5pspan4qal@lukather> Message-ID: <18ae853e9ce59a83bdeb6b64f96caee0@aosc.io> To: linux-arm-kernel@lists.infradead.org List-Id: linux-arm-kernel.lists.infradead.org ? 2017-04-20 13:58?Maxime Ripard ??? > On Tue, Apr 18, 2017 at 06:56:43PM +0800, Icenowy Zheng wrote: >> >> >> ? 2017?4?18? GMT+08:00 ??3:00:16, Maxime Ripard >> ??: >> >On Mon, Apr 17, 2017 at 07:57:37PM +0800, Icenowy Zheng wrote: >> >> Allwinner A64 SoC features a NMI controller, which is usually >> >connected >> >> to the AXP PMIC. >> >> >> >> Add support for it. >> >> >> >> Signed-off-by: Icenowy Zheng >> >> Acked-by: Chen-Yu Tsai >> >> --- >> >> Changes in v2: >> >> - Added Chen-Yu's ACK. >> >> >> >> arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi | 8 ++++++++ >> >> 1 file changed, 8 insertions(+) >> >> >> >> diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi >> >b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi >> >> index 05ec9fc5e81f..53c18ca372ea 100644 >> >> --- a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi >> >> +++ b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi >> >> @@ -403,6 +403,14 @@ >> >> ; >> >> }; >> >> >> >> + nmi_intc: interrupt-controller at 01f00c0c { >> >> + compatible = "allwinner,sun6i-a31-sc-nmi"; >> >> + interrupt-controller; >> >> + #interrupt-cells = <2>; >> >> + reg = <0x01f00c0c 0x38>; >> > >> >The base address is not correct, and there's uncertainty on whether >> >this is this particular controller or not. Did you even test this? >> >> Tested by axp20x-pek. > > Still, the base address is wrong, which is yet another hint that this > is not the same interrupt controller, and just works by accident. No, it's the same as other post-sun6i device trees. See other post-sun6i device trees: (or maybe they're all wrong, but as we have no document for it, we should temporarily keep them) sun6i-a31.dtsi ``` nmi_intc: interrupt-controller at 01f00c0c { compatible = "allwinner,sun6i-a31-sc-nmi"; interrupt-controller; #interrupt-cells = <2>; reg = <0x01f00c0c 0x38>; interrupts = ; }; ``` sun8i-a23-a33.dtsi ``` nmi_intc: interrupt-controller at 01f00c0c { compatible = "allwinner,sun6i-a31-sc-nmi"; interrupt-controller; #interrupt-cells = <2>; reg = <0x01f00c0c 0x38>; interrupts = ; }; ``` But according to the BSP device tree, the base address should be 0x01f00c00. Should I send some patch to fix all of them? (but it will break device tree compatibility) > > Maxime > > -- > Maxime Ripard, Free Electrons > Embedded Linux and Kernel engineering > http://free-electrons.com