From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753560AbdLMQGV (ORCPT ); Wed, 13 Dec 2017 11:06:21 -0500 Received: from mail-wm0-f68.google.com ([74.125.82.68]:41334 "EHLO mail-wm0-f68.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752860AbdLMQGR (ORCPT ); Wed, 13 Dec 2017 11:06:17 -0500 X-Google-Smtp-Source: ACJfBosTwydHJuCt+SRTy+6TirUuKEYftsXAYI2l90kQhvt4harIIujcwoEKWqD7XKZ/ueB6dccNRg== Subject: Re: [PATCH 4/8] drm/sun4i: crtc: Add a custom crtc atomic_check To: Maxime Ripard , Daniel Vetter , David Airlie , Chen-Yu Tsai Cc: linux-arm-kernel@lists.infradead.org, Thomas Petazzoni , linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org, thomas@vitsch.nl References: From: Neil Armstrong Organization: Baylibre Message-ID: <1907c50b-d8a9-47db-d5c6-129a430a105f@baylibre.com> Date: Wed, 13 Dec 2017 17:06:14 +0100 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:52.0) Gecko/20100101 Thunderbird/52.5.0 MIME-Version: 1.0 In-Reply-To: Content-Type: text/plain; charset=utf-8 Content-Language: en-US Content-Transfer-Encoding: 7bit Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 13/12/2017 16:33, Maxime Ripard wrote: > We have some restrictions on what the planes and CRTC can provide that are > tied to only one generation of display engines. > > For example, on the first generation, we can only have one YUV plane or one > plane that uses the frontend output. > > Let's allow our engines to provide an atomic_check callback to validate the > current configuration. > > Signed-off-by: Maxime Ripard > --- > drivers/gpu/drm/sun4i/sun4i_crtc.c | 14 ++++++++++++++ > drivers/gpu/drm/sun4i/sunxi_engine.h | 2 ++ > 2 files changed, 16 insertions(+) > > diff --git a/drivers/gpu/drm/sun4i/sun4i_crtc.c b/drivers/gpu/drm/sun4i/sun4i_crtc.c > index 5decae0069d0..2a565325714f 100644 > --- a/drivers/gpu/drm/sun4i/sun4i_crtc.c > +++ b/drivers/gpu/drm/sun4i/sun4i_crtc.c > @@ -46,6 +46,19 @@ static struct drm_encoder *sun4i_crtc_get_encoder(struct drm_crtc *crtc) > return NULL; > } > > +static int sun4i_crtc_atomic_check(struct drm_crtc *crtc, > + struct drm_crtc_state *state) > +{ > + struct sun4i_crtc *scrtc = drm_crtc_to_sun4i_crtc(crtc); > + struct sunxi_engine *engine = scrtc->engine; > + int ret = 0; > + > + if (engine && engine->ops && engine->ops->atomic_check) > + ret = engine->ops->atomic_check(engine, state); > + > + return ret; > +} > + > static void sun4i_crtc_atomic_begin(struct drm_crtc *crtc, > struct drm_crtc_state *old_state) > { > @@ -125,6 +138,7 @@ static void sun4i_crtc_mode_set_nofb(struct drm_crtc *crtc) > } > > static const struct drm_crtc_helper_funcs sun4i_crtc_helper_funcs = { > + .atomic_check = sun4i_crtc_atomic_check, > .atomic_begin = sun4i_crtc_atomic_begin, > .atomic_flush = sun4i_crtc_atomic_flush, > .atomic_enable = sun4i_crtc_atomic_enable, > diff --git a/drivers/gpu/drm/sun4i/sunxi_engine.h b/drivers/gpu/drm/sun4i/sunxi_engine.h > index 4cb70ae65c79..42655230aeba 100644 > --- a/drivers/gpu/drm/sun4i/sunxi_engine.h > +++ b/drivers/gpu/drm/sun4i/sunxi_engine.h > @@ -16,6 +16,8 @@ struct drm_device; > struct sunxi_engine; > > struct sunxi_engine_ops { > + int (*atomic_check)(struct sunxi_engine *engine, > + struct drm_crtc_state *state); > void (*commit)(struct sunxi_engine *engine); > struct drm_plane **(*layers_init)(struct drm_device *drm, > struct sunxi_engine *engine); > Reviewed-by: Neil Armstrong From mboxrd@z Thu Jan 1 00:00:00 1970 From: narmstrong@baylibre.com (Neil Armstrong) Date: Wed, 13 Dec 2017 17:06:14 +0100 Subject: [PATCH 4/8] drm/sun4i: crtc: Add a custom crtc atomic_check In-Reply-To: References: Message-ID: <1907c50b-d8a9-47db-d5c6-129a430a105f@baylibre.com> To: linux-arm-kernel@lists.infradead.org List-Id: linux-arm-kernel.lists.infradead.org On 13/12/2017 16:33, Maxime Ripard wrote: > We have some restrictions on what the planes and CRTC can provide that are > tied to only one generation of display engines. > > For example, on the first generation, we can only have one YUV plane or one > plane that uses the frontend output. > > Let's allow our engines to provide an atomic_check callback to validate the > current configuration. > > Signed-off-by: Maxime Ripard > --- > drivers/gpu/drm/sun4i/sun4i_crtc.c | 14 ++++++++++++++ > drivers/gpu/drm/sun4i/sunxi_engine.h | 2 ++ > 2 files changed, 16 insertions(+) > > diff --git a/drivers/gpu/drm/sun4i/sun4i_crtc.c b/drivers/gpu/drm/sun4i/sun4i_crtc.c > index 5decae0069d0..2a565325714f 100644 > --- a/drivers/gpu/drm/sun4i/sun4i_crtc.c > +++ b/drivers/gpu/drm/sun4i/sun4i_crtc.c > @@ -46,6 +46,19 @@ static struct drm_encoder *sun4i_crtc_get_encoder(struct drm_crtc *crtc) > return NULL; > } > > +static int sun4i_crtc_atomic_check(struct drm_crtc *crtc, > + struct drm_crtc_state *state) > +{ > + struct sun4i_crtc *scrtc = drm_crtc_to_sun4i_crtc(crtc); > + struct sunxi_engine *engine = scrtc->engine; > + int ret = 0; > + > + if (engine && engine->ops && engine->ops->atomic_check) > + ret = engine->ops->atomic_check(engine, state); > + > + return ret; > +} > + > static void sun4i_crtc_atomic_begin(struct drm_crtc *crtc, > struct drm_crtc_state *old_state) > { > @@ -125,6 +138,7 @@ static void sun4i_crtc_mode_set_nofb(struct drm_crtc *crtc) > } > > static const struct drm_crtc_helper_funcs sun4i_crtc_helper_funcs = { > + .atomic_check = sun4i_crtc_atomic_check, > .atomic_begin = sun4i_crtc_atomic_begin, > .atomic_flush = sun4i_crtc_atomic_flush, > .atomic_enable = sun4i_crtc_atomic_enable, > diff --git a/drivers/gpu/drm/sun4i/sunxi_engine.h b/drivers/gpu/drm/sun4i/sunxi_engine.h > index 4cb70ae65c79..42655230aeba 100644 > --- a/drivers/gpu/drm/sun4i/sunxi_engine.h > +++ b/drivers/gpu/drm/sun4i/sunxi_engine.h > @@ -16,6 +16,8 @@ struct drm_device; > struct sunxi_engine; > > struct sunxi_engine_ops { > + int (*atomic_check)(struct sunxi_engine *engine, > + struct drm_crtc_state *state); > void (*commit)(struct sunxi_engine *engine); > struct drm_plane **(*layers_init)(struct drm_device *drm, > struct sunxi_engine *engine); > Reviewed-by: Neil Armstrong From mboxrd@z Thu Jan 1 00:00:00 1970 From: Neil Armstrong Subject: Re: [PATCH 4/8] drm/sun4i: crtc: Add a custom crtc atomic_check Date: Wed, 13 Dec 2017 17:06:14 +0100 Message-ID: <1907c50b-d8a9-47db-d5c6-129a430a105f@baylibre.com> References: Mime-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: base64 Return-path: Received: from mail-wm0-x243.google.com (mail-wm0-x243.google.com [IPv6:2a00:1450:400c:c09::243]) by gabe.freedesktop.org (Postfix) with ESMTPS id 48CDB6E51C for ; Wed, 13 Dec 2017 16:06:17 +0000 (UTC) Received: by mail-wm0-x243.google.com with SMTP id 9so6010019wme.4 for ; Wed, 13 Dec 2017 08:06:17 -0800 (PST) In-Reply-To: Content-Language: en-US List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" To: Maxime Ripard , Daniel Vetter , David Airlie , Chen-Yu Tsai Cc: Thomas Petazzoni , dri-devel@lists.freedesktop.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, thomas@vitsch.nl List-Id: dri-devel@lists.freedesktop.org T24gMTMvMTIvMjAxNyAxNjozMywgTWF4aW1lIFJpcGFyZCB3cm90ZToKPiBXZSBoYXZlIHNvbWUg cmVzdHJpY3Rpb25zIG9uIHdoYXQgdGhlIHBsYW5lcyBhbmQgQ1JUQyBjYW4gcHJvdmlkZSB0aGF0 IGFyZQo+IHRpZWQgdG8gb25seSBvbmUgZ2VuZXJhdGlvbiBvZiBkaXNwbGF5IGVuZ2luZXMuCj4g Cj4gRm9yIGV4YW1wbGUsIG9uIHRoZSBmaXJzdCBnZW5lcmF0aW9uLCB3ZSBjYW4gb25seSBoYXZl IG9uZSBZVVYgcGxhbmUgb3Igb25lCj4gcGxhbmUgdGhhdCB1c2VzIHRoZSBmcm9udGVuZCBvdXRw dXQuCj4gCj4gTGV0J3MgYWxsb3cgb3VyIGVuZ2luZXMgdG8gcHJvdmlkZSBhbiBhdG9taWNfY2hl Y2sgY2FsbGJhY2sgdG8gdmFsaWRhdGUgdGhlCj4gY3VycmVudCBjb25maWd1cmF0aW9uLgo+IAo+ IFNpZ25lZC1vZmYtYnk6IE1heGltZSBSaXBhcmQgPG1heGltZS5yaXBhcmRAZnJlZS1lbGVjdHJv bnMuY29tPgo+IC0tLQo+ICBkcml2ZXJzL2dwdS9kcm0vc3VuNGkvc3VuNGlfY3J0Yy5jICAgfCAx NCArKysrKysrKysrKysrKwo+ICBkcml2ZXJzL2dwdS9kcm0vc3VuNGkvc3VueGlfZW5naW5lLmgg fCAgMiArKwo+ICAyIGZpbGVzIGNoYW5nZWQsIDE2IGluc2VydGlvbnMoKykKPiAKPiBkaWZmIC0t Z2l0IGEvZHJpdmVycy9ncHUvZHJtL3N1bjRpL3N1bjRpX2NydGMuYyBiL2RyaXZlcnMvZ3B1L2Ry bS9zdW40aS9zdW40aV9jcnRjLmMKPiBpbmRleCA1ZGVjYWUwMDY5ZDAuLjJhNTY1MzI1NzE0ZiAx MDA2NDQKPiAtLS0gYS9kcml2ZXJzL2dwdS9kcm0vc3VuNGkvc3VuNGlfY3J0Yy5jCj4gKysrIGIv ZHJpdmVycy9ncHUvZHJtL3N1bjRpL3N1bjRpX2NydGMuYwo+IEBAIC00Niw2ICs0NiwxOSBAQCBz dGF0aWMgc3RydWN0IGRybV9lbmNvZGVyICpzdW40aV9jcnRjX2dldF9lbmNvZGVyKHN0cnVjdCBk cm1fY3J0YyAqY3J0YykKPiAgCXJldHVybiBOVUxMOwo+ICB9Cj4gIAo+ICtzdGF0aWMgaW50IHN1 bjRpX2NydGNfYXRvbWljX2NoZWNrKHN0cnVjdCBkcm1fY3J0YyAqY3J0YywKPiArCQkJCSAgICBz dHJ1Y3QgZHJtX2NydGNfc3RhdGUgKnN0YXRlKQo+ICt7Cj4gKwlzdHJ1Y3Qgc3VuNGlfY3J0YyAq c2NydGMgPSBkcm1fY3J0Y190b19zdW40aV9jcnRjKGNydGMpOwo+ICsJc3RydWN0IHN1bnhpX2Vu Z2luZSAqZW5naW5lID0gc2NydGMtPmVuZ2luZTsKPiArCWludCByZXQgPSAwOwo+ICsKPiArCWlm IChlbmdpbmUgJiYgZW5naW5lLT5vcHMgJiYgZW5naW5lLT5vcHMtPmF0b21pY19jaGVjaykKPiAr CQlyZXQgPSBlbmdpbmUtPm9wcy0+YXRvbWljX2NoZWNrKGVuZ2luZSwgc3RhdGUpOwo+ICsKPiAr CXJldHVybiByZXQ7Cj4gK30KPiArCj4gIHN0YXRpYyB2b2lkIHN1bjRpX2NydGNfYXRvbWljX2Jl Z2luKHN0cnVjdCBkcm1fY3J0YyAqY3J0YywKPiAgCQkJCSAgICBzdHJ1Y3QgZHJtX2NydGNfc3Rh dGUgKm9sZF9zdGF0ZSkKPiAgewo+IEBAIC0xMjUsNiArMTM4LDcgQEAgc3RhdGljIHZvaWQgc3Vu NGlfY3J0Y19tb2RlX3NldF9ub2ZiKHN0cnVjdCBkcm1fY3J0YyAqY3J0YykKPiAgfQo+ICAKPiAg c3RhdGljIGNvbnN0IHN0cnVjdCBkcm1fY3J0Y19oZWxwZXJfZnVuY3Mgc3VuNGlfY3J0Y19oZWxw ZXJfZnVuY3MgPSB7Cj4gKwkuYXRvbWljX2NoZWNrCT0gc3VuNGlfY3J0Y19hdG9taWNfY2hlY2ss Cj4gIAkuYXRvbWljX2JlZ2luCT0gc3VuNGlfY3J0Y19hdG9taWNfYmVnaW4sCj4gIAkuYXRvbWlj X2ZsdXNoCT0gc3VuNGlfY3J0Y19hdG9taWNfZmx1c2gsCj4gIAkuYXRvbWljX2VuYWJsZQk9IHN1 bjRpX2NydGNfYXRvbWljX2VuYWJsZSwKPiBkaWZmIC0tZ2l0IGEvZHJpdmVycy9ncHUvZHJtL3N1 bjRpL3N1bnhpX2VuZ2luZS5oIGIvZHJpdmVycy9ncHUvZHJtL3N1bjRpL3N1bnhpX2VuZ2luZS5o Cj4gaW5kZXggNGNiNzBhZTY1Yzc5Li40MjY1NTIzMGFlYmEgMTAwNjQ0Cj4gLS0tIGEvZHJpdmVy cy9ncHUvZHJtL3N1bjRpL3N1bnhpX2VuZ2luZS5oCj4gKysrIGIvZHJpdmVycy9ncHUvZHJtL3N1 bjRpL3N1bnhpX2VuZ2luZS5oCj4gQEAgLTE2LDYgKzE2LDggQEAgc3RydWN0IGRybV9kZXZpY2U7 Cj4gIHN0cnVjdCBzdW54aV9lbmdpbmU7Cj4gIAo+ICBzdHJ1Y3Qgc3VueGlfZW5naW5lX29wcyB7 Cj4gKwlpbnQgKCphdG9taWNfY2hlY2spKHN0cnVjdCBzdW54aV9lbmdpbmUgKmVuZ2luZSwKPiAr CQkJICAgIHN0cnVjdCBkcm1fY3J0Y19zdGF0ZSAqc3RhdGUpOwo+ICAJdm9pZCAoKmNvbW1pdCko c3RydWN0IHN1bnhpX2VuZ2luZSAqZW5naW5lKTsKPiAgCXN0cnVjdCBkcm1fcGxhbmUgKiooKmxh eWVyc19pbml0KShzdHJ1Y3QgZHJtX2RldmljZSAqZHJtLAo+ICAJCQkJCSAgc3RydWN0IHN1bnhp X2VuZ2luZSAqZW5naW5lKTsKPiAKClJldmlld2VkLWJ5OiBOZWlsIEFybXN0cm9uZyA8bmFybXN0 cm9uZ0BiYXlsaWJyZS5jb20+Cl9fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19f X19fX19fX19fCmRyaS1kZXZlbCBtYWlsaW5nIGxpc3QKZHJpLWRldmVsQGxpc3RzLmZyZWVkZXNr dG9wLm9yZwpodHRwczovL2xpc3RzLmZyZWVkZXNrdG9wLm9yZy9tYWlsbWFuL2xpc3RpbmZvL2Ry aS1kZXZlbAo=