[ath9k-devel] trouble with DWA-552 and ath9k

[Sujith <Sujith.Manoharan@atheros.com>]

Brian Walker wrote:
> Ok! Now I have some debugging information. Here are the ath9k lines from
> dmesg right after boot:
> 
> ath9k 0000:00:0a.0: PCI INT A -> Link[LNKC] -> GSI 5 (level, low) -> IRQ 5
> ath: UNDEFINED -> AWAKE
> ath: serialize_regmode is 0
> ath: Eeprom VER: 14, REV: 18
> ath: EEPROM regdomain: 0x10
> ath: EEPROM indicates we should expect a direct regpair map
> ath: Country alpha2 being used: CO
> ath: Regpair used: 0x10
> ath: tx DMA: 512 buffers 1 desc/buf
> ath: tx DMA map: f4ca0000 (76320) -> 0 (76320)
> ath: beacon DMA: 4 buffers 1 desc/buf
> ath: beacon DMA map: f4c5d000 (576) -> 0 (576)
> ath: cachelsz 32 rxbufsize 3872
> ath: rx DMA: 512 buffers 1 desc/buf
> ath: rx DMA map: f4ce0000 (76320) -> 0 (76320)
> phy0: Selected rate control algorithm 'ath9k_rate_control'
> Registered led device: ath9k-phy0::radio
> Registered led device: ath9k-phy0::assoc
> Registered led device: ath9k-phy0::tx
> phy0: Atheros AR9280 Rev:2 mem=0xfa5a0000, irq=5
> cfg80211: Calling CRDA for country: CO
> cfg80211: Regulatory domain changed to country: CO
>      (start_freq - end_freq @ bandwidth), (max_antenna_gain, max_eirp)
>      (2402000 KHz - 2472000 KHz @ 40000 KHz), (300 mBi, 2700 mBm)
>      (5170000 KHz - 5250000 KHz @ 20000 KHz), (300 mBi, 1700 mBm)
>      (5250000 KHz - 5330000 KHz @ 20000 KHz), (300 mBi, 2300 mBm)
>      (5735000 KHz - 5835000 KHz @ 20000 KHz), (300 mBi, 3000 mBm)
> cfg80211: Calling CRDA for country: US
> cfg80211: Regulatory domain changed to country: US
>      (start_freq - end_freq @ bandwidth), (max_antenna_gain, max_eirp)
>      (2402000 KHz - 2472000 KHz @ 40000 KHz), (300 mBi, 2700 mBm)
>      (5170000 KHz - 5250000 KHz @ 40000 KHz), (300 mBi, 1700 mBm)
>      (5250000 KHz - 5330000 KHz @ 40000 KHz), (300 mBi, 2000 mBm)
>      (5490000 KHz - 5600000 KHz @ 40000 KHz), (300 mBi, 2000 mBm)
>      (5650000 KHz - 5710000 KHz @ 40000 KHz), (300 mBi, 2000 mBm)
>      (5735000 KHz - 5835000 KHz @ 40000 KHz), (300 mBi, 3000 mBm)

Initialization is apparently okay - no errors here.

> Here is dmesg after doing an "ifconfig wlan0 up":
> 
> ath: Starting driver with initial channel: 2412 MHz
> ath: ah->misc_mode 0x4
> ath: Attach a VIF of type: 2
> ath: BSS Changed PREAMBLE 0
> ath: BSS Changed CTS PROT 0
> ath: Marking phy0 as idle
> ath: timeout (100000 us) on reg 0x7000: 0xffffffff & 0x00000003 != 0x00000000
> ath: RTC stuck in MAC reset
> ath: Chip reset failed

The first HW reset fails as the contents of RTC_RC is weird.
Which probably means that the earlier initialization messed up somewhere,
corrupting the RTC register space - this would be my immediate guess.

Will take a look. Thanks for the debug log.

Sujith