From: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
To: Abel Vesa <abel.vesa@linaro.org>, Andy Gross <agross@kernel.org>,
Bjorn Andersson <andersson@kernel.org>,
Georgi Djakov <djakov@kernel.org>,
Konrad Dybcio <konrad.dybcio@linaro.org>,
Rob Herring <robh@kernel.org>
Cc: Linux Kernel Mailing List <linux-kernel@vger.kernel.org>,
devicetree@vger.kernel.org, linux-arm-msm@vger.kernel.org,
linux-pm@vger.kernel.org
Subject: Re: [PATCH 1/2] dt-bindings: interconnect: Add Qualcomm SM8550 DT bindings
Date: Wed, 16 Nov 2022 14:06:32 +0100 [thread overview]
Message-ID: <19686cfa-a3ec-fce4-04fd-3e047062295f@linaro.org> (raw)
In-Reply-To: <20221116114526.2679041-1-abel.vesa@linaro.org>
On 16/11/2022 12:45, Abel Vesa wrote:
> The Qualcomm SM8550 SoC has several bus fabrics that could be
> controlled and tuned dynamically according to the bandwidth demand
>
> Signed-off-by: Abel Vesa <abel.vesa@linaro.org>
> ---
> .../bindings/interconnect/qcom,rpmh.yaml | 19 +-
> .../dt-bindings/interconnect/qcom,sm8550.h | 190 ++++++++++++++++++
> 2 files changed, 208 insertions(+), 1 deletion(-)
> create mode 100644 include/dt-bindings/interconnect/qcom,sm8550.h
>
> diff --git a/Documentation/devicetree/bindings/interconnect/qcom,rpmh.yaml b/Documentation/devicetree/bindings/interconnect/qcom,rpmh.yaml
> index a429a1ed1006..667ed6815773 100644
> --- a/Documentation/devicetree/bindings/interconnect/qcom,rpmh.yaml
> +++ b/Documentation/devicetree/bindings/interconnect/qcom,rpmh.yaml
> @@ -132,12 +132,29 @@ properties:
> - qcom,sm8450-nsp-noc
> - qcom,sm8450-pcie-anoc
> - qcom,sm8450-system-noc
> + - qcom,sm8550-aggre1-noc
> + - qcom,sm8550-aggre2-noc
> + - qcom,sm8550-clk-virt
> + - qcom,sm8550-config-noc
> + - qcom,sm8550-cnoc-main
Keep the names sorted alphabetically.
> + - qcom,sm8550-gem-noc
> + - qcom,sm8550-lpass-ag-noc
> + - qcom,sm8550-lpass-lpiaon-noc
> + - qcom,sm8550-lpass-lpicx-noc
> + - qcom,sm8550-mc-virt
> + - qcom,sm8550-mmss-noc
> + - qcom,sm8550-nsp-noc
> + - qcom,sm8550-pcie-anoc
> + - qcom,sm8550-system-noc
> +
> + clocks:
> + minItems: 1
> + maxItems: 2
Not explained...
>
> '#interconnect-cells': true
>
> required:
> - compatible
> - - reg
Nope. This is undocumented change.
See also:
https://lore.kernel.org/all/20221026190520.4004264-2-quic_molvera@quicinc.com/
>
> unevaluatedProperties: false
>
> diff --git a/include/dt-bindings/interconnect/qcom,sm8550.h b/include/dt-bindings/interconnect/qcom,sm8550.h
> new file mode 100644
> index 000000000000..a066460d5a12
> --- /dev/null
> +++ b/include/dt-bindings/interconnect/qcom,sm8550.h
> @@ -0,0 +1,190 @@
> +/* SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) */
> +/*
> + * Copyright (c) 2021, The Linux Foundation. All rights reserved.
> + * Copyright (c) 2022, Linaro Limited
> + */
> +
> +#ifndef __DT_BINDINGS_INTERCONNECT_QCOM_SM8550_H
> +#define __DT_BINDINGS_INTERCONNECT_QCOM_SM8550_H
> +
> +#define MASTER_QSPI_0 0
> +#define MASTER_QUP_1 1
> +#define MASTER_SDCC_4 2
> +#define MASTER_UFS_MEM 3
> +#define MASTER_USB3_0 4
> +#define SLAVE_A1NOC_SNOC 5
> +
> +#define MASTER_QDSS_BAM 0
Drop weird tab/spaces in the middle.
Best regards,
Krzysztof
prev parent reply other threads:[~2022-11-16 13:07 UTC|newest]
Thread overview: 4+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-11-16 11:45 [PATCH 1/2] dt-bindings: interconnect: Add Qualcomm SM8550 DT bindings Abel Vesa
2022-11-16 11:45 ` [PATCH 2/2] interconnect: qcom: Add SM8550 interconnect provider driver Abel Vesa
2022-11-16 17:32 ` Krzysztof Kozlowski
2022-11-16 13:06 ` Krzysztof Kozlowski [this message]
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