From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id D9AA2CCA479 for ; Fri, 1 Jul 2022 07:31:26 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233993AbiGAHbZ (ORCPT ); Fri, 1 Jul 2022 03:31:25 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:56818 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233709AbiGAHbZ (ORCPT ); Fri, 1 Jul 2022 03:31:25 -0400 Received: from m-r2.th.seeweb.it (m-r2.th.seeweb.it [IPv6:2001:4b7a:2000:18::171]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 01BD76B837; Fri, 1 Jul 2022 00:31:22 -0700 (PDT) Received: from [192.168.1.101] (abxi46.neoplus.adsl.tpnet.pl [83.9.2.46]) (using TLSv1.3 with cipher TLS_AES_128_GCM_SHA256 (128/128 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) by m-r2.th.seeweb.it (Postfix) with ESMTPSA id DF0693F7B4; Fri, 1 Jul 2022 09:31:18 +0200 (CEST) Message-ID: <198fc303-30e5-31c7-5159-b787916ee6d8@somainline.org> Date: Fri, 1 Jul 2022 09:31:17 +0200 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:91.0) Gecko/20100101 Thunderbird/91.10.0 Subject: Re: [PATCH V2 7/8] arm64: dts: Add ipq5018 SoC and MP03 board support Content-Language: en-US To: Sricharan Ramabadhran , agross@kernel.org, bjorn.andersson@linaro.org, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, mturquette@baylibre.com, sboyd@kernel.org, linus.walleij@linaro.org, catalin.marinas@arm.com, p.zabel@pengutronix.de, quic_varada@quicinc.com, linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-clk@vger.kernel.org, linux-gpio@vger.kernel.org, linux-arm-kernel@lists.infradead.org References: <20220621161126.15883-1-quic_srichara@quicinc.com> <20220621161126.15883-8-quic_srichara@quicinc.com> <2a16703b-5b1e-5ce9-0af0-2e08da49d8ed@quicinc.com> From: Konrad Dybcio In-Reply-To: <2a16703b-5b1e-5ce9-0af0-2e08da49d8ed@quicinc.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org On 28.06.2022 09:14, Sricharan Ramabadhran wrote: > Thanks Konrad for the review. > > On 6/27/2022 12:02 AM, Konrad Dybcio wrote: >> >> On 21.06.2022 18:11, Sricharan R wrote: >>> From: Varadarajan Narayanan >>> >>> Add initial device tree support for the Qualcomm IPQ5018 SoC and >>> MP03.1-C2 board. >>> >>> Co-developed-by: Sricharan R >>> Signed-off-by: Sricharan R >>> Signed-off-by: Varadarajan Narayanan >>> --- >>>   arch/arm64/boot/dts/qcom/Makefile             |   1 + >>>   .../arm64/boot/dts/qcom/ipq5018-mp03.1-c2.dts |  29 +++ >>>   arch/arm64/boot/dts/qcom/ipq5018.dtsi         | 221 ++++++++++++++++++ >>>   3 files changed, 251 insertions(+) >>>   create mode 100644 arch/arm64/boot/dts/qcom/ipq5018-mp03.1-c2.dts >>>   create mode 100644 arch/arm64/boot/dts/qcom/ipq5018.dtsi >>> >>> diff --git a/arch/arm64/boot/dts/qcom/Makefile b/arch/arm64/boot/dts/qcom/Makefile >>> index f9e6343acd03..c44e701f093c 100644 >>> --- a/arch/arm64/boot/dts/qcom/Makefile >>> +++ b/arch/arm64/boot/dts/qcom/Makefile >>> @@ -10,6 +10,7 @@ dtb-$(CONFIG_ARCH_QCOM)    += ipq8074-hk10-c2.dtb >>>   dtb-$(CONFIG_ARCH_QCOM)    += msm8916-alcatel-idol347.dtb >>>   dtb-$(CONFIG_ARCH_QCOM)    += msm8916-asus-z00l.dtb >>>   dtb-$(CONFIG_ARCH_QCOM)    += msm8916-huawei-g7.dtb >>> +dtb-$(CONFIG_ARCH_QCOM)    += ipq5018-mp03.1-c2.dtb >>>   dtb-$(CONFIG_ARCH_QCOM)    += msm8916-longcheer-l8150.dtb >>>   dtb-$(CONFIG_ARCH_QCOM)    += msm8916-longcheer-l8910.dtb >>>   dtb-$(CONFIG_ARCH_QCOM)    += msm8916-mtp.dtb >>> diff --git a/arch/arm64/boot/dts/qcom/ipq5018-mp03.1-c2.dts b/arch/arm64/boot/dts/qcom/ipq5018-mp03.1-c2.dts >>> new file mode 100644 >>> index 000000000000..d1cd080ec3db >>> --- /dev/null >>> +++ b/arch/arm64/boot/dts/qcom/ipq5018-mp03.1-c2.dts >>> @@ -0,0 +1,29 @@ >>> +// SPDX-License-Identifier: GPL-2.0+ OR BSD-3-Clause >>> +/* >>> + * IPQ5018 CP01 board device tree source >>> + * >>> + * Copyright (c) 2020-2021, The Linux Foundation. All rights reserved. >>> + */ >>> + >>> +/dts-v1/; >>> + >>> +#include "ipq5018.dtsi" >>> + >>> +/ { >>> +    model = "Qualcomm Technologies, Inc. IPQ5018/AP-MP03-C2"; >>> +    compatible = "qcom,ipq5018-mp03", "qcom,ipq5018"; >>> + >>> +    aliases { >>> +        serial0 = &blsp1_uart1; >>> +    }; >>> + >>> +    chosen { >>> +        stdout-path = "serial0:115200n8"; >>> +    }; >>> +}; >>> + >>> +&blsp1_uart1 { >>> +    pinctrl-0 = <&serial_1_pins>; >>> +    pinctrl-names = "default"; >>> +    status = "ok"; >>> +}; >>> diff --git a/arch/arm64/boot/dts/qcom/ipq5018.dtsi b/arch/arm64/boot/dts/qcom/ipq5018.dtsi >>> new file mode 100644 >>> index 000000000000..084fb7b30dfd >>> --- /dev/null >>> +++ b/arch/arm64/boot/dts/qcom/ipq5018.dtsi >>> @@ -0,0 +1,221 @@ >>> +// SPDX-License-Identifier: GPL-2.0+ OR BSD-3-Clause >>> +/* >>> + * Copyright (c) 2017-2021, The Linux Foundation. All rights reserved. >>> + */ >>> +/* >>> + * IPQ5018 SoC device tree source >>> + * >>> + * Copyright (c) 2019, The Linux Foundation. All rights reserved. >>> + */ >>> + >>> +#include >>> +#include >>> +#include >>> + >>> +/ { >>> +    #address-cells = <2>; >>> +    #size-cells = <2>; >>> +    interrupt-parent = <&intc>; >> Hi! >> >> interrupt-parent could go first. > >  ok. > > >>> + >>> +    sleep_clk: sleep-clk { >>> +        compatible = "fixed-clock"; >>> +        clock-frequency = <32000>; >>> +        #clock-cells = <0>; >>> +    }; >>> + >>> +    xo: xo { >>> +        compatible = "fixed-clock"; >>> +        clock-frequency = <24000000>; >>> +        #clock-cells = <0>; >>> +    }; >>> + >>> +    gen2clk0: gen2clk0 { >>> +        compatible = "fixed-clock"; >>> +        #clock-cells = <0>; >>> +        clock-frequency = <125000000>; >>> +        clock-output-names = "pcie20_phy0_pipe_clk"; >>> +    }; >>> + >>> +    gen2clk1: gen2clk1 { >>> +        compatible = "fixed-clock"; >>> +        #clock-cells = <0>; >>> +        clock-frequency = <125000000>; >>> +        clock-output-names = "pcie20_phy1_pipe_clk"; >>> +    }; >> I am not sure what's the current stance on this, but previously clock nodes >> used to be wrapped in a clocks {} node, as currently they are not sorted >> properly. >> >  hmm ok, yeah, see the clocks { node in some recent dts as well, will add the wrapper. > > >>> + >>> +    cpus: cpus { >> Is this label going to be used? >   hmm, not used, will remove. >>> +        #address-cells = <1>; >>> +        #size-cells = <0>; >>> + >>> +        CPU0: cpu@0 { >>> +            device_type = "cpu"; >>> +            compatible = "arm,cortex-a53"; >>> +            reg = <0x0>; >>> +            enable-method = "psci"; >>> +            next-level-cache = <&L2_0>; >>> +        }; >>> + >>> +        CPU1: cpu@1 { >>> +            device_type = "cpu"; >>> +            compatible = "arm,cortex-a53"; >>> +            enable-method = "psci"; >>> +            reg = <0x1>; >>> +            next-level-cache = <&L2_0>; >>> +        }; >>> + >>> +        L2_0: l2-cache { >>> +            compatible = "cache"; >>> +            cache-level = <0x2>; >> This should probably be dec, as it's not a register. > >    'dec' ? Sorry, i did not get that. Short for decimal. Konrad [snip] From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 79344C43334 for ; Fri, 1 Jul 2022 07:32:38 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:In-Reply-To:From:References:To:Subject: MIME-Version:Date:Message-ID:Reply-To:Cc:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=UATlueS5qMT7geJQ2JuaTqpWOVSZfdN8AJH+qlFjc3s=; b=vhL6acNslbhEPj a0NPyOE+xF7AyHkUZRv0VJzZqMBNvN4wR4YppfQWzcThLU26lM0kteNvvVmeqgBB0TwPmo0MF7oiO 4l0+kXu+5s4B2VCF0Dl1rJWZY+2aCjaPAWJqYd/1d7VID/5kQMlbJFyofTNHHgiGkzAp1d0Ujsk7Y 18uQebKflQ03cC9kfJDbFsivQTpcGzfrg1yLo96Ey3mhTd9rSa1xCHmh+IabjOu3PF8UXq6QX1PqP UWxmugGnCtcgkswrxNEuC0zr6XdbMc0hdooZpcCiJGSPLuaZO1HL6Fxu8/wTbezeBnAOUVqoQ9irt WPzt0bOmgU8BgwjaiJAQ==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1o7B7o-003PxL-LS; Fri, 01 Jul 2022 07:31:36 +0000 Received: from m-r2.th.seeweb.it ([5.144.164.171]) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1o7B7j-003PuC-Ou for linux-arm-kernel@lists.infradead.org; Fri, 01 Jul 2022 07:31:34 +0000 Received: from [192.168.1.101] (abxi46.neoplus.adsl.tpnet.pl [83.9.2.46]) (using TLSv1.3 with cipher TLS_AES_128_GCM_SHA256 (128/128 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) by m-r2.th.seeweb.it (Postfix) with ESMTPSA id DF0693F7B4; Fri, 1 Jul 2022 09:31:18 +0200 (CEST) Message-ID: <198fc303-30e5-31c7-5159-b787916ee6d8@somainline.org> Date: Fri, 1 Jul 2022 09:31:17 +0200 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:91.0) Gecko/20100101 Thunderbird/91.10.0 Subject: Re: [PATCH V2 7/8] arm64: dts: Add ipq5018 SoC and MP03 board support Content-Language: en-US To: Sricharan Ramabadhran , agross@kernel.org, bjorn.andersson@linaro.org, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, mturquette@baylibre.com, sboyd@kernel.org, linus.walleij@linaro.org, catalin.marinas@arm.com, p.zabel@pengutronix.de, quic_varada@quicinc.com, linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-clk@vger.kernel.org, linux-gpio@vger.kernel.org, linux-arm-kernel@lists.infradead.org References: <20220621161126.15883-1-quic_srichara@quicinc.com> <20220621161126.15883-8-quic_srichara@quicinc.com> <2a16703b-5b1e-5ce9-0af0-2e08da49d8ed@quicinc.com> From: Konrad Dybcio In-Reply-To: <2a16703b-5b1e-5ce9-0af0-2e08da49d8ed@quicinc.com> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20220701_003132_179998_1316B4E6 X-CRM114-Status: GOOD ( 19.37 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: base64 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org CgpPbiAyOC4wNi4yMDIyIDA5OjE0LCBTcmljaGFyYW4gUmFtYWJhZGhyYW4gd3JvdGU6Cj4gVGhh bmtzIEtvbnJhZCBmb3IgdGhlIHJldmlldy4KPiAKPiBPbiA2LzI3LzIwMjIgMTI6MDIgQU0sIEtv bnJhZCBEeWJjaW8gd3JvdGU6Cj4+Cj4+IE9uIDIxLjA2LjIwMjIgMTg6MTEsIFNyaWNoYXJhbiBS IHdyb3RlOgo+Pj4gRnJvbTogVmFyYWRhcmFqYW4gTmFyYXlhbmFuIDxxdWljX3ZhcmFkYUBxdWlj aW5jLmNvbT4KPj4+Cj4+PiBBZGQgaW5pdGlhbCBkZXZpY2UgdHJlZSBzdXBwb3J0IGZvciB0aGUg UXVhbGNvbW0gSVBRNTAxOCBTb0MgYW5kCj4+PiBNUDAzLjEtQzIgYm9hcmQuCj4+Pgo+Pj4gQ28t ZGV2ZWxvcGVkLWJ5OiBTcmljaGFyYW4gUiA8cXVpY19zcmljaGFyYUBxdWljaW5jLmNvbT4KPj4+ IFNpZ25lZC1vZmYtYnk6IFNyaWNoYXJhbiBSIDxxdWljX3NyaWNoYXJhQHF1aWNpbmMuY29tPgo+ Pj4gU2lnbmVkLW9mZi1ieTogVmFyYWRhcmFqYW4gTmFyYXlhbmFuIDxxdWljX3ZhcmFkYUBxdWlj aW5jLmNvbT4KPj4+IC0tLQo+Pj4gwqAgYXJjaC9hcm02NC9ib290L2R0cy9xY29tL01ha2VmaWxl wqDCoMKgwqDCoMKgwqDCoMKgwqDCoMKgIHzCoMKgIDEgKwo+Pj4gwqAgLi4uL2FybTY0L2Jvb3Qv ZHRzL3Fjb20vaXBxNTAxOC1tcDAzLjEtYzIuZHRzIHzCoCAyOSArKysKPj4+IMKgIGFyY2gvYXJt NjQvYm9vdC9kdHMvcWNvbS9pcHE1MDE4LmR0c2nCoMKgwqDCoMKgwqDCoMKgIHwgMjIxICsrKysr KysrKysrKysrKysrKwo+Pj4gwqAgMyBmaWxlcyBjaGFuZ2VkLCAyNTEgaW5zZXJ0aW9ucygrKQo+ Pj4gwqAgY3JlYXRlIG1vZGUgMTAwNjQ0IGFyY2gvYXJtNjQvYm9vdC9kdHMvcWNvbS9pcHE1MDE4 LW1wMDMuMS1jMi5kdHMKPj4+IMKgIGNyZWF0ZSBtb2RlIDEwMDY0NCBhcmNoL2FybTY0L2Jvb3Qv ZHRzL3Fjb20vaXBxNTAxOC5kdHNpCj4+Pgo+Pj4gZGlmZiAtLWdpdCBhL2FyY2gvYXJtNjQvYm9v dC9kdHMvcWNvbS9NYWtlZmlsZSBiL2FyY2gvYXJtNjQvYm9vdC9kdHMvcWNvbS9NYWtlZmlsZQo+ Pj4gaW5kZXggZjllNjM0M2FjZDAzLi5jNDRlNzAxZjA5M2MgMTAwNjQ0Cj4+PiAtLS0gYS9hcmNo L2FybTY0L2Jvb3QvZHRzL3Fjb20vTWFrZWZpbGUKPj4+ICsrKyBiL2FyY2gvYXJtNjQvYm9vdC9k dHMvcWNvbS9NYWtlZmlsZQo+Pj4gQEAgLTEwLDYgKzEwLDcgQEAgZHRiLSQoQ09ORklHX0FSQ0hf UUNPTSnCoMKgwqAgKz0gaXBxODA3NC1oazEwLWMyLmR0Ygo+Pj4gwqAgZHRiLSQoQ09ORklHX0FS Q0hfUUNPTSnCoMKgwqAgKz0gbXNtODkxNi1hbGNhdGVsLWlkb2wzNDcuZHRiCj4+PiDCoCBkdGIt JChDT05GSUdfQVJDSF9RQ09NKcKgwqDCoCArPSBtc204OTE2LWFzdXMtejAwbC5kdGIKPj4+IMKg IGR0Yi0kKENPTkZJR19BUkNIX1FDT00pwqDCoMKgICs9IG1zbTg5MTYtaHVhd2VpLWc3LmR0Ygo+ Pj4gK2R0Yi0kKENPTkZJR19BUkNIX1FDT00pwqDCoMKgICs9IGlwcTUwMTgtbXAwMy4xLWMyLmR0 Ygo+Pj4gwqAgZHRiLSQoQ09ORklHX0FSQ0hfUUNPTSnCoMKgwqAgKz0gbXNtODkxNi1sb25nY2hl ZXItbDgxNTAuZHRiCj4+PiDCoCBkdGItJChDT05GSUdfQVJDSF9RQ09NKcKgwqDCoCArPSBtc204 OTE2LWxvbmdjaGVlci1sODkxMC5kdGIKPj4+IMKgIGR0Yi0kKENPTkZJR19BUkNIX1FDT00pwqDC oMKgICs9IG1zbTg5MTYtbXRwLmR0Ygo+Pj4gZGlmZiAtLWdpdCBhL2FyY2gvYXJtNjQvYm9vdC9k dHMvcWNvbS9pcHE1MDE4LW1wMDMuMS1jMi5kdHMgYi9hcmNoL2FybTY0L2Jvb3QvZHRzL3Fjb20v aXBxNTAxOC1tcDAzLjEtYzIuZHRzCj4+PiBuZXcgZmlsZSBtb2RlIDEwMDY0NAo+Pj4gaW5kZXgg MDAwMDAwMDAwMDAwLi5kMWNkMDgwZWMzZGIKPj4+IC0tLSAvZGV2L251bGwKPj4+ICsrKyBiL2Fy Y2gvYXJtNjQvYm9vdC9kdHMvcWNvbS9pcHE1MDE4LW1wMDMuMS1jMi5kdHMKPj4+IEBAIC0wLDAg KzEsMjkgQEAKPj4+ICsvLyBTUERYLUxpY2Vuc2UtSWRlbnRpZmllcjogR1BMLTIuMCsgT1IgQlNE LTMtQ2xhdXNlCj4+PiArLyoKPj4+ICsgKiBJUFE1MDE4IENQMDEgYm9hcmQgZGV2aWNlIHRyZWUg c291cmNlCj4+PiArICoKPj4+ICsgKiBDb3B5cmlnaHQgKGMpIDIwMjAtMjAyMSwgVGhlIExpbnV4 IEZvdW5kYXRpb24uIEFsbCByaWdodHMgcmVzZXJ2ZWQuCj4+PiArICovCj4+PiArCj4+PiArL2R0 cy12MS87Cj4+PiArCj4+PiArI2luY2x1ZGUgImlwcTUwMTguZHRzaSIKPj4+ICsKPj4+ICsvIHsK Pj4+ICvCoMKgwqAgbW9kZWwgPSAiUXVhbGNvbW0gVGVjaG5vbG9naWVzLCBJbmMuIElQUTUwMTgv QVAtTVAwMy1DMiI7Cj4+PiArwqDCoMKgIGNvbXBhdGlibGUgPSAicWNvbSxpcHE1MDE4LW1wMDMi LCAicWNvbSxpcHE1MDE4IjsKPj4+ICsKPj4+ICvCoMKgwqAgYWxpYXNlcyB7Cj4+PiArwqDCoMKg wqDCoMKgwqAgc2VyaWFsMCA9ICZibHNwMV91YXJ0MTsKPj4+ICvCoMKgwqAgfTsKPj4+ICsKPj4+ ICvCoMKgwqAgY2hvc2VuIHsKPj4+ICvCoMKgwqDCoMKgwqDCoCBzdGRvdXQtcGF0aCA9ICJzZXJp YWwwOjExNTIwMG44IjsKPj4+ICvCoMKgwqAgfTsKPj4+ICt9Owo+Pj4gKwo+Pj4gKyZibHNwMV91 YXJ0MSB7Cj4+PiArwqDCoMKgIHBpbmN0cmwtMCA9IDwmc2VyaWFsXzFfcGlucz47Cj4+PiArwqDC oMKgIHBpbmN0cmwtbmFtZXMgPSAiZGVmYXVsdCI7Cj4+PiArwqDCoMKgIHN0YXR1cyA9ICJvayI7 Cj4+PiArfTsKPj4+IGRpZmYgLS1naXQgYS9hcmNoL2FybTY0L2Jvb3QvZHRzL3Fjb20vaXBxNTAx OC5kdHNpIGIvYXJjaC9hcm02NC9ib290L2R0cy9xY29tL2lwcTUwMTguZHRzaQo+Pj4gbmV3IGZp bGUgbW9kZSAxMDA2NDQKPj4+IGluZGV4IDAwMDAwMDAwMDAwMC4uMDg0ZmI3YjMwZGZkCj4+PiAt LS0gL2Rldi9udWxsCj4+PiArKysgYi9hcmNoL2FybTY0L2Jvb3QvZHRzL3Fjb20vaXBxNTAxOC5k dHNpCj4+PiBAQCAtMCwwICsxLDIyMSBAQAo+Pj4gKy8vIFNQRFgtTGljZW5zZS1JZGVudGlmaWVy OiBHUEwtMi4wKyBPUiBCU0QtMy1DbGF1c2UKPj4+ICsvKgo+Pj4gKyAqIENvcHlyaWdodCAoYykg MjAxNy0yMDIxLCBUaGUgTGludXggRm91bmRhdGlvbi4gQWxsIHJpZ2h0cyByZXNlcnZlZC4KPj4+ ICsgKi8KPj4+ICsvKgo+Pj4gKyAqIElQUTUwMTggU29DIGRldmljZSB0cmVlIHNvdXJjZQo+Pj4g KyAqCj4+PiArICogQ29weXJpZ2h0IChjKSAyMDE5LCBUaGUgTGludXggRm91bmRhdGlvbi4gQWxs IHJpZ2h0cyByZXNlcnZlZC4KPj4+ICsgKi8KPj4+ICsKPj4+ICsjaW5jbHVkZSA8ZHQtYmluZGlu Z3MvaW50ZXJydXB0LWNvbnRyb2xsZXIvYXJtLWdpYy5oPgo+Pj4gKyNpbmNsdWRlIDxkdC1iaW5k aW5ncy9jbG9jay9xY29tLGdjYy1pcHE1MDE4Lmg+Cj4+PiArI2luY2x1ZGUgPGR0LWJpbmRpbmdz L3Jlc2V0L3Fjb20sZ2NjLWlwcTUwMTguaD4KPj4+ICsKPj4+ICsvIHsKPj4+ICvCoMKgwqAgI2Fk ZHJlc3MtY2VsbHMgPSA8Mj47Cj4+PiArwqDCoMKgICNzaXplLWNlbGxzID0gPDI+Owo+Pj4gK8Kg wqDCoCBpbnRlcnJ1cHQtcGFyZW50ID0gPCZpbnRjPjsKPj4gSGkhCj4+Cj4+IGludGVycnVwdC1w YXJlbnQgY291bGQgZ28gZmlyc3QuCj4gCj4gwqBvay4KPiAKPiAKPj4+ICsKPj4+ICvCoMKgwqAg c2xlZXBfY2xrOiBzbGVlcC1jbGsgewo+Pj4gK8KgwqDCoMKgwqDCoMKgIGNvbXBhdGlibGUgPSAi Zml4ZWQtY2xvY2siOwo+Pj4gK8KgwqDCoMKgwqDCoMKgIGNsb2NrLWZyZXF1ZW5jeSA9IDwzMjAw MD47Cj4+PiArwqDCoMKgwqDCoMKgwqAgI2Nsb2NrLWNlbGxzID0gPDA+Owo+Pj4gK8KgwqDCoCB9 Owo+Pj4gKwo+Pj4gK8KgwqDCoCB4bzogeG8gewo+Pj4gK8KgwqDCoMKgwqDCoMKgIGNvbXBhdGli bGUgPSAiZml4ZWQtY2xvY2siOwo+Pj4gK8KgwqDCoMKgwqDCoMKgIGNsb2NrLWZyZXF1ZW5jeSA9 IDwyNDAwMDAwMD47Cj4+PiArwqDCoMKgwqDCoMKgwqAgI2Nsb2NrLWNlbGxzID0gPDA+Owo+Pj4g K8KgwqDCoCB9Owo+Pj4gKwo+Pj4gK8KgwqDCoCBnZW4yY2xrMDogZ2VuMmNsazAgewo+Pj4gK8Kg wqDCoMKgwqDCoMKgIGNvbXBhdGlibGUgPSAiZml4ZWQtY2xvY2siOwo+Pj4gK8KgwqDCoMKgwqDC oMKgICNjbG9jay1jZWxscyA9IDwwPjsKPj4+ICvCoMKgwqDCoMKgwqDCoCBjbG9jay1mcmVxdWVu Y3kgPSA8MTI1MDAwMDAwPjsKPj4+ICvCoMKgwqDCoMKgwqDCoCBjbG9jay1vdXRwdXQtbmFtZXMg PSAicGNpZTIwX3BoeTBfcGlwZV9jbGsiOwo+Pj4gK8KgwqDCoCB9Owo+Pj4gKwo+Pj4gK8KgwqDC oCBnZW4yY2xrMTogZ2VuMmNsazEgewo+Pj4gK8KgwqDCoMKgwqDCoMKgIGNvbXBhdGlibGUgPSAi Zml4ZWQtY2xvY2siOwo+Pj4gK8KgwqDCoMKgwqDCoMKgICNjbG9jay1jZWxscyA9IDwwPjsKPj4+ ICvCoMKgwqDCoMKgwqDCoCBjbG9jay1mcmVxdWVuY3kgPSA8MTI1MDAwMDAwPjsKPj4+ICvCoMKg wqDCoMKgwqDCoCBjbG9jay1vdXRwdXQtbmFtZXMgPSAicGNpZTIwX3BoeTFfcGlwZV9jbGsiOwo+ Pj4gK8KgwqDCoCB9Owo+PiBJIGFtIG5vdCBzdXJlIHdoYXQncyB0aGUgY3VycmVudCBzdGFuY2Ug b24gdGhpcywgYnV0IHByZXZpb3VzbHkgY2xvY2sgbm9kZXMKPj4gdXNlZCB0byBiZSB3cmFwcGVk IGluIGEgY2xvY2tzIHt9IG5vZGUsIGFzIGN1cnJlbnRseSB0aGV5IGFyZSBub3Qgc29ydGVkCj4+ IHByb3Blcmx5Lgo+Pgo+IMKgaG1tIG9rLCB5ZWFoLCBzZWUgdGhlIGNsb2NrcyB7IG5vZGUgaW4g c29tZSByZWNlbnQgZHRzIGFzIHdlbGwsIHdpbGwgYWRkIHRoZSB3cmFwcGVyLgo+IAo+IAo+Pj4g Kwo+Pj4gK8KgwqDCoCBjcHVzOiBjcHVzIHsKPj4gSXMgdGhpcyBsYWJlbCBnb2luZyB0byBiZSB1 c2VkPwo+IMKgIGhtbSwgbm90IHVzZWQsIHdpbGwgcmVtb3ZlLgo+Pj4gK8KgwqDCoMKgwqDCoMKg ICNhZGRyZXNzLWNlbGxzID0gPDE+Owo+Pj4gK8KgwqDCoMKgwqDCoMKgICNzaXplLWNlbGxzID0g PDA+Owo+Pj4gKwo+Pj4gK8KgwqDCoMKgwqDCoMKgIENQVTA6IGNwdUAwIHsKPj4+ICvCoMKgwqDC oMKgwqDCoMKgwqDCoMKgIGRldmljZV90eXBlID0gImNwdSI7Cj4+PiArwqDCoMKgwqDCoMKgwqDC oMKgwqDCoCBjb21wYXRpYmxlID0gImFybSxjb3J0ZXgtYTUzIjsKPj4+ICvCoMKgwqDCoMKgwqDC oMKgwqDCoMKgIHJlZyA9IDwweDA+Owo+Pj4gK8KgwqDCoMKgwqDCoMKgwqDCoMKgwqAgZW5hYmxl LW1ldGhvZCA9ICJwc2NpIjsKPj4+ICvCoMKgwqDCoMKgwqDCoMKgwqDCoMKgIG5leHQtbGV2ZWwt Y2FjaGUgPSA8JkwyXzA+Owo+Pj4gK8KgwqDCoMKgwqDCoMKgIH07Cj4+PiArCj4+PiArwqDCoMKg wqDCoMKgwqAgQ1BVMTogY3B1QDEgewo+Pj4gK8KgwqDCoMKgwqDCoMKgwqDCoMKgwqAgZGV2aWNl X3R5cGUgPSAiY3B1IjsKPj4+ICvCoMKgwqDCoMKgwqDCoMKgwqDCoMKgIGNvbXBhdGlibGUgPSAi YXJtLGNvcnRleC1hNTMiOwo+Pj4gK8KgwqDCoMKgwqDCoMKgwqDCoMKgwqAgZW5hYmxlLW1ldGhv ZCA9ICJwc2NpIjsKPj4+ICvCoMKgwqDCoMKgwqDCoMKgwqDCoMKgIHJlZyA9IDwweDE+Owo+Pj4g K8KgwqDCoMKgwqDCoMKgwqDCoMKgwqAgbmV4dC1sZXZlbC1jYWNoZSA9IDwmTDJfMD47Cj4+PiAr wqDCoMKgwqDCoMKgwqAgfTsKPj4+ICsKPj4+ICvCoMKgwqDCoMKgwqDCoCBMMl8wOiBsMi1jYWNo ZSB7Cj4+PiArwqDCoMKgwqDCoMKgwqDCoMKgwqDCoCBjb21wYXRpYmxlID0gImNhY2hlIjsKPj4+ ICvCoMKgwqDCoMKgwqDCoMKgwqDCoMKgIGNhY2hlLWxldmVsID0gPDB4Mj47Cj4+IFRoaXMgc2hv dWxkIHByb2JhYmx5IGJlIGRlYywgYXMgaXQncyBub3QgYSByZWdpc3Rlci4KPiAKPiDCoMKgICdk ZWMnID8gU29ycnksIGkgZGlkIG5vdCBnZXQgdGhhdC4KU2hvcnQgZm9yIGRlY2ltYWwuCgpLb25y YWQKCltzbmlwXQoKX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19f X18KbGludXgtYXJtLWtlcm5lbCBtYWlsaW5nIGxpc3QKbGludXgtYXJtLWtlcm5lbEBsaXN0cy5p bmZyYWRlYWQub3JnCmh0dHA6Ly9saXN0cy5pbmZyYWRlYWQub3JnL21haWxtYW4vbGlzdGluZm8v bGludXgtYXJtLWtlcm5lbAo=