From 84b058f6677cda666ae19b5717c8386d63778647 Mon Sep 17 00:00:00 2001 From: Josua Mayer Date: Wed, 9 Jun 2021 16:43:32 +0200 Subject: [PATCH] ARM: dts: imx6qdl-hummingboard: attach tc358743 capture device --- arch/arm/boot/dts/imx6qdl-hummingboard.dtsi | 48 +++++++++++++++++++++ 1 file changed, 48 insertions(+) diff --git a/arch/arm/boot/dts/imx6qdl-hummingboard.dtsi b/arch/arm/boot/dts/imx6qdl-hummingboard.dtsi index 2ffb21dd89f2..f49143344299 100644 --- a/arch/arm/boot/dts/imx6qdl-hummingboard.dtsi +++ b/arch/arm/boot/dts/imx6qdl-hummingboard.dtsi @@ -142,6 +142,12 @@ sound-spdif { spdif-controller = <&spdif>; spdif-out; }; + + tc358743_clk: bridge-clk { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <27000000>; + }; }; &audmux { @@ -203,6 +209,27 @@ sgtl5000: codec@a { VDDA-supply = <&v_3v2>; VDDIO-supply = <&v_3v2>; }; + + tc358743: capture@f { + compatible = "toshiba,tc358743"; + reg = <0x0f>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_hummingboard_mipi>; + //clocks = <&clks IMX6QDL_CLK_CKO2>; + clocks = <&tc358743_clk>; + clock-names = "refclk"; + reset-gpios = <&gpio2 10 GPIO_ACTIVE_LOW>; + + port { + tc358743_out: endpoint { + remote-endpoint = <&mipi_csi2_in>; + data-lanes = <1 2>; + clock-lanes = <0>; + clock-noncontinuous; + link-frequencies = /bits/ 64 <594000000>; + }; + }; + }; }; &i2c2 { @@ -247,6 +274,13 @@ MX6QDL_PAD_KEY_ROW3__I2C2_SDA 0x4001b8b1 >; }; + pinctrl_hummingboard_mipi: hummingboard_mipi { + fsl,pins = < + MX6QDL_PAD_SD4_DAT2__GPIO2_IO10 0x4001b8b1 + MX6QDL_PAD_NANDF_CS2__CCM_CLKO2 0x130b0 + >; + }; + pinctrl_hummingboard_pcie_reset: hummingboard-pcie-reset { fsl,pins = < MX6QDL_PAD_EIM_DA4__GPIO3_IO04 0x1b0b1 @@ -310,6 +344,20 @@ MX6QDL_PAD_DISP0_DAT9__GPIO4_IO30 0x1b0b0 }; }; +&mipi_csi { + status = "okay"; + + port { + mipi_csi2_in: endpoint { + remote-endpoint = <&tc358743_out>; + data-lanes = <1 2 3 4>; + clock-lanes = <0>; + clock-noncontinuous; + link-frequencies = /bits/ 64 <297000000>; + }; + }; +}; + &pcie { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_hummingboard_pcie_reset>; -- 2.31.1