From: Boris Ostrovsky <boris.ostrovsky@oracle.com>
To: Andrew Cooper <andrew.cooper3@citrix.com>,
Xen-devel <xen-devel@lists.xen.org>
Cc: Julien Grall <julien.grall@arm.com>,
Suravee Suthikulpanit <suravee.suthikulpanit@amd.com>,
Jan Beulich <JBeulich@suse.com>
Subject: Re: [PATCH for 4.9 4/6] x86/svm: Introduce svm_emul_swint_injection()
Date: Mon, 3 Apr 2017 10:04:50 -0400 [thread overview]
Message-ID: <19a9dfb5-545d-ca48-ac0d-81347b8baf4f@oracle.com> (raw)
In-Reply-To: <1490989853-21879-5-git-send-email-andrew.cooper3@citrix.com>
> +static void svm_emul_swint_injection(struct x86_event *event)
> +{
> + struct vcpu *curr = current;
> + struct vmcb_struct *vmcb = curr->arch.hvm_svm.vmcb;
> + struct cpu_user_regs *regs = guest_cpu_user_regs();
> +
> + unsigned int trap = event->vector, type = event->type;
> + unsigned int fault = TRAP_gp_fault, ec = 0;
> +
> + if ( vmcb->_cr0 & X86_CR0_PE ) /* TODO: support real-mode injection? */
if ( !(vmcb->_cr0 & X86_CR0_PE) )
goto raise_exception;
will avoid extra indentation level;
> + {
> + pagefault_info_t pf;
> + struct segment_register idtr;
> + unsigned int idte_size, idte_offset;
> + unsigned long idte_linear_addr;
> + struct { uint32_t a, b, c, d; } idte = {};
> + bool lm = vmcb->_efer & EFER_LMA;
> + enum hvm_segmentation_mode seg_mode =
> + lm ? hvm_seg_mode_long : hvm_seg_mode_prot;
> + int rc;
> +
> + idte_size = lm ? 16 : 8;
> + idte_offset = trap * idte_size;
> +
> + /* ICEBP sets the External Event bit despite being an instruction. */
> + ec = (trap << 3) | X86_XEC_IDT |
> + (type == X86_EVENTTYPE_PRI_SW_EXCEPTION ? X86_XEC_EXT : 0);
> +
> + /*
> + * TODO: This does not cover the v8086 mode with CR4.VME case
> + * correctly, but falls on the safe side from the point of view of a
> + * 32bit OS. Someone with many TUITs can see about reading the TSS
> + * Software Interrupt Redirection bitmap.
> + */
> + if ( (regs->eflags & X86_EFLAGS_VM) &&
> + MASK_EXTR(regs->eflags, X86_EFLAGS_IOPL) != 3 )
> + goto raise_exception;
> +
> + /*
> + * Read all 8/16 bytes so the idtr limit check is applied properly to
> + * this entry, even though don't look all the words read.
I think some words are missing here.
-boris
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next prev parent reply other threads:[~2017-04-03 14:04 UTC|newest]
Thread overview: 37+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-03-31 19:50 [PATCH for 4.9 0/6] x86/emul: Fixes Andrew Cooper
2017-03-31 19:50 ` [PATCH for 4.9 1/6] x86/hvm: Correct some address space terminology Andrew Cooper
2017-04-03 8:24 ` Paul Durrant
2017-04-03 8:24 ` Jan Beulich
2017-04-03 10:19 ` Andrew Cooper
2017-04-03 10:29 ` Jan Beulich
2017-03-31 19:50 ` [PATCH for 4.9 2/6] x86/hvm: Correct long mode predicate Andrew Cooper
2017-04-03 8:26 ` Paul Durrant
2017-04-03 8:30 ` Jan Beulich
2017-04-03 8:50 ` George Dunlap
2017-04-05 7:08 ` Tian, Kevin
2017-03-31 19:50 ` [PATCH for 4.9 3/6] x86/hvm: Fix segmentation logic for system segments Andrew Cooper
2017-04-03 8:31 ` Paul Durrant
2017-04-03 9:13 ` Jan Beulich
2017-04-03 14:27 ` Andrew Cooper
2017-04-03 15:07 ` Jan Beulich
2017-04-03 15:42 ` Andrew Cooper
2017-04-03 16:08 ` Jan Beulich
2017-04-03 17:37 ` Andrew Cooper
2017-04-04 10:18 ` Andrew Cooper
2017-04-04 10:32 ` Jan Beulich
2017-03-31 19:50 ` [PATCH for 4.9 4/6] x86/svm: Introduce svm_emul_swint_injection() Andrew Cooper
2017-04-03 9:30 ` Jan Beulich
2017-04-03 14:04 ` Boris Ostrovsky [this message]
2017-03-31 19:50 ` [PATCH for 4.9 5/6] x86/emul: Drop swint_emulate infrastructure Andrew Cooper
2017-04-03 8:36 ` Paul Durrant
2017-04-03 9:38 ` Jan Beulich
2017-03-31 19:50 ` [PATCH for 4.9 6/6] x86/emul: Require callers to provide LMA in the emulation context Andrew Cooper
2017-04-03 8:40 ` Paul Durrant
2017-04-03 10:10 ` Jan Beulich
2017-04-05 16:24 ` Andrew Cooper
2017-04-06 6:58 ` Jan Beulich
2017-04-06 9:47 ` Andrew Cooper
2017-04-06 14:14 ` Jan Beulich
2017-04-06 16:32 ` Andrew Cooper
2017-04-07 8:35 ` Jan Beulich
2017-04-05 16:07 ` Jan Beulich
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