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From: Martin Sperl <kernel-TqfNSX0MhmxHKSADF0wUEw@public.gmane.org>
To: Stephen Warren <swarren-3lzwWm7+Weoh9ZMKESR00Q@public.gmane.org>
Cc: linux-spi-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
	linux-rpi-kernel
	<linux-rpi-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org>,
	devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
	Mark Brown <broonie-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org>
Subject: Re: [PATCH 2/2] dt/bindings: control CS via standard GPIO operations instead of SPI-HW
Date: Tue, 17 Mar 2015 08:12:26 +0100	[thread overview]
Message-ID: <1B96F4D4-E072-4021-95F3-B985D1103BFF@martin.sperl.org> (raw)
In-Reply-To: <55079CF1.4000102-3lzwWm7+Weoh9ZMKESR00Q@public.gmane.org>


> On 17.03.2015, at 04:18, Stephen Warren <swarren-3lzwWm7+Weoh9ZMKESR00Q@public.gmane.org> wrote:
>> But then it means in principle that this is a more general issue
>> that just became apparent now.
> 
> Yes.
> 
...
>> So this is maybe the way forward for the whole default-dt?
>> 
>> For SPI it would look like this:
>> &gpio {
>>        spi0_pins: spi0_pins {
>>                brcm,pins = <7 8 9 10 11>;
>>                brcm,function = <4>; /* alt0 */
>>        };
>> 	...
>> }
>> 
>> &spi0 {
>> 	...
>>        pinctrl-0 = <&spi0_pins>;
>> 	...
>> }
>> 
>> And if you keep spi0 disabled in the dtsi files then the ALT
>> modes should not be set.
> 
> Yes, so long as it's disabled by default that would be OK. However, I
> wonder why we don't just rely on the firmware to set up the pinmux,
> since as you mentioned it does it now?
...
>> Obviously we could also split the gpio-block into 
>> "normal SPI" and "CS" pins, which would allow changing the
>> "defaults" also in the dts that gets build.
>> 
>> So how should we proceed?
> 
> If we do put any default CS GPIO setup in the kernel DT, we should
> indeed put it into a separate node (pinctrl state) so that the user can
> override it easily without any interactions with any other pins/...
So I will create a patch to separate the spi portions out as 
mentioned above.

I will actually create 2 gpio-sections:
one for the SPI transfer pins (GPIO 9, 10, 11) 
and one for the chipselects (8, 7), which can get overridden
either as output or as ALT0 in a customized device tree.

SPI by default shall be disabled.

Martin
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  parent reply	other threads:[~2015-03-17  7:12 UTC|newest]

Thread overview: 11+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2015-03-04 16:40 [PATCH 1/2] SPI: control CS via standard GPIO operations instead of SPI-HW kernel-TqfNSX0MhmxHKSADF0wUEw
     [not found] ` <1425487205-5477-1-git-send-email-kernel-TqfNSX0MhmxHKSADF0wUEw@public.gmane.org>
2015-03-04 16:40   ` [PATCH 2/2] dt/bindings: " kernel-TqfNSX0MhmxHKSADF0wUEw
     [not found]     ` <1425487205-5477-2-git-send-email-kernel-TqfNSX0MhmxHKSADF0wUEw@public.gmane.org>
2015-03-07  5:47       ` Stephen Warren
     [not found]         ` <54FA9109.6080102-3lzwWm7+Weoh9ZMKESR00Q@public.gmane.org>
2015-03-11 15:21           ` Martin Sperl
     [not found]             ` <A8477522-2A97-4D1B-89EC-A70B5A28489F-TqfNSX0MhmxHKSADF0wUEw@public.gmane.org>
2015-03-17  3:18               ` Stephen Warren
     [not found]                 ` <55079CF1.4000102-3lzwWm7+Weoh9ZMKESR00Q@public.gmane.org>
2015-03-17  7:12                   ` Martin Sperl [this message]
2015-03-17  8:03       ` Stefan Wahren
2015-03-04 17:01   ` [PATCH 1/2] SPI: " Marc Kleine-Budde
     [not found]     ` <54F73A60.9080403-bIcnvbaLZ9MEGnE8C9+IrQ@public.gmane.org>
2015-03-04 17:38       ` Martin Sperl
2015-03-07  5:38   ` Stephen Warren
     [not found]     ` <54FA8EB8.9090102-3lzwWm7+Weoh9ZMKESR00Q@public.gmane.org>
2015-03-07 10:50       ` Mark Brown

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