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From: "Nadathur, Sundar" <sundar.nadathur@intel.com>
To: Alan Tull <delicious.quinoa@gmail.com>,
	Moritz Fischer <moritz.fischer@ettus.com>
Cc: "Yves Vandervennet" <yves.vandervennet@linux.intel.com>,
	"Jason Gunthorpe" <jgunthorpe@obsidianresearch.com>,
	"matthew.gerlach@linux.intel.com"
	<matthew.gerlach@linux.intel.com>,
	linux-kernel <linux-kernel@vger.kernel.org>,
	"linux-fpga@vger.kernel.org" <linux-fpga@vger.kernel.org>,
	"Marek Vašut" <marex@denx.de>
Subject: RE: [RFC 7/8] fpga-region: add sysfs interface
Date: Wed, 22 Feb 2017 03:13:32 +0000	[thread overview]
Message-ID: <1CC272501B5BC543A05DB90AA509DED50B005A@fmsmsx122.amr.corp.intel.com> (raw)
In-Reply-To: <CANk1AXQxpcbGm-MrjrE-7FCmnXAW=Cieg+8QV6ypc6OSCLHTQg@mail.gmail.com>



> -----Original Message-----
> From: Alan Tull [mailto:delicious.quinoa@gmail.com]
> Sent: Tuesday, February 21, 2017 10:33 AM
> To: Moritz Fischer <moritz.fischer@ettus.com>
> Cc: Nadathur, Sundar <sundar.nadathur@intel.com>; Yves Vandervennet
> <yves.vandervennet@linux.intel.com>; Jason Gunthorpe
> <jgunthorpe@obsidianresearch.com>; matthew.gerlach@linux.intel.com;
> linux-kernel <linux-kernel@vger.kernel.org>; linux-fpga@vger.kernel.org;
> Marek Vašut <marex@denx.de>
> Subject: Re: [RFC 7/8] fpga-region: add sysfs interface
> 
> On Mon, Feb 20, 2017 at 5:49 PM, Moritz Fischer
> <moritz.fischer@ettus.com> wrote:
> > Hi Alan,
> >
> > On Sun, Feb 19, 2017 at 3:16 PM, Alan Tull <delicious.quinoa@gmail.com>
> wrote:
> >> On Sun, Feb 19, 2017 at 9:00 AM, Alan Tull <delicious.quinoa@gmail.com>
> wrote:
> >>> On Sat, Feb 18, 2017 at 2:45 PM, Moritz Fischer
> >>> <moritz.fischer@ettus.com> wrote:
> >>>> On Sat, Feb 18, 2017 at 02:10:43PM -0600, Alan Tull wrote:
> >>>>> On Sat, Feb 18, 2017 at 6:45 AM, Nadathur, Sundar
> >>>>> <sundar.nadathur@intel.com> wrote:
> >>>>>
> >>>>> > Hi all,
> >>>>> >    Interesting discussion. The discussion so far has brought out many
> concerns such as OS independence. There is an existing format, well-known
> to developers, with widespread support, and which is quite extensible: Type-
> Length-Value triples.
> >>> [...]
> >>>> Are there other users of the format? I have to admit I didn't look
> >>>> very long, but couldn't find any libs / existing code at a first glance.
> >>>
> >>> Is there a standard you are looking at?  Have you seen any use of
> >>> TLV's in the Linux kernel you could point to?	

Here are some examples of TLVs in the Linux kernel:
http://lxr.free-electrons.com/source/net/ipv6/exthdrs.c <-- includes TLV parsing code
http://lxr.free-electrons.com/source/drivers/net/ethernet/broadcom/bnx2x/bnx2x_vfpf.c 
http://lxr.free-electrons.com/source/include/sound/tlv.h 

In addition, some protocols like LLDP are defined in terms of TLVs. E.g.
http://lxr.free-electrons.com/source/drivers/net/ethernet/intel/i40e/i40e_dcb.h?v=4.4 

> >> On Sun, Feb 19, 2017 at 9:00 AM, Alan Tull <delicious.quinoa@gmail.com>
> wrote:
> >>> It is worth repeating that libdtc is GPL/BSD with the intent of
> >>> allowing proprietary code to use libdtc.  So license shouldn't be a barrier.
It is better to check with Windows folks before concluding this. 

> >> If we use key/value pairs, we could pass in child device info in one
> >> of the keys.  It could be either a device tree overlay or an ACPI
> >> overlay.  Or could just be left out.  So platforms that aren't
> >> already using DT wouldn't have to.  Platforms that are have a smooth
> >> road to enumeration.
> >
> > I'm not sure if you can bundle up enumeration info *with* the image
> > since you might e.g.
> > load the same image (i.e. same header) into different FPGAs and the
> > required update to the kernel state, i.e. live tree or ACPI would
> > depend entirely on which FPGA you loaded the image into w.r.t busses
> > it's connected to etc.
> >
> > I do think this info cannot be image specific, but needs to be passed
> > in via something external such as a dt overlay.
> 
> Yes, I think you are right about that.
> 
> Thanks!
> Alan

I agree that device enumeration should be separated out from the metadata format considerations. 

I got some feedback that not everybody may be familiar with TLVs. To make the proposal more clear and specific, let me add more information here.
* We represent every datum of interest with its Type (which indicates what it is), a Length (how many bytes it takes) and a Value (its actual value, taking as many bytes as the Length field indicates.)  
* The exact lengths of the Type and Length fields are up to us, but let us say they are 4 bytes each, for concreteness. As an example, say we want to express the function in the FPGA (crypto, compress, etc.) as a UUID (128 bits long) compliant with RFC 4122. We could have a Type of say 0x00000050 (4 bytes in all) to indicate Function UUIDs, and a Length field of 0x00000010 (16 bytes) and a value of say 3d8814d8-4ecc-4030-8415-0dea4e5e829a . 
* A Type may indicate that its value is another TLV, thus allowing nested TLVs. The nested TLV may be an array of TLVs (all of same Type) or a structure (TLVs of different Types). 

With a Key-Value Pair, if the parser comes across an unknown key (such as when an old parser comes across newer metadata), it would not know how to skip that KVP and move onto the next one. With TLVs, that flexibility is built in. Further, we can use bits in the Type field to indicate that it is mandatory, i.e., if the parser does not understand it, it should error out rather than skip it silently. This degree of forward compatibility is difficult to achieve with other formats. 

Thanks,
Sundar

  reply	other threads:[~2017-02-22  3:13 UTC|newest]

Thread overview: 63+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2017-02-15 16:14 FPGA Region enhancements and fixes Alan Tull
2017-02-15 16:14 ` [RFC 1/8] fpga-mgr: add a single function for fpga loading methods Alan Tull
2017-02-16  0:36   ` matthew.gerlach
2017-02-15 16:14 ` [RFC 2/8] fpga-region: support more than one overlay per FPGA region Alan Tull
2017-02-16 16:50   ` matthew.gerlach
2017-02-16 17:35     ` Alan Tull
2017-02-15 16:14 ` [RFC 3/8] fpga-bridge: add non-dt support Alan Tull
2017-02-15 16:14 ` [RFC 4/8] doc: fpga-mgr: separate getting/locking FPGA manager Alan Tull
2017-02-17 17:14   ` Li, Yi
2017-02-17 21:55     ` Alan Tull
2017-02-17 17:52   ` Moritz Fischer
2017-02-17 22:02     ` Alan Tull
2017-02-15 16:14 ` [RFC 5/8] " Alan Tull
2017-02-15 16:14 ` [RFC 6/8] fpga-region: separate out common code to allow non-dt support Alan Tull
2017-02-15 16:14 ` [RFC 7/8] fpga-region: add sysfs interface Alan Tull
2017-02-15 17:21   ` Jason Gunthorpe
2017-02-15 17:46     ` Alan Tull
2017-02-15 17:55       ` Moritz Fischer
2017-02-15 18:06       ` Jason Gunthorpe
2017-02-15 18:23         ` Alan Tull
2017-02-15 18:31           ` Moritz Fischer
2017-02-15 19:49           ` Jason Gunthorpe
2017-02-15 22:49             ` Alan Tull
2017-02-15 23:07               ` Jason Gunthorpe
2017-02-15 20:07           ` matthew.gerlach
2017-02-15 20:37             ` Jason Gunthorpe
2017-02-15 20:54               ` Moritz Fischer
2017-02-15 21:15                 ` Jason Gunthorpe
2017-02-15 21:36                   ` Moritz Fischer
2017-02-15 22:42                     ` Alan Tull
2017-02-16  0:16                       ` Moritz Fischer
2017-02-16 17:47                         ` Alan Tull
2017-02-16 17:56                           ` Jason Gunthorpe
2017-02-16 18:11                             ` Moritz Fischer
2017-02-17 22:28                 ` Yves Vandervennet
2017-02-18  2:30                   ` Moritz Fischer
2017-02-18 12:45                     ` Nadathur, Sundar
2017-02-18 20:10                       ` Alan Tull
2017-02-18 20:45                         ` Moritz Fischer
2017-02-19 15:00                           ` Alan Tull
2017-02-19 23:16                             ` Alan Tull
2017-02-20 23:49                               ` Moritz Fischer
2017-02-21 18:33                                 ` Alan Tull
2017-02-22  3:13                                   ` Nadathur, Sundar [this message]
2017-02-22  3:49                                     ` Moritz Fischer
2017-02-22  5:12                                       ` Jason Gunthorpe
2017-02-22  5:38                                         ` Moritz Fischer
2017-02-22  5:46                                           ` Nadathur, Sundar
2017-02-22  6:05                                             ` Moritz Fischer
2017-02-22 16:44                                               ` Jason Gunthorpe
2017-02-22 17:50                                                 ` Moritz Fischer
2017-02-22 17:54                                                   ` Jason Gunthorpe
2017-02-22 17:57                                                     ` Moritz Fischer
2017-02-22 16:33                                           ` Alan Tull
2017-02-22 16:44                                             ` Moritz Fischer
2017-02-22 16:52                                               ` Alan Tull
2017-02-27 20:09                                   ` Alan Tull
2017-02-27 22:49                                     ` Moritz Fischer
2017-02-28  0:04                                       ` matthew.gerlach
2017-02-15 21:20         ` Anatolij Gustschin
2017-02-15 16:14 ` [RFC 8/8] doc: fpga: add sysfs document for fpga region Alan Tull
2017-02-28 17:35 ` FPGA Region enhancements and fixes Alan Tull
2017-02-28 22:03   ` Alan Tull

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