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From: "H. Peter Anvin" <hpa@zytor.com>
To: Linus Torvalds <torvalds@linux-foundation.org>, paulmck@kernel.org
Cc: linux-toolchains@vger.kernel.org, peterz@infradead.org,
	rostedt@goodmis.org, gregkh@linuxfoundation.org,
	keescook@chromium.org
Subject: Re: A few proposals, this time from the C++ standards committee
Date: Mon, 18 Mar 2024 09:48:43 -0700	[thread overview]
Message-ID: <1E607720-D858-4969-BCFB-72819425F115@zytor.com> (raw)
In-Reply-To: <CAHk-=wgzPZu2X6HvF2qEBKBuC8GfP8fBAE-YSeC5uQCaBv75-A@mail.gmail.com>

On March 18, 2024 9:32:55 AM PDT, Linus Torvalds <torvalds@linux-foundation.org> wrote:
>[ Final note on this, I hope ]
>
>On Sun, 17 Mar 2024 at 13:50, Linus Torvalds
><torvalds@linux-foundation.org> wrote:
>>
>> Now, on x86, this happens automatically, because even if you move the
>> "*p = N" down to after the function call, all stores are releases, so
>> by the time 'p' becomes visible to anybody else, you are guaranteed to
>> see the right ordering.
>
>Actually, I take that back.
>
>Even x86 (and s390) can see problems from the "move store past a
>function call" issue, although they require more effort by the
>compiler.
>
>Because while it is true that every store is a release on x86, and as
>such any store that exposes the address to another CPU will
>automatically have done the release that also guarantees that the
>value 'N' is visible to any other thread (and then the acquire will
>guarantee that the other end sees the right value), that doesn't
>necessarily fix the problem.
>
>Why? Once the compiler has missed the original memory barrier (that
>was in the function that it moved the store past), the compiler could
>end up doing further store movement, and simply generate the code to
>do the '*p = N' store after exposing the address.
>
>At that point, even a strong memory ordering won't help - although it
>would probably make the problem easier to spot as a human (and would
>probably make it easier to trigger too, since then things like
>interrupts, preemption or single-stepping would also make the window
>to see it much much bigger).
>
>So x86 wouldn't be immune to this, it would just require more
>reordering by the compiler (which might in turn require that the
>function was inlined in order to give that re-ordering possibility, of
>course).
>
>               Linus

Hardware memory order doesn't mean anything if the compiler is the one messing it up...

  reply	other threads:[~2024-03-18 16:48 UTC|newest]

Thread overview: 19+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2024-03-17  9:14 A few proposals, this time from the C++ standards committee Paul E. McKenney
2024-03-17 18:50 ` Linus Torvalds
2024-03-17 20:56   ` Paul E. McKenney
2024-03-17 20:50 ` Linus Torvalds
2024-03-17 21:04   ` Paul E. McKenney
2024-03-17 21:44   ` Linus Torvalds
2024-03-17 22:02     ` Paul E. McKenney
2024-03-17 22:34       ` Linus Torvalds
2024-03-17 23:46         ` Jonathan Martin
2024-03-18  0:42         ` Paul E. McKenney
2024-03-18  1:49           ` Linus Torvalds
2024-03-18  2:44             ` Paul E. McKenney
2024-03-18  2:57               ` Randy Dunlap
2024-03-18  4:42                 ` Paul E. McKenney
2024-03-18  4:45                   ` Randy Dunlap
2024-03-18 16:32   ` Linus Torvalds
2024-03-18 16:48     ` H. Peter Anvin [this message]
2024-03-19  7:41 ` Marco Elver
2024-03-19  8:07   ` Jakub Jelinek

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