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* [PATCH v3 0/9] Support for Allwinner V3/S3L and Sochip S3
@ 2019-06-23  4:37 ` Icenowy Zheng
  0 siblings, 0 replies; 57+ messages in thread
From: Icenowy Zheng @ 2019-06-23  4:37 UTC (permalink / raw)
  To: Rob Herring, Maxime Ripard, Chen-Yu Tsai, Linus Walleij
  Cc: devicetree, linux-arm-kernel, linux-kernel, linux-clk,
	linux-gpio, linux-sunxi, Icenowy Zheng

This patchset tries to add support for Allwinner V3/S3L and Sochip S3.

Allwinner V3/V3s/S3L and Sochip S3 share the same die, but with
different package. V3 is BGA w/o co-packaged DDR, V3s is QFP w/ DDR2,
S3L is BGA w/ DDR2 and S3 is BGA w/ DDR3. (S3 and S3L is compatible
for pinout, but because of different DDR, DDR voltage is different
between the two variants). Because of the pin count of V3s is
restricted due to the package, some pins are not bound on V3s, but
they're bound on V3/S3/S3L.

Currently the kernel is only prepared for the features available on V3s.
This patchset adds the features missing on V3s for using them on
V3/S3/S3L, and add bindings for V3/S3/S3L. It also adds a S3 SoM by
Sipeed, called Lichee Zero Plus.

Icenowy Zheng (9):
  pinctrl: sunxi: v3s: introduce support for V3
  clk: sunxi-ng: v3s: add the missing PLL_DDR1
  dt-bindings: clk: sunxi-ccu: add compatible string for V3 CCU
  clk: sunxi-ng: v3s: add Allwinner V3 support
  dt-bindings: vendor-prefixes: add SoChip
  ARM: sunxi: dts: s3/s3l/v3: add DTSI files for S3/S3L/V3 SoCs
  dt-bindings: vendor-prefixes: add Sipeed
  dt-bindings: arm: sunxi: add binding for Lichee Zero Plus core board
  ARM: dts: sun8i: s3: add devicetree for Lichee zero plus w/ S3

 .../devicetree/bindings/arm/sunxi.yaml        |   5 +
 .../clock/allwinner,sun4i-a10-ccu.yaml        |   1 +
 .../devicetree/bindings/vendor-prefixes.yaml  |   4 +
 arch/arm/boot/dts/Makefile                    |   1 +
 .../boot/dts/sun8i-s3-lichee-zero-plus.dts    |   8 +
 .../dts/sun8i-s3-s3l-lichee-zero-plus.dtsi    |  44 ++
 arch/arm/boot/dts/sun8i-s3.dtsi               |   6 +
 arch/arm/boot/dts/sun8i-s3l.dtsi              |   6 +
 arch/arm/boot/dts/sun8i-v3.dtsi               |  14 +
 drivers/clk/sunxi-ng/ccu-sun8i-v3s.c          | 244 ++++++++-
 drivers/clk/sunxi-ng/ccu-sun8i-v3s.h          |   6 +-
 drivers/pinctrl/sunxi/pinctrl-sun8i-v3s.c     | 473 ++++++++++++++----
 drivers/pinctrl/sunxi/pinctrl-sunxi.h         |   2 +
 include/dt-bindings/clock/sun8i-v3s-ccu.h     |   4 +
 include/dt-bindings/reset/sun8i-v3s-ccu.h     |   3 +
 15 files changed, 704 insertions(+), 117 deletions(-)
 create mode 100644 arch/arm/boot/dts/sun8i-s3-lichee-zero-plus.dts
 create mode 100644 arch/arm/boot/dts/sun8i-s3-s3l-lichee-zero-plus.dtsi
 create mode 100644 arch/arm/boot/dts/sun8i-s3.dtsi
 create mode 100644 arch/arm/boot/dts/sun8i-s3l.dtsi
 create mode 100644 arch/arm/boot/dts/sun8i-v3.dtsi

-- 
2.21.0


^ permalink raw reply	[flat|nested] 57+ messages in thread

end of thread, other threads:[~2019-07-09 22:57 UTC | newest]

Thread overview: 57+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2019-06-23  4:37 [PATCH v3 0/9] Support for Allwinner V3/S3L and Sochip S3 Icenowy Zheng
2019-06-23  4:37 ` Icenowy Zheng
2019-06-23  4:37 ` Icenowy Zheng
2019-06-23  4:37 ` [PATCH v3 1/9] pinctrl: sunxi: v3s: introduce support for V3 Icenowy Zheng
2019-06-23  4:37   ` Icenowy Zheng
2019-06-23  4:37   ` Icenowy Zheng
2019-06-24 12:40   ` Maxime Ripard
2019-06-24 12:40     ` Maxime Ripard
2019-06-24 12:40     ` Maxime Ripard
2019-06-25 13:57     ` Linus Walleij
2019-06-25 13:57       ` Linus Walleij
2019-06-25 13:57       ` Linus Walleij
2019-06-25 14:10       ` Maxime Ripard
2019-06-25 14:10         ` Maxime Ripard
2019-06-25 14:10         ` Maxime Ripard
2019-06-23  4:37 ` [PATCH v3 2/9] clk: sunxi-ng: v3s: add the missing PLL_DDR1 Icenowy Zheng
2019-06-23  4:37   ` Icenowy Zheng
2019-06-23  4:37 ` [PATCH v3 3/9] dt-bindings: clk: sunxi-ccu: add compatible string for V3 CCU Icenowy Zheng
2019-06-23  4:37   ` Icenowy Zheng
2019-06-23  4:37   ` Icenowy Zheng
2019-06-23  4:37 ` [PATCH v3 4/9] clk: sunxi-ng: v3s: add Allwinner V3 support Icenowy Zheng
2019-06-23  4:37   ` Icenowy Zheng
2019-06-23  4:37   ` Icenowy Zheng
2019-07-09 22:56   ` Rob Herring
2019-07-09 22:56     ` Rob Herring
2019-06-23  4:37 ` [PATCH v3 5/9] dt-bindings: vendor-prefixes: add SoChip Icenowy Zheng
2019-06-23  4:37   ` Icenowy Zheng
2019-06-25 13:55   ` Linus Walleij
2019-06-25 13:55     ` Linus Walleij
2019-06-25 13:55     ` Linus Walleij
2019-06-25 17:39     ` Rob Herring
2019-06-25 17:39       ` Rob Herring
2019-06-25 17:39       ` Rob Herring
2019-06-23  4:37 ` [PATCH v3 6/9] ARM: sunxi: dts: s3/s3l/v3: add DTSI files for S3/S3L/V3 SoCs Icenowy Zheng
2019-06-23  4:37   ` Icenowy Zheng
2019-06-23  4:37 ` [PATCH v3 7/9] dt-bindings: vendor-prefixes: add Sipeed Icenowy Zheng
2019-06-23  4:37   ` Icenowy Zheng
2019-07-09 22:57   ` Rob Herring
2019-07-09 22:57     ` Rob Herring
2019-07-09 22:57     ` Rob Herring
2019-06-23  4:38 ` [PATCH v3 8/9] dt-bindings: arm: sunxi: add binding for Lichee Zero Plus core board Icenowy Zheng
2019-06-23  4:38   ` Icenowy Zheng
2019-06-23  4:38   ` Icenowy Zheng
2019-06-24 12:42   ` Maxime Ripard
2019-06-24 12:42     ` Maxime Ripard
2019-06-24 12:42     ` Maxime Ripard
2019-06-23  4:38 ` [PATCH v3 9/9] ARM: dts: sun8i: s3: add devicetree for Lichee zero plus w/ S3 Icenowy Zheng
2019-06-23  4:38   ` Icenowy Zheng
2019-06-24 12:43   ` Maxime Ripard
2019-06-24 12:43     ` Maxime Ripard
2019-06-24 12:43     ` Maxime Ripard
2019-06-24 13:43     ` Icenowy Zheng
2019-06-24 13:43       ` Icenowy Zheng
2019-06-24 13:43       ` Icenowy Zheng
2019-06-24 13:48       ` Maxime Ripard
2019-06-24 13:48         ` Maxime Ripard
2019-06-24 13:48         ` Maxime Ripard

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