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From: John Garry <john.garry@huawei.com>
To: Jiaxun Yang <jiaxun.yang@flygoat.com>, <linux-mips@vger.kernel.org>
Cc: <chenhc@lemote.com>, <tsbogend@alpha.franken.de>
Subject: logical PIO code for mips question (was Re: [PATCH RESEND v3 3/3] MIPS: Loongson64: Enable PCI_IO_VMMAP)
Date: Wed, 13 Jan 2021 18:02:28 +0000	[thread overview]
Message-ID: <1a21eaf7-52c0-c032-4405-1b6916628ade@huawei.com> (raw)
In-Reply-To: <20200508114438.3092215-3-jiaxun.yang@flygoat.com>

On 08/05/2020 12:44, Jiaxun Yang wrote:

Replying to an old mail ...

> range->fwnode = &of_root->fwnode;
> +	range->size = MMIO_LOWER_RESERVED;
> +	range->hw_start = LOONGSON_PCIIO_BASE;
> +	range->flags = LOGIC_PIO_CPU_MMIO;
> +
> +	if (logic_pio_register_range(range)) {
> +		pr_err("Failed to reserve PIO range for legacy ISA\n");
> +		goto free_range;
> +	}

Hi Jiaxun,

> +
> +	if (WARN(range->io_start != 0,
> +			"Reserved PIO range does not start from 0\n"))

Do the mips code still rely on this check?

I was considering changing the logical PIO code to reserve the first 64K 
of PCI MMIO space, but making that change would break this code as 
things stand.

The motivation is that some drivers, like [0], access IO ports 
unconditionally and can kill systems when no PCI host exists. By 
reserving the first 64K, accesses by those drivers could nullified.

Thanks,
John

[0] 
https://lore.kernel.org/linux-input/20210112055129.7840-1-song.bao.hua@hisilicon.com/T/#t

> +		goto unregister;
> +
> +	/*
> +	 * i8259 would access I/O space, so mapping must be done here.
> +	 * Please remove it when all drivers can be managed by logic_pio.
> +	 */
> +	ioremap_page_range(PCI_IO_START, PCI_IO_START + MMIO_LOWER_RESERVED,
> +				LOONGSON_PCIIO_BASE,
> +				pgprot_device(PAGE_KERNEL));
> +
> +	return;
> +unregister:


  reply	other threads:[~2021-01-13 18:04 UTC|newest]

Thread overview: 31+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-04-26 11:47 [PATCH 0/4] MIPS: Loongson64: Use logic_pio Jiaxun Yang
2020-04-26 11:47 ` [PATCH 1/4] MIPS: Massage address spaces headers Jiaxun Yang
2020-04-26 11:47 ` [PATCH 2/4] MIPS: Introduce PCI_IO_VMMAP Jiaxun Yang
2020-04-26 11:47 ` [PATCH 3/4] lib: logic_pio: Introduce MMIO_LOWER_RESERVED Jiaxun Yang
2020-04-27 10:43   ` John Garry
2020-04-27 11:03     ` Jiaxun Yang
2020-04-27 11:54       ` John Garry
2020-04-27 11:54         ` John Garry
2020-04-27 11:54         ` John Garry
2020-04-27 12:21         ` Jiaxun Yang
2020-04-27 12:21           ` Jiaxun Yang
2020-04-27 12:21           ` Jiaxun Yang
2020-04-26 11:47 ` [PATCH 4/4] MIPS: Loongson64: Enable PCI_IO_VMMAP Jiaxun Yang
2020-04-30  0:57 ` [PATCH v3 1/3] MIPS: Move VMALLOC_START into spaces.h Jiaxun Yang
2020-04-30  0:57   ` [PATCH v3 2/3] MIPS: Introduce PCI_IO_VMMAP Jiaxun Yang
2020-04-30  0:57   ` [PATCH v3 3/3] MIPS: Loongson64: Enable PCI_IO_VMMAP Jiaxun Yang
2020-05-08 11:44 ` [PATCH RESEND v3 1/3] MIPS: Move VMALLOC_START into spaces.h Jiaxun Yang
2020-05-08 11:44   ` [PATCH RESEND v3 2/3] MIPS: Introduce PCI_IO_VMMAP Jiaxun Yang
2020-05-08 16:11     ` Thomas Bogendoerfer
2020-05-08 16:22       ` Jiaxun Yang
2020-05-08 16:52         ` Thomas Bogendoerfer
2020-05-08 17:09           ` Jiaxun Yang
2020-05-14 14:21             ` Thomas Bogendoerfer
2020-05-14 14:56               ` Jiaxun Yang
2020-05-14 13:20     ` Jiaxun Yang
2020-05-08 11:44   ` [PATCH RESEND v3 3/3] MIPS: Loongson64: Enable PCI_IO_VMMAP Jiaxun Yang
2021-01-13 18:02     ` John Garry [this message]
2021-01-14  0:13       ` logical PIO code for mips question (was Re: [PATCH RESEND v3 3/3] MIPS: Loongson64: Enable PCI_IO_VMMAP) Jiaxun Yang
2021-01-14  9:18         ` John Garry
2021-01-14 11:10           ` Jiaxun Yang
2021-01-14 11:20             ` John Garry

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