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* [PATCH v4 0/5]  Add support for the PolarFire SoC system controller
@ 2021-03-11 11:34 ` conor.dooley
  0 siblings, 0 replies; 10+ messages in thread
From: conor.dooley @ 2021-03-11 11:34 UTC (permalink / raw)
  To: robh+dt, damien.lemoal, jassisinghbrar, aou, paul.walmsley,
	palmer, devicetree, linux-riscv, j.neuschaefer
  Cc: lewis.hanly, cyril.jean, daire.mcnamara, atish.patra, anup.patel,
	david.abdurachmanov, Conor Dooley

From: Conor Dooley <conor.dooley@microchip.com>

This patch series adds support for the system controller on
the PolarFire SoC, using the mailbox framework. A Microchip directory
in the SoC subsystem has been created to hold the mailbox client
driver and will be used for future service drivers.

These drivers are gated by the kconfig option:
CONFIG_SOC_MICROCHIP_POLARFIRE, so this patch series depends on Atish
Patra's PolarFire SoC support patches which introduce it.

It further depends on the MAINTAINERS entry created in the same series.

Changes from v3:
* Fixed mboxes reference in dt binding for mailbox client
* Bug fixes and cleanup from Jonathan Neuschäfer's feedback on 
  mailbox-mpfs.c & mpfs-sys-controller.c
* Renamed dt binding files to match compatible strings
* Removed PFSoC gating condition on drivers/soc/microchip subdirectory
* Converted all size based operations to bytes for consistency
* Converted response array to a structure, enabling support for more
  complex services that return a status instead of/alongside a payload.

Changes from v2:
* Further reworked dt bindings to satisfy errors and feedback
  (hopefully phandle array is the correct type for the mboxes)
* Full maintainers entry moved to Atish's PFSoC support series, this series now only adds mailbox driver
* Converted config options from MPFS to POLARFIRE_SOC so they are more recognisable
* Further simplified driver code from feedback

Changes from v1:
* Squashed header into first patch
* Fixed DT binding warnings & small fixes
* Cleaned up drivers from feedback

Conor Dooley (5):
  mbox: add polarfire soc system controller mailbox
  dt-bindings: add bindings for polarfire soc mailbox
  soc: add polarfire soc system controller
  dt-bindings: add bindings for polarfire soc system controller
  MAINTAINERS: add entry for polarfire soc mailbox driver

 .../microchip,polarfire-soc-mailbox.yaml      |  47 +++
 ...icrochip,polarfire-soc-sys-controller.yaml |  36 +++
 MAINTAINERS                                   |   1 +
 drivers/mailbox/Kconfig                       |  12 +
 drivers/mailbox/Makefile                      |   2 +
 drivers/mailbox/mailbox-mpfs.c                | 277 ++++++++++++++++++
 drivers/soc/Kconfig                           |   1 +
 drivers/soc/Makefile                          |   1 +
 drivers/soc/microchip/Kconfig                 |  10 +
 drivers/soc/microchip/Makefile                |   1 +
 drivers/soc/microchip/mpfs-sys-controller.c   | 127 ++++++++
 include/soc/microchip/mpfs.h                  |  57 ++++
 12 files changed, 572 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/mailbox/microchip,polarfire-soc-mailbox.yaml
 create mode 100644 Documentation/devicetree/bindings/soc/microchip/microchip,polarfire-soc-sys-controller.yaml
 create mode 100644 drivers/mailbox/mailbox-mpfs.c
 create mode 100644 drivers/soc/microchip/Kconfig
 create mode 100644 drivers/soc/microchip/Makefile
 create mode 100644 drivers/soc/microchip/mpfs-sys-controller.c
 create mode 100644 include/soc/microchip/mpfs.h

-- 
2.17.1


^ permalink raw reply	[flat|nested] 10+ messages in thread

* [PATCH v4 0/5]  Add support for the PolarFire SoC system controller
@ 2021-03-11 11:34 ` conor.dooley
  0 siblings, 0 replies; 10+ messages in thread
From: conor.dooley @ 2021-03-11 11:34 UTC (permalink / raw)
  To: robh+dt, damien.lemoal, jassisinghbrar, aou, paul.walmsley,
	palmer, devicetree, linux-riscv, j.neuschaefer
  Cc: lewis.hanly, cyril.jean, daire.mcnamara, atish.patra, anup.patel,
	david.abdurachmanov, Conor Dooley

From: Conor Dooley <conor.dooley@microchip.com>

This patch series adds support for the system controller on
the PolarFire SoC, using the mailbox framework. A Microchip directory
in the SoC subsystem has been created to hold the mailbox client
driver and will be used for future service drivers.

These drivers are gated by the kconfig option:
CONFIG_SOC_MICROCHIP_POLARFIRE, so this patch series depends on Atish
Patra's PolarFire SoC support patches which introduce it.

It further depends on the MAINTAINERS entry created in the same series.

Changes from v3:
* Fixed mboxes reference in dt binding for mailbox client
* Bug fixes and cleanup from Jonathan Neuschäfer's feedback on 
  mailbox-mpfs.c & mpfs-sys-controller.c
* Renamed dt binding files to match compatible strings
* Removed PFSoC gating condition on drivers/soc/microchip subdirectory
* Converted all size based operations to bytes for consistency
* Converted response array to a structure, enabling support for more
  complex services that return a status instead of/alongside a payload.

Changes from v2:
* Further reworked dt bindings to satisfy errors and feedback
  (hopefully phandle array is the correct type for the mboxes)
* Full maintainers entry moved to Atish's PFSoC support series, this series now only adds mailbox driver
* Converted config options from MPFS to POLARFIRE_SOC so they are more recognisable
* Further simplified driver code from feedback

Changes from v1:
* Squashed header into first patch
* Fixed DT binding warnings & small fixes
* Cleaned up drivers from feedback

Conor Dooley (5):
  mbox: add polarfire soc system controller mailbox
  dt-bindings: add bindings for polarfire soc mailbox
  soc: add polarfire soc system controller
  dt-bindings: add bindings for polarfire soc system controller
  MAINTAINERS: add entry for polarfire soc mailbox driver

 .../microchip,polarfire-soc-mailbox.yaml      |  47 +++
 ...icrochip,polarfire-soc-sys-controller.yaml |  36 +++
 MAINTAINERS                                   |   1 +
 drivers/mailbox/Kconfig                       |  12 +
 drivers/mailbox/Makefile                      |   2 +
 drivers/mailbox/mailbox-mpfs.c                | 277 ++++++++++++++++++
 drivers/soc/Kconfig                           |   1 +
 drivers/soc/Makefile                          |   1 +
 drivers/soc/microchip/Kconfig                 |  10 +
 drivers/soc/microchip/Makefile                |   1 +
 drivers/soc/microchip/mpfs-sys-controller.c   | 127 ++++++++
 include/soc/microchip/mpfs.h                  |  57 ++++
 12 files changed, 572 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/mailbox/microchip,polarfire-soc-mailbox.yaml
 create mode 100644 Documentation/devicetree/bindings/soc/microchip/microchip,polarfire-soc-sys-controller.yaml
 create mode 100644 drivers/mailbox/mailbox-mpfs.c
 create mode 100644 drivers/soc/microchip/Kconfig
 create mode 100644 drivers/soc/microchip/Makefile
 create mode 100644 drivers/soc/microchip/mpfs-sys-controller.c
 create mode 100644 include/soc/microchip/mpfs.h

-- 
2.17.1


_______________________________________________
linux-riscv mailing list
linux-riscv@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-riscv

^ permalink raw reply	[flat|nested] 10+ messages in thread

* Re: [PATCH v4 0/5]  Add support for the PolarFire SoC system controller
  2021-03-11 11:34 ` conor.dooley
@ 2021-03-30  4:17   ` Palmer Dabbelt
  -1 siblings, 0 replies; 10+ messages in thread
From: Palmer Dabbelt @ 2021-03-30  4:17 UTC (permalink / raw)
  To: conor.dooley
  Cc: robh+dt, Damien Le Moal, jassisinghbrar, aou, Paul Walmsley,
	devicetree, linux-riscv, j.neuschaefer, lewis.hanly, cyril.jean,
	daire.mcnamara, Atish Patra, Anup Patel, david.abdurachmanov,
	conor.dooley

On Thu, 11 Mar 2021 03:34:31 PST (-0800), conor.dooley@microchip.com wrote:
> From: Conor Dooley <conor.dooley@microchip.com>
>
> This patch series adds support for the system controller on
> the PolarFire SoC, using the mailbox framework. A Microchip directory
> in the SoC subsystem has been created to hold the mailbox client
> driver and will be used for future service drivers.
>
> These drivers are gated by the kconfig option:
> CONFIG_SOC_MICROCHIP_POLARFIRE, so this patch series depends on Atish
> Patra's PolarFire SoC support patches which introduce it.
>
> It further depends on the MAINTAINERS entry created in the same series.
>
> Changes from v3:
> * Fixed mboxes reference in dt binding for mailbox client
> * Bug fixes and cleanup from Jonathan Neuschäfer's feedback on
>   mailbox-mpfs.c & mpfs-sys-controller.c
> * Renamed dt binding files to match compatible strings
> * Removed PFSoC gating condition on drivers/soc/microchip subdirectory
> * Converted all size based operations to bytes for consistency
> * Converted response array to a structure, enabling support for more
>   complex services that return a status instead of/alongside a payload.
>
> Changes from v2:
> * Further reworked dt bindings to satisfy errors and feedback
>   (hopefully phandle array is the correct type for the mboxes)
> * Full maintainers entry moved to Atish's PFSoC support series, this series now only adds mailbox driver
> * Converted config options from MPFS to POLARFIRE_SOC so they are more recognisable
> * Further simplified driver code from feedback
>
> Changes from v1:
> * Squashed header into first patch
> * Fixed DT binding warnings & small fixes
> * Cleaned up drivers from feedback
>
> Conor Dooley (5):
>   mbox: add polarfire soc system controller mailbox
>   dt-bindings: add bindings for polarfire soc mailbox
>   soc: add polarfire soc system controller
>   dt-bindings: add bindings for polarfire soc system controller
>   MAINTAINERS: add entry for polarfire soc mailbox driver
>
>  .../microchip,polarfire-soc-mailbox.yaml      |  47 +++
>  ...icrochip,polarfire-soc-sys-controller.yaml |  36 +++
>  MAINTAINERS                                   |   1 +
>  drivers/mailbox/Kconfig                       |  12 +
>  drivers/mailbox/Makefile                      |   2 +
>  drivers/mailbox/mailbox-mpfs.c                | 277 ++++++++++++++++++
>  drivers/soc/Kconfig                           |   1 +
>  drivers/soc/Makefile                          |   1 +
>  drivers/soc/microchip/Kconfig                 |  10 +
>  drivers/soc/microchip/Makefile                |   1 +
>  drivers/soc/microchip/mpfs-sys-controller.c   | 127 ++++++++
>  include/soc/microchip/mpfs.h                  |  57 ++++
>  12 files changed, 572 insertions(+)
>  create mode 100644 Documentation/devicetree/bindings/mailbox/microchip,polarfire-soc-mailbox.yaml
>  create mode 100644 Documentation/devicetree/bindings/soc/microchip/microchip,polarfire-soc-sys-controller.yaml
>  create mode 100644 drivers/mailbox/mailbox-mpfs.c
>  create mode 100644 drivers/soc/microchip/Kconfig
>  create mode 100644 drivers/soc/microchip/Makefile
>  create mode 100644 drivers/soc/microchip/mpfs-sys-controller.c
>  create mode 100644 include/soc/microchip/mpfs.h

The only problem I see here is that patch #3 (the driver for the system
controller) comes before patch #4 (the DT bindings for that driver).  That
triggers a checkpatch warning.  I can just reorder it, but it would be great to
have some reviews from the DT and mailbox people.  If not I'll try and find
some time to take a closer look.

^ permalink raw reply	[flat|nested] 10+ messages in thread

* Re: [PATCH v4 0/5] Add support for the PolarFire SoC system controller
@ 2021-03-30  4:17   ` Palmer Dabbelt
  0 siblings, 0 replies; 10+ messages in thread
From: Palmer Dabbelt @ 2021-03-30  4:17 UTC (permalink / raw)
  To: conor.dooley
  Cc: robh+dt, Damien Le Moal, jassisinghbrar, aou, Paul Walmsley,
	devicetree, linux-riscv, j.neuschaefer, lewis.hanly, cyril.jean,
	daire.mcnamara, Atish Patra, Anup Patel, david.abdurachmanov,
	conor.dooley

On Thu, 11 Mar 2021 03:34:31 PST (-0800), conor.dooley@microchip.com wrote:
> From: Conor Dooley <conor.dooley@microchip.com>
>
> This patch series adds support for the system controller on
> the PolarFire SoC, using the mailbox framework. A Microchip directory
> in the SoC subsystem has been created to hold the mailbox client
> driver and will be used for future service drivers.
>
> These drivers are gated by the kconfig option:
> CONFIG_SOC_MICROCHIP_POLARFIRE, so this patch series depends on Atish
> Patra's PolarFire SoC support patches which introduce it.
>
> It further depends on the MAINTAINERS entry created in the same series.
>
> Changes from v3:
> * Fixed mboxes reference in dt binding for mailbox client
> * Bug fixes and cleanup from Jonathan Neuschäfer's feedback on
>   mailbox-mpfs.c & mpfs-sys-controller.c
> * Renamed dt binding files to match compatible strings
> * Removed PFSoC gating condition on drivers/soc/microchip subdirectory
> * Converted all size based operations to bytes for consistency
> * Converted response array to a structure, enabling support for more
>   complex services that return a status instead of/alongside a payload.
>
> Changes from v2:
> * Further reworked dt bindings to satisfy errors and feedback
>   (hopefully phandle array is the correct type for the mboxes)
> * Full maintainers entry moved to Atish's PFSoC support series, this series now only adds mailbox driver
> * Converted config options from MPFS to POLARFIRE_SOC so they are more recognisable
> * Further simplified driver code from feedback
>
> Changes from v1:
> * Squashed header into first patch
> * Fixed DT binding warnings & small fixes
> * Cleaned up drivers from feedback
>
> Conor Dooley (5):
>   mbox: add polarfire soc system controller mailbox
>   dt-bindings: add bindings for polarfire soc mailbox
>   soc: add polarfire soc system controller
>   dt-bindings: add bindings for polarfire soc system controller
>   MAINTAINERS: add entry for polarfire soc mailbox driver
>
>  .../microchip,polarfire-soc-mailbox.yaml      |  47 +++
>  ...icrochip,polarfire-soc-sys-controller.yaml |  36 +++
>  MAINTAINERS                                   |   1 +
>  drivers/mailbox/Kconfig                       |  12 +
>  drivers/mailbox/Makefile                      |   2 +
>  drivers/mailbox/mailbox-mpfs.c                | 277 ++++++++++++++++++
>  drivers/soc/Kconfig                           |   1 +
>  drivers/soc/Makefile                          |   1 +
>  drivers/soc/microchip/Kconfig                 |  10 +
>  drivers/soc/microchip/Makefile                |   1 +
>  drivers/soc/microchip/mpfs-sys-controller.c   | 127 ++++++++
>  include/soc/microchip/mpfs.h                  |  57 ++++
>  12 files changed, 572 insertions(+)
>  create mode 100644 Documentation/devicetree/bindings/mailbox/microchip,polarfire-soc-mailbox.yaml
>  create mode 100644 Documentation/devicetree/bindings/soc/microchip/microchip,polarfire-soc-sys-controller.yaml
>  create mode 100644 drivers/mailbox/mailbox-mpfs.c
>  create mode 100644 drivers/soc/microchip/Kconfig
>  create mode 100644 drivers/soc/microchip/Makefile
>  create mode 100644 drivers/soc/microchip/mpfs-sys-controller.c
>  create mode 100644 include/soc/microchip/mpfs.h

The only problem I see here is that patch #3 (the driver for the system
controller) comes before patch #4 (the DT bindings for that driver).  That
triggers a checkpatch warning.  I can just reorder it, but it would be great to
have some reviews from the DT and mailbox people.  If not I'll try and find
some time to take a closer look.

_______________________________________________
linux-riscv mailing list
linux-riscv@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-riscv

^ permalink raw reply	[flat|nested] 10+ messages in thread

* Re: [PATCH v4 0/5] Add support for the PolarFire SoC system controller
  2021-03-30  4:17   ` Palmer Dabbelt
@ 2021-03-30 11:06     ` Conor.Dooley
  -1 siblings, 0 replies; 10+ messages in thread
From: Conor.Dooley @ 2021-03-30 11:06 UTC (permalink / raw)
  To: palmer
  Cc: robh+dt, Damien.LeMoal, jassisinghbrar, aou, paul.walmsley,
	devicetree, linux-riscv, j.neuschaefer, Lewis.Hanly, Cyril.Jean,
	Daire.McNamara, Atish.Patra, Anup.Patel, david.abdurachmanov

On 30/03/2021 05:17, Palmer Dabbelt wrote:
> EXTERNAL EMAIL: Do not click links or open attachments unless you know 
> the content is safe
>
> On Thu, 11 Mar 2021 03:34:31 PST (-0800), conor.dooley@microchip.com 
> wrote:
>> From: Conor Dooley <conor.dooley@microchip.com>
>>
>> This patch series adds support for the system controller on
>> the PolarFire SoC, using the mailbox framework. A Microchip directory
>> in the SoC subsystem has been created to hold the mailbox client
>> driver and will be used for future service drivers.
>>
>> These drivers are gated by the kconfig option:
>> CONFIG_SOC_MICROCHIP_POLARFIRE, so this patch series depends on Atish
>> Patra's PolarFire SoC support patches which introduce it.
>>
>> It further depends on the MAINTAINERS entry created in the same series.
>>
>> Changes from v3:
>> * Fixed mboxes reference in dt binding for mailbox client
>> * Bug fixes and cleanup from Jonathan Neuschäfer's feedback on
>>   mailbox-mpfs.c & mpfs-sys-controller.c
>> * Renamed dt binding files to match compatible strings
>> * Removed PFSoC gating condition on drivers/soc/microchip subdirectory
>> * Converted all size based operations to bytes for consistency
>> * Converted response array to a structure, enabling support for more
>>   complex services that return a status instead of/alongside a payload.
>>
>> Changes from v2:
>> * Further reworked dt bindings to satisfy errors and feedback
>>   (hopefully phandle array is the correct type for the mboxes)
>> * Full maintainers entry moved to Atish's PFSoC support series, this 
>> series now only adds mailbox driver
>> * Converted config options from MPFS to POLARFIRE_SOC so they are 
>> more recognisable
>> * Further simplified driver code from feedback
>>
>> Changes from v1:
>> * Squashed header into first patch
>> * Fixed DT binding warnings & small fixes
>> * Cleaned up drivers from feedback
>>
>> Conor Dooley (5):
>>   mbox: add polarfire soc system controller mailbox
>>   dt-bindings: add bindings for polarfire soc mailbox
>>   soc: add polarfire soc system controller
>>   dt-bindings: add bindings for polarfire soc system controller
>>   MAINTAINERS: add entry for polarfire soc mailbox driver
>>
>>  .../microchip,polarfire-soc-mailbox.yaml      |  47 +++
>>  ...icrochip,polarfire-soc-sys-controller.yaml |  36 +++
>>  MAINTAINERS                                   |   1 +
>>  drivers/mailbox/Kconfig                       |  12 +
>>  drivers/mailbox/Makefile                      |   2 +
>>  drivers/mailbox/mailbox-mpfs.c                | 277 ++++++++++++++++++
>>  drivers/soc/Kconfig                           |   1 +
>>  drivers/soc/Makefile                          |   1 +
>>  drivers/soc/microchip/Kconfig                 |  10 +
>>  drivers/soc/microchip/Makefile                |   1 +
>>  drivers/soc/microchip/mpfs-sys-controller.c   | 127 ++++++++
>>  include/soc/microchip/mpfs.h                  |  57 ++++
>>  12 files changed, 572 insertions(+)
>>  create mode 100644 
>> Documentation/devicetree/bindings/mailbox/microchip,polarfire-soc-mailbox.yaml
>>  create mode 100644 
>> Documentation/devicetree/bindings/soc/microchip/microchip,polarfire-soc-sys-controller.yaml
>>  create mode 100644 drivers/mailbox/mailbox-mpfs.c
>>  create mode 100644 drivers/soc/microchip/Kconfig
>>  create mode 100644 drivers/soc/microchip/Makefile
>>  create mode 100644 drivers/soc/microchip/mpfs-sys-controller.c
>>  create mode 100644 include/soc/microchip/mpfs.h
>
> The only problem I see here is that patch #3 (the driver for the system
> controller) comes before patch #4 (the DT bindings for that driver).  
> That
> triggers a checkpatch warning.  I can just reorder it, but it would be 
> great to
> have some reviews from the DT and mailbox people.  If not I'll try and 
> find
> some time to take a closer look.

I've had a fair bit of back and forth with Rob about the dt bindings, 
hopefully this version he happy with - think all of his concerns have 
now been addressed. Haven't heard anything from Jassi Brar on the device 
tree side however


^ permalink raw reply	[flat|nested] 10+ messages in thread

* Re: [PATCH v4 0/5] Add support for the PolarFire SoC system controller
@ 2021-03-30 11:06     ` Conor.Dooley
  0 siblings, 0 replies; 10+ messages in thread
From: Conor.Dooley @ 2021-03-30 11:06 UTC (permalink / raw)
  To: palmer
  Cc: robh+dt, Damien.LeMoal, jassisinghbrar, aou, paul.walmsley,
	devicetree, linux-riscv, j.neuschaefer, Lewis.Hanly, Cyril.Jean,
	Daire.McNamara, Atish.Patra, Anup.Patel, david.abdurachmanov

On 30/03/2021 05:17, Palmer Dabbelt wrote:
> EXTERNAL EMAIL: Do not click links or open attachments unless you know 
> the content is safe
>
> On Thu, 11 Mar 2021 03:34:31 PST (-0800), conor.dooley@microchip.com 
> wrote:
>> From: Conor Dooley <conor.dooley@microchip.com>
>>
>> This patch series adds support for the system controller on
>> the PolarFire SoC, using the mailbox framework. A Microchip directory
>> in the SoC subsystem has been created to hold the mailbox client
>> driver and will be used for future service drivers.
>>
>> These drivers are gated by the kconfig option:
>> CONFIG_SOC_MICROCHIP_POLARFIRE, so this patch series depends on Atish
>> Patra's PolarFire SoC support patches which introduce it.
>>
>> It further depends on the MAINTAINERS entry created in the same series.
>>
>> Changes from v3:
>> * Fixed mboxes reference in dt binding for mailbox client
>> * Bug fixes and cleanup from Jonathan Neuschäfer's feedback on
>>   mailbox-mpfs.c & mpfs-sys-controller.c
>> * Renamed dt binding files to match compatible strings
>> * Removed PFSoC gating condition on drivers/soc/microchip subdirectory
>> * Converted all size based operations to bytes for consistency
>> * Converted response array to a structure, enabling support for more
>>   complex services that return a status instead of/alongside a payload.
>>
>> Changes from v2:
>> * Further reworked dt bindings to satisfy errors and feedback
>>   (hopefully phandle array is the correct type for the mboxes)
>> * Full maintainers entry moved to Atish's PFSoC support series, this 
>> series now only adds mailbox driver
>> * Converted config options from MPFS to POLARFIRE_SOC so they are 
>> more recognisable
>> * Further simplified driver code from feedback
>>
>> Changes from v1:
>> * Squashed header into first patch
>> * Fixed DT binding warnings & small fixes
>> * Cleaned up drivers from feedback
>>
>> Conor Dooley (5):
>>   mbox: add polarfire soc system controller mailbox
>>   dt-bindings: add bindings for polarfire soc mailbox
>>   soc: add polarfire soc system controller
>>   dt-bindings: add bindings for polarfire soc system controller
>>   MAINTAINERS: add entry for polarfire soc mailbox driver
>>
>>  .../microchip,polarfire-soc-mailbox.yaml      |  47 +++
>>  ...icrochip,polarfire-soc-sys-controller.yaml |  36 +++
>>  MAINTAINERS                                   |   1 +
>>  drivers/mailbox/Kconfig                       |  12 +
>>  drivers/mailbox/Makefile                      |   2 +
>>  drivers/mailbox/mailbox-mpfs.c                | 277 ++++++++++++++++++
>>  drivers/soc/Kconfig                           |   1 +
>>  drivers/soc/Makefile                          |   1 +
>>  drivers/soc/microchip/Kconfig                 |  10 +
>>  drivers/soc/microchip/Makefile                |   1 +
>>  drivers/soc/microchip/mpfs-sys-controller.c   | 127 ++++++++
>>  include/soc/microchip/mpfs.h                  |  57 ++++
>>  12 files changed, 572 insertions(+)
>>  create mode 100644 
>> Documentation/devicetree/bindings/mailbox/microchip,polarfire-soc-mailbox.yaml
>>  create mode 100644 
>> Documentation/devicetree/bindings/soc/microchip/microchip,polarfire-soc-sys-controller.yaml
>>  create mode 100644 drivers/mailbox/mailbox-mpfs.c
>>  create mode 100644 drivers/soc/microchip/Kconfig
>>  create mode 100644 drivers/soc/microchip/Makefile
>>  create mode 100644 drivers/soc/microchip/mpfs-sys-controller.c
>>  create mode 100644 include/soc/microchip/mpfs.h
>
> The only problem I see here is that patch #3 (the driver for the system
> controller) comes before patch #4 (the DT bindings for that driver).  
> That
> triggers a checkpatch warning.  I can just reorder it, but it would be 
> great to
> have some reviews from the DT and mailbox people.  If not I'll try and 
> find
> some time to take a closer look.

I've had a fair bit of back and forth with Rob about the dt bindings, 
hopefully this version he happy with - think all of his concerns have 
now been addressed. Haven't heard anything from Jassi Brar on the device 
tree side however

_______________________________________________
linux-riscv mailing list
linux-riscv@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-riscv

^ permalink raw reply	[flat|nested] 10+ messages in thread

* Re: [PATCH v4 0/5] Add support for the PolarFire SoC system controller
  2021-03-30 11:06     ` Conor.Dooley
@ 2021-03-30 23:54       ` Jassi Brar
  -1 siblings, 0 replies; 10+ messages in thread
From: Jassi Brar @ 2021-03-30 23:54 UTC (permalink / raw)
  To: Conor.Dooley
  Cc: palmer, Rob Herring, Damien.LeMoal, aou, paul.walmsley,
	Devicetree List, linux-riscv, j.neuschaefer, Lewis.Hanly,
	Cyril.Jean, Daire.McNamara, Atish.Patra, Anup.Patel,
	david.abdurachmanov

On Tue, Mar 30, 2021 at 6:06 AM <Conor.Dooley@microchip.com> wrote:

> >>  create mode 100644
> >> Documentation/devicetree/bindings/soc/microchip/microchip,polarfire-soc-sys-controller.yaml
> >>  create mode 100644 drivers/mailbox/mailbox-mpfs.c
> >>  create mode 100644 drivers/soc/microchip/Kconfig
> >>  create mode 100644 drivers/soc/microchip/Makefile
> >>  create mode 100644 drivers/soc/microchip/mpfs-sys-controller.c
> >>  create mode 100644 include/soc/microchip/mpfs.h
> >
> > The only problem I see here is that patch #3 (the driver for the system
> > controller) comes before patch #4 (the DT bindings for that driver).
> > That
> > triggers a checkpatch warning.  I can just reorder it, but it would be
> > great to
> > have some reviews from the DT and mailbox people.  If not I'll try and
> > find
> > some time to take a closer look.
>
> I've had a fair bit of back and forth with Rob about the dt bindings,
> hopefully this version he happy with - think all of his concerns have
> now been addressed. Haven't heard anything from Jassi Brar on the device
> tree side however
>
Nowhere is explained how the controller works, and the bindings seem
trivial, so I have no concern.

-j

^ permalink raw reply	[flat|nested] 10+ messages in thread

* Re: [PATCH v4 0/5] Add support for the PolarFire SoC system controller
@ 2021-03-30 23:54       ` Jassi Brar
  0 siblings, 0 replies; 10+ messages in thread
From: Jassi Brar @ 2021-03-30 23:54 UTC (permalink / raw)
  To: Conor.Dooley
  Cc: palmer, Rob Herring, Damien.LeMoal, aou, paul.walmsley,
	Devicetree List, linux-riscv, j.neuschaefer, Lewis.Hanly,
	Cyril.Jean, Daire.McNamara, Atish.Patra, Anup.Patel,
	david.abdurachmanov

On Tue, Mar 30, 2021 at 6:06 AM <Conor.Dooley@microchip.com> wrote:

> >>  create mode 100644
> >> Documentation/devicetree/bindings/soc/microchip/microchip,polarfire-soc-sys-controller.yaml
> >>  create mode 100644 drivers/mailbox/mailbox-mpfs.c
> >>  create mode 100644 drivers/soc/microchip/Kconfig
> >>  create mode 100644 drivers/soc/microchip/Makefile
> >>  create mode 100644 drivers/soc/microchip/mpfs-sys-controller.c
> >>  create mode 100644 include/soc/microchip/mpfs.h
> >
> > The only problem I see here is that patch #3 (the driver for the system
> > controller) comes before patch #4 (the DT bindings for that driver).
> > That
> > triggers a checkpatch warning.  I can just reorder it, but it would be
> > great to
> > have some reviews from the DT and mailbox people.  If not I'll try and
> > find
> > some time to take a closer look.
>
> I've had a fair bit of back and forth with Rob about the dt bindings,
> hopefully this version he happy with - think all of his concerns have
> now been addressed. Haven't heard anything from Jassi Brar on the device
> tree side however
>
Nowhere is explained how the controller works, and the bindings seem
trivial, so I have no concern.

-j

_______________________________________________
linux-riscv mailing list
linux-riscv@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-riscv

^ permalink raw reply	[flat|nested] 10+ messages in thread

* Re: [PATCH v4 0/5] Add support for the PolarFire SoC system controller
  2021-03-30 23:54       ` Jassi Brar
@ 2021-04-02 12:08         ` Conor.Dooley
  -1 siblings, 0 replies; 10+ messages in thread
From: Conor.Dooley @ 2021-04-02 12:08 UTC (permalink / raw)
  To: jassisinghbrar
  Cc: palmer, robh+dt, Damien.LeMoal, aou, paul.walmsley, devicetree,
	linux-riscv, j.neuschaefer, Lewis.Hanly, Cyril.Jean,
	Daire.McNamara, Atish.Patra, Anup.Patel, david.abdurachmanov

On 31/03/2021 00:54, Jassi Brar wrote:
> EXTERNAL EMAIL: Do not click links or open attachments unless you know the content is safe
>
> On Tue, Mar 30, 2021 at 6:06 AM <Conor.Dooley@microchip.com> wrote:
>
>>>>   create mode 100644
>>>> Documentation/devicetree/bindings/soc/microchip/microchip,polarfire-soc-sys-controller.yaml
>>>>   create mode 100644 drivers/mailbox/mailbox-mpfs.c
>>>>   create mode 100644 drivers/soc/microchip/Kconfig
>>>>   create mode 100644 drivers/soc/microchip/Makefile
>>>>   create mode 100644 drivers/soc/microchip/mpfs-sys-controller.c
>>>>   create mode 100644 include/soc/microchip/mpfs.h
>>> The only problem I see here is that patch #3 (the driver for the system
>>> controller) comes before patch #4 (the DT bindings for that driver).
>>> That
>>> triggers a checkpatch warning.  I can just reorder it, but it would be
>>> great to
>>> have some reviews from the DT and mailbox people.  If not I'll try and
>>> find
>>> some time to take a closer look.
>> I've had a fair bit of back and forth with Rob about the dt bindings,
>> hopefully this version he happy with - think all of his concerns have
>> now been addressed. Haven't heard anything from Jassi Brar on the device
>> tree side however

 >this version

this should read "the next version" not "this version"

> Nowhere is explained how the controller works, and the bindings seem
> trivial, so I have no concern.
>
> -j
We have documentation for the services provided by the system controller 
here, and I'll provide this link with the cover letter when I submit v5 
(direct download link to a pdf):
https://www.microsemi.com/document-portal/doc_download/1244853-ug0905-polarfire-soc-fpga-system-services-user-guide

Several of the services have drivers completed/in progress, but I have 
been holding off on submitting them until this series was accepted since 
they belong in a bunch of different subsystems.

Conor.



^ permalink raw reply	[flat|nested] 10+ messages in thread

* Re: [PATCH v4 0/5] Add support for the PolarFire SoC system controller
@ 2021-04-02 12:08         ` Conor.Dooley
  0 siblings, 0 replies; 10+ messages in thread
From: Conor.Dooley @ 2021-04-02 12:08 UTC (permalink / raw)
  To: jassisinghbrar
  Cc: palmer, robh+dt, Damien.LeMoal, aou, paul.walmsley, devicetree,
	linux-riscv, j.neuschaefer, Lewis.Hanly, Cyril.Jean,
	Daire.McNamara, Atish.Patra, Anup.Patel, david.abdurachmanov

On 31/03/2021 00:54, Jassi Brar wrote:
> EXTERNAL EMAIL: Do not click links or open attachments unless you know the content is safe
>
> On Tue, Mar 30, 2021 at 6:06 AM <Conor.Dooley@microchip.com> wrote:
>
>>>>   create mode 100644
>>>> Documentation/devicetree/bindings/soc/microchip/microchip,polarfire-soc-sys-controller.yaml
>>>>   create mode 100644 drivers/mailbox/mailbox-mpfs.c
>>>>   create mode 100644 drivers/soc/microchip/Kconfig
>>>>   create mode 100644 drivers/soc/microchip/Makefile
>>>>   create mode 100644 drivers/soc/microchip/mpfs-sys-controller.c
>>>>   create mode 100644 include/soc/microchip/mpfs.h
>>> The only problem I see here is that patch #3 (the driver for the system
>>> controller) comes before patch #4 (the DT bindings for that driver).
>>> That
>>> triggers a checkpatch warning.  I can just reorder it, but it would be
>>> great to
>>> have some reviews from the DT and mailbox people.  If not I'll try and
>>> find
>>> some time to take a closer look.
>> I've had a fair bit of back and forth with Rob about the dt bindings,
>> hopefully this version he happy with - think all of his concerns have
>> now been addressed. Haven't heard anything from Jassi Brar on the device
>> tree side however

 >this version

this should read "the next version" not "this version"

> Nowhere is explained how the controller works, and the bindings seem
> trivial, so I have no concern.
>
> -j
We have documentation for the services provided by the system controller 
here, and I'll provide this link with the cover letter when I submit v5 
(direct download link to a pdf):
https://www.microsemi.com/document-portal/doc_download/1244853-ug0905-polarfire-soc-fpga-system-services-user-guide

Several of the services have drivers completed/in progress, but I have 
been holding off on submitting them until this series was accepted since 
they belong in a bunch of different subsystems.

Conor.


_______________________________________________
linux-riscv mailing list
linux-riscv@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-riscv

^ permalink raw reply	[flat|nested] 10+ messages in thread

end of thread, other threads:[~2021-04-02 12:09 UTC | newest]

Thread overview: 10+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2021-03-11 11:34 [PATCH v4 0/5] Add support for the PolarFire SoC system controller conor.dooley
2021-03-11 11:34 ` conor.dooley
2021-03-30  4:17 ` Palmer Dabbelt
2021-03-30  4:17   ` Palmer Dabbelt
2021-03-30 11:06   ` Conor.Dooley
2021-03-30 11:06     ` Conor.Dooley
2021-03-30 23:54     ` Jassi Brar
2021-03-30 23:54       ` Jassi Brar
2021-04-02 12:08       ` Conor.Dooley
2021-04-02 12:08         ` Conor.Dooley

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