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From: Shijith Thotton <sthotton@marvell.com>
To: <dev@dpdk.org>
Cc: Shijith Thotton <sthotton@marvell.com>, <jerinj@marvell.com>,
	<ndabilpuram@marvell.com>, <anoobj@marvell.com>,
	<pbhagavatula@marvell.com>, <gakhil@marvell.com>
Subject: [dpdk-dev] [PATCH 2/8] event/cnxk: add macro to set eventdev ops
Date: Mon, 30 Aug 2021 16:39:11 +0530	[thread overview]
Message-ID: <1b62006fb7c00c33a561bc4f091b1d2f060afd23.1630315730.git.sthotton@marvell.com> (raw)
In-Reply-To: <cover.1630315730.git.sthotton@marvell.com>

Added a common macro to set eventdev enqueue and dequeue operations to
reduce code.

Signed-off-by: Shijith Thotton <sthotton@marvell.com>
Signed-off-by: Nithin Dabilpuram <ndabilpuram@marvell.com>
---
 drivers/event/cnxk/cn10k_eventdev.c | 133 +++++---------
 drivers/event/cnxk/cn9k_eventdev.c  | 267 +++++++---------------------
 2 files changed, 102 insertions(+), 298 deletions(-)

diff --git a/drivers/event/cnxk/cn10k_eventdev.c b/drivers/event/cnxk/cn10k_eventdev.c
index 6f37c5bd23..d197581e90 100644
--- a/drivers/event/cnxk/cn10k_eventdev.c
+++ b/drivers/event/cnxk/cn10k_eventdev.c
@@ -6,6 +6,22 @@
 #include "cnxk_eventdev.h"
 #include "cnxk_worker.h"
 
+#define CN10K_SET_EVDEV_DEQ_OP(dev, deq_op, deq_ops)                           \
+	deq_op = deq_ops[!!(dev->rx_offloads & NIX_RX_OFFLOAD_VLAN_STRIP_F)]   \
+			[!!(dev->rx_offloads & NIX_RX_OFFLOAD_TSTAMP_F)]       \
+			[!!(dev->rx_offloads & NIX_RX_OFFLOAD_MARK_UPDATE_F)]  \
+			[!!(dev->rx_offloads & NIX_RX_OFFLOAD_CHECKSUM_F)]     \
+			[!!(dev->rx_offloads & NIX_RX_OFFLOAD_PTYPE_F)]        \
+			[!!(dev->rx_offloads & NIX_RX_OFFLOAD_RSS_F)]
+
+#define CN10K_SET_EVDEV_ENQ_OP(dev, enq_op, enq_ops)                           \
+	enq_op = enq_ops[!!(dev->tx_offloads & NIX_TX_OFFLOAD_TSTAMP_F)]       \
+			[!!(dev->tx_offloads & NIX_TX_OFFLOAD_TSO_F)]          \
+			[!!(dev->tx_offloads & NIX_TX_OFFLOAD_MBUF_NOFF_F)]    \
+			[!!(dev->tx_offloads & NIX_TX_OFFLOAD_VLAN_QINQ_F)]    \
+			[!!(dev->tx_offloads & NIX_TX_OFFLOAD_OL3_OL4_CSUM_F)] \
+			[!!(dev->tx_offloads & NIX_TX_OFFLOAD_L3_L4_CSUM_F)]
+
 static uint32_t
 cn10k_sso_gw_mode_wdata(struct cnxk_sso_evdev *dev)
 {
@@ -285,14 +301,14 @@ cn10k_sso_fp_fns_set(struct rte_eventdev *event_dev)
 #undef R
 	};
 
-	const event_dequeue_t sso_hws_tmo_deq[2][2][2][2][2][2] = {
+	const event_dequeue_t sso_hws_deq_tmo[2][2][2][2][2][2] = {
 #define R(name, f5, f4, f3, f2, f1, f0, flags)                                 \
 	[f5][f4][f3][f2][f1][f0] = cn10k_sso_hws_deq_tmo_##name,
 		NIX_RX_FASTPATH_MODES
 #undef R
 	};
 
-	const event_dequeue_burst_t sso_hws_tmo_deq_burst[2][2][2][2][2][2] = {
+	const event_dequeue_burst_t sso_hws_deq_tmo_burst[2][2][2][2][2][2] = {
 #define R(name, f5, f4, f3, f2, f1, f0, flags)                                 \
 	[f5][f4][f3][f2][f1][f0] = cn10k_sso_hws_deq_tmo_burst_##name,
 		NIX_RX_FASTPATH_MODES
@@ -313,7 +329,7 @@ cn10k_sso_fp_fns_set(struct rte_eventdev *event_dev)
 #undef R
 	};
 
-	const event_dequeue_t sso_hws_tmo_deq_seg[2][2][2][2][2][2] = {
+	const event_dequeue_t sso_hws_deq_tmo_seg[2][2][2][2][2][2] = {
 #define R(name, f5, f4, f3, f2, f1, f0, flags)                                 \
 	[f5][f4][f3][f2][f1][f0] = cn10k_sso_hws_deq_tmo_seg_##name,
 		NIX_RX_FASTPATH_MODES
@@ -321,7 +337,7 @@ cn10k_sso_fp_fns_set(struct rte_eventdev *event_dev)
 	};
 
 	const event_dequeue_burst_t
-		sso_hws_tmo_deq_seg_burst[2][2][2][2][2][2] = {
+		sso_hws_deq_tmo_seg_burst[2][2][2][2][2][2] = {
 #define R(name, f5, f4, f3, f2, f1, f0, flags)                                 \
 	[f5][f4][f3][f2][f1][f0] = cn10k_sso_hws_deq_tmo_seg_burst_##name,
 			NIX_RX_FASTPATH_MODES
@@ -350,99 +366,34 @@ cn10k_sso_fp_fns_set(struct rte_eventdev *event_dev)
 	event_dev->enqueue_new_burst = cn10k_sso_hws_enq_new_burst;
 	event_dev->enqueue_forward_burst = cn10k_sso_hws_enq_fwd_burst;
 	if (dev->rx_offloads & NIX_RX_MULTI_SEG_F) {
-		event_dev->dequeue = sso_hws_deq_seg
-			[!!(dev->rx_offloads & NIX_RX_OFFLOAD_VLAN_STRIP_F)]
-			[!!(dev->rx_offloads & NIX_RX_OFFLOAD_TSTAMP_F)]
-			[!!(dev->rx_offloads & NIX_RX_OFFLOAD_MARK_UPDATE_F)]
-			[!!(dev->rx_offloads & NIX_RX_OFFLOAD_CHECKSUM_F)]
-			[!!(dev->rx_offloads & NIX_RX_OFFLOAD_PTYPE_F)]
-			[!!(dev->rx_offloads & NIX_RX_OFFLOAD_RSS_F)];
-		event_dev->dequeue_burst = sso_hws_deq_seg_burst
-			[!!(dev->rx_offloads & NIX_RX_OFFLOAD_VLAN_STRIP_F)]
-			[!!(dev->rx_offloads & NIX_RX_OFFLOAD_TSTAMP_F)]
-			[!!(dev->rx_offloads & NIX_RX_OFFLOAD_MARK_UPDATE_F)]
-			[!!(dev->rx_offloads & NIX_RX_OFFLOAD_CHECKSUM_F)]
-			[!!(dev->rx_offloads & NIX_RX_OFFLOAD_PTYPE_F)]
-			[!!(dev->rx_offloads & NIX_RX_OFFLOAD_RSS_F)];
+		CN10K_SET_EVDEV_DEQ_OP(dev, event_dev->dequeue,
+				       sso_hws_deq_seg);
+		CN10K_SET_EVDEV_DEQ_OP(dev, event_dev->dequeue_burst,
+				       sso_hws_deq_seg_burst);
 		if (dev->is_timeout_deq) {
-			event_dev->dequeue = sso_hws_tmo_deq_seg
-				[!!(dev->rx_offloads &
-				    NIX_RX_OFFLOAD_VLAN_STRIP_F)]
-				[!!(dev->rx_offloads & NIX_RX_OFFLOAD_TSTAMP_F)]
-				[!!(dev->rx_offloads &
-				    NIX_RX_OFFLOAD_MARK_UPDATE_F)]
-				[!!(dev->rx_offloads &
-				    NIX_RX_OFFLOAD_CHECKSUM_F)]
-				[!!(dev->rx_offloads & NIX_RX_OFFLOAD_PTYPE_F)]
-				[!!(dev->rx_offloads & NIX_RX_OFFLOAD_RSS_F)];
-			event_dev->dequeue_burst = sso_hws_tmo_deq_seg_burst
-				[!!(dev->rx_offloads &
-				    NIX_RX_OFFLOAD_VLAN_STRIP_F)]
-				[!!(dev->rx_offloads & NIX_RX_OFFLOAD_TSTAMP_F)]
-				[!!(dev->rx_offloads &
-				    NIX_RX_OFFLOAD_MARK_UPDATE_F)]
-				[!!(dev->rx_offloads &
-				    NIX_RX_OFFLOAD_CHECKSUM_F)]
-				[!!(dev->rx_offloads & NIX_RX_OFFLOAD_PTYPE_F)]
-				[!!(dev->rx_offloads & NIX_RX_OFFLOAD_RSS_F)];
+			CN10K_SET_EVDEV_DEQ_OP(dev, event_dev->dequeue,
+					       sso_hws_deq_tmo_seg);
+			CN10K_SET_EVDEV_DEQ_OP(dev, event_dev->dequeue_burst,
+					       sso_hws_deq_tmo_seg_burst);
 		}
 	} else {
-		event_dev->dequeue = sso_hws_deq
-			[!!(dev->rx_offloads & NIX_RX_OFFLOAD_VLAN_STRIP_F)]
-			[!!(dev->rx_offloads & NIX_RX_OFFLOAD_TSTAMP_F)]
-			[!!(dev->rx_offloads & NIX_RX_OFFLOAD_MARK_UPDATE_F)]
-			[!!(dev->rx_offloads & NIX_RX_OFFLOAD_CHECKSUM_F)]
-			[!!(dev->rx_offloads & NIX_RX_OFFLOAD_PTYPE_F)]
-			[!!(dev->rx_offloads & NIX_RX_OFFLOAD_RSS_F)];
-		event_dev->dequeue_burst = sso_hws_deq_burst
-			[!!(dev->rx_offloads & NIX_RX_OFFLOAD_VLAN_STRIP_F)]
-			[!!(dev->rx_offloads & NIX_RX_OFFLOAD_TSTAMP_F)]
-			[!!(dev->rx_offloads & NIX_RX_OFFLOAD_MARK_UPDATE_F)]
-			[!!(dev->rx_offloads & NIX_RX_OFFLOAD_CHECKSUM_F)]
-			[!!(dev->rx_offloads & NIX_RX_OFFLOAD_PTYPE_F)]
-			[!!(dev->rx_offloads & NIX_RX_OFFLOAD_RSS_F)];
+		CN10K_SET_EVDEV_DEQ_OP(dev, event_dev->dequeue, sso_hws_deq);
+		CN10K_SET_EVDEV_DEQ_OP(dev, event_dev->dequeue_burst,
+				       sso_hws_deq_burst);
 		if (dev->is_timeout_deq) {
-			event_dev->dequeue = sso_hws_tmo_deq
-				[!!(dev->rx_offloads &
-				    NIX_RX_OFFLOAD_VLAN_STRIP_F)]
-				[!!(dev->rx_offloads & NIX_RX_OFFLOAD_TSTAMP_F)]
-				[!!(dev->rx_offloads &
-				    NIX_RX_OFFLOAD_MARK_UPDATE_F)]
-				[!!(dev->rx_offloads &
-				    NIX_RX_OFFLOAD_CHECKSUM_F)]
-				[!!(dev->rx_offloads & NIX_RX_OFFLOAD_PTYPE_F)]
-				[!!(dev->rx_offloads & NIX_RX_OFFLOAD_RSS_F)];
-			event_dev->dequeue_burst = sso_hws_tmo_deq_burst
-				[!!(dev->rx_offloads &
-				    NIX_RX_OFFLOAD_VLAN_STRIP_F)]
-				[!!(dev->rx_offloads & NIX_RX_OFFLOAD_TSTAMP_F)]
-				[!!(dev->rx_offloads &
-				    NIX_RX_OFFLOAD_MARK_UPDATE_F)]
-				[!!(dev->rx_offloads &
-				    NIX_RX_OFFLOAD_CHECKSUM_F)]
-				[!!(dev->rx_offloads & NIX_RX_OFFLOAD_PTYPE_F)]
-				[!!(dev->rx_offloads & NIX_RX_OFFLOAD_RSS_F)];
+			CN10K_SET_EVDEV_DEQ_OP(dev, event_dev->dequeue,
+					       sso_hws_deq_tmo);
+			CN10K_SET_EVDEV_DEQ_OP(dev, event_dev->dequeue_burst,
+					       sso_hws_deq_tmo_burst);
 		}
 	}
 
-	if (dev->tx_offloads & NIX_TX_MULTI_SEG_F) {
-		/* [SEC] [TSMP] [MBUF_NOFF] [VLAN] [OL3_L4_CSUM] [L3_L4_CSUM] */
-		event_dev->txa_enqueue = sso_hws_tx_adptr_enq_seg
-			[!!(dev->tx_offloads & NIX_TX_OFFLOAD_TSTAMP_F)]
-			[!!(dev->tx_offloads & NIX_TX_OFFLOAD_TSO_F)]
-			[!!(dev->tx_offloads & NIX_TX_OFFLOAD_MBUF_NOFF_F)]
-			[!!(dev->tx_offloads & NIX_TX_OFFLOAD_VLAN_QINQ_F)]
-			[!!(dev->tx_offloads & NIX_TX_OFFLOAD_OL3_OL4_CSUM_F)]
-			[!!(dev->tx_offloads & NIX_TX_OFFLOAD_L3_L4_CSUM_F)];
-	} else {
-		event_dev->txa_enqueue = sso_hws_tx_adptr_enq
-			[!!(dev->tx_offloads & NIX_TX_OFFLOAD_TSTAMP_F)]
-			[!!(dev->tx_offloads & NIX_TX_OFFLOAD_TSO_F)]
-			[!!(dev->tx_offloads & NIX_TX_OFFLOAD_MBUF_NOFF_F)]
-			[!!(dev->tx_offloads & NIX_TX_OFFLOAD_VLAN_QINQ_F)]
-			[!!(dev->tx_offloads & NIX_TX_OFFLOAD_OL3_OL4_CSUM_F)]
-			[!!(dev->tx_offloads & NIX_TX_OFFLOAD_L3_L4_CSUM_F)];
-	}
+	if (dev->tx_offloads & NIX_TX_MULTI_SEG_F)
+		CN10K_SET_EVDEV_ENQ_OP(dev, event_dev->txa_enqueue,
+				       sso_hws_tx_adptr_enq_seg);
+	else
+		CN10K_SET_EVDEV_ENQ_OP(dev, event_dev->txa_enqueue,
+				       sso_hws_tx_adptr_enq);
 
 	event_dev->txa_enqueue_same_dest = event_dev->txa_enqueue;
 }
@@ -864,7 +815,7 @@ cn10k_sso_init(struct rte_eventdev *event_dev)
 	int rc;
 
 	if (RTE_CACHE_LINE_SIZE != 64) {
-		plt_err("Driver not compiled for CN9K");
+		plt_err("Driver not compiled for CN10K");
 		return -EFAULT;
 	}
 
diff --git a/drivers/event/cnxk/cn9k_eventdev.c b/drivers/event/cnxk/cn9k_eventdev.c
index a69edff195..b01f492b3a 100644
--- a/drivers/event/cnxk/cn9k_eventdev.c
+++ b/drivers/event/cnxk/cn9k_eventdev.c
@@ -9,6 +9,22 @@
 #define CN9K_DUAL_WS_NB_WS	    2
 #define CN9K_DUAL_WS_PAIR_ID(x, id) (((x)*CN9K_DUAL_WS_NB_WS) + id)
 
+#define CN9K_SET_EVDEV_DEQ_OP(dev, deq_op, deq_ops)                            \
+	deq_op = deq_ops[!!(dev->rx_offloads & NIX_RX_OFFLOAD_VLAN_STRIP_F)]   \
+			[!!(dev->rx_offloads & NIX_RX_OFFLOAD_TSTAMP_F)]       \
+			[!!(dev->rx_offloads & NIX_RX_OFFLOAD_MARK_UPDATE_F)]  \
+			[!!(dev->rx_offloads & NIX_RX_OFFLOAD_CHECKSUM_F)]     \
+			[!!(dev->rx_offloads & NIX_RX_OFFLOAD_PTYPE_F)]        \
+			[!!(dev->rx_offloads & NIX_RX_OFFLOAD_RSS_F)]
+
+#define CN9K_SET_EVDEV_ENQ_OP(dev, enq_op, enq_ops)                            \
+	enq_op = enq_ops[!!(dev->tx_offloads & NIX_TX_OFFLOAD_TSTAMP_F)]       \
+			[!!(dev->tx_offloads & NIX_TX_OFFLOAD_TSO_F)]          \
+			[!!(dev->tx_offloads & NIX_TX_OFFLOAD_MBUF_NOFF_F)]    \
+			[!!(dev->tx_offloads & NIX_TX_OFFLOAD_VLAN_QINQ_F)]    \
+			[!!(dev->tx_offloads & NIX_TX_OFFLOAD_OL3_OL4_CSUM_F)] \
+			[!!(dev->tx_offloads & NIX_TX_OFFLOAD_L3_L4_CSUM_F)]
+
 static void
 cn9k_init_hws_ops(struct cn9k_sso_hws_state *ws, uintptr_t base)
 {
@@ -468,99 +484,33 @@ cn9k_sso_fp_fns_set(struct rte_eventdev *event_dev)
 	event_dev->enqueue_new_burst = cn9k_sso_hws_enq_new_burst;
 	event_dev->enqueue_forward_burst = cn9k_sso_hws_enq_fwd_burst;
 	if (dev->rx_offloads & NIX_RX_MULTI_SEG_F) {
-		event_dev->dequeue = sso_hws_deq_seg
-			[!!(dev->rx_offloads & NIX_RX_OFFLOAD_VLAN_STRIP_F)]
-			[!!(dev->rx_offloads & NIX_RX_OFFLOAD_TSTAMP_F)]
-			[!!(dev->rx_offloads & NIX_RX_OFFLOAD_MARK_UPDATE_F)]
-			[!!(dev->rx_offloads & NIX_RX_OFFLOAD_CHECKSUM_F)]
-			[!!(dev->rx_offloads & NIX_RX_OFFLOAD_PTYPE_F)]
-			[!!(dev->rx_offloads & NIX_RX_OFFLOAD_RSS_F)];
-		event_dev->dequeue_burst = sso_hws_deq_seg_burst
-			[!!(dev->rx_offloads & NIX_RX_OFFLOAD_VLAN_STRIP_F)]
-			[!!(dev->rx_offloads & NIX_RX_OFFLOAD_TSTAMP_F)]
-			[!!(dev->rx_offloads & NIX_RX_OFFLOAD_MARK_UPDATE_F)]
-			[!!(dev->rx_offloads & NIX_RX_OFFLOAD_CHECKSUM_F)]
-			[!!(dev->rx_offloads & NIX_RX_OFFLOAD_PTYPE_F)]
-			[!!(dev->rx_offloads & NIX_RX_OFFLOAD_RSS_F)];
+		CN9K_SET_EVDEV_DEQ_OP(dev, event_dev->dequeue, sso_hws_deq_seg);
+		CN9K_SET_EVDEV_DEQ_OP(dev, event_dev->dequeue_burst,
+				      sso_hws_deq_seg_burst);
 		if (dev->is_timeout_deq) {
-			event_dev->dequeue = sso_hws_deq_tmo_seg
-				[!!(dev->rx_offloads &
-				    NIX_RX_OFFLOAD_VLAN_STRIP_F)]
-				[!!(dev->rx_offloads & NIX_RX_OFFLOAD_TSTAMP_F)]
-				[!!(dev->rx_offloads &
-				    NIX_RX_OFFLOAD_MARK_UPDATE_F)]
-				[!!(dev->rx_offloads &
-				    NIX_RX_OFFLOAD_CHECKSUM_F)]
-				[!!(dev->rx_offloads & NIX_RX_OFFLOAD_PTYPE_F)]
-				[!!(dev->rx_offloads & NIX_RX_OFFLOAD_RSS_F)];
-			event_dev->dequeue_burst = sso_hws_deq_tmo_seg_burst
-				[!!(dev->rx_offloads &
-				    NIX_RX_OFFLOAD_VLAN_STRIP_F)]
-				[!!(dev->rx_offloads & NIX_RX_OFFLOAD_TSTAMP_F)]
-				[!!(dev->rx_offloads &
-				    NIX_RX_OFFLOAD_MARK_UPDATE_F)]
-				[!!(dev->rx_offloads &
-				    NIX_RX_OFFLOAD_CHECKSUM_F)]
-				[!!(dev->rx_offloads & NIX_RX_OFFLOAD_PTYPE_F)]
-				[!!(dev->rx_offloads & NIX_RX_OFFLOAD_RSS_F)];
+			CN9K_SET_EVDEV_DEQ_OP(dev, event_dev->dequeue,
+					      sso_hws_deq_tmo_seg);
+			CN9K_SET_EVDEV_DEQ_OP(dev, event_dev->dequeue_burst,
+					      sso_hws_deq_tmo_seg_burst);
 		}
 	} else {
-		event_dev->dequeue = sso_hws_deq
-			[!!(dev->rx_offloads & NIX_RX_OFFLOAD_VLAN_STRIP_F)]
-			[!!(dev->rx_offloads & NIX_RX_OFFLOAD_TSTAMP_F)]
-			[!!(dev->rx_offloads & NIX_RX_OFFLOAD_MARK_UPDATE_F)]
-			[!!(dev->rx_offloads & NIX_RX_OFFLOAD_CHECKSUM_F)]
-			[!!(dev->rx_offloads & NIX_RX_OFFLOAD_PTYPE_F)]
-			[!!(dev->rx_offloads & NIX_RX_OFFLOAD_RSS_F)];
-		event_dev->dequeue_burst = sso_hws_deq_burst
-			[!!(dev->rx_offloads & NIX_RX_OFFLOAD_VLAN_STRIP_F)]
-			[!!(dev->rx_offloads & NIX_RX_OFFLOAD_TSTAMP_F)]
-			[!!(dev->rx_offloads & NIX_RX_OFFLOAD_MARK_UPDATE_F)]
-			[!!(dev->rx_offloads & NIX_RX_OFFLOAD_CHECKSUM_F)]
-			[!!(dev->rx_offloads & NIX_RX_OFFLOAD_PTYPE_F)]
-			[!!(dev->rx_offloads & NIX_RX_OFFLOAD_RSS_F)];
+		CN9K_SET_EVDEV_DEQ_OP(dev, event_dev->dequeue, sso_hws_deq);
+		CN9K_SET_EVDEV_DEQ_OP(dev, event_dev->dequeue_burst,
+				      sso_hws_deq_burst);
 		if (dev->is_timeout_deq) {
-			event_dev->dequeue = sso_hws_deq_tmo
-				[!!(dev->rx_offloads &
-				    NIX_RX_OFFLOAD_VLAN_STRIP_F)]
-				[!!(dev->rx_offloads & NIX_RX_OFFLOAD_TSTAMP_F)]
-				[!!(dev->rx_offloads &
-				    NIX_RX_OFFLOAD_MARK_UPDATE_F)]
-				[!!(dev->rx_offloads &
-				    NIX_RX_OFFLOAD_CHECKSUM_F)]
-				[!!(dev->rx_offloads & NIX_RX_OFFLOAD_PTYPE_F)]
-				[!!(dev->rx_offloads & NIX_RX_OFFLOAD_RSS_F)];
-			event_dev->dequeue_burst = sso_hws_deq_tmo_burst
-				[!!(dev->rx_offloads &
-				    NIX_RX_OFFLOAD_VLAN_STRIP_F)]
-				[!!(dev->rx_offloads & NIX_RX_OFFLOAD_TSTAMP_F)]
-				[!!(dev->rx_offloads &
-				    NIX_RX_OFFLOAD_MARK_UPDATE_F)]
-				[!!(dev->rx_offloads &
-				    NIX_RX_OFFLOAD_CHECKSUM_F)]
-				[!!(dev->rx_offloads & NIX_RX_OFFLOAD_PTYPE_F)]
-				[!!(dev->rx_offloads & NIX_RX_OFFLOAD_RSS_F)];
+			CN9K_SET_EVDEV_DEQ_OP(dev, event_dev->dequeue,
+					      sso_hws_deq_tmo);
+			CN9K_SET_EVDEV_DEQ_OP(dev, event_dev->dequeue_burst,
+					      sso_hws_deq_tmo_burst);
 		}
 	}
 
-	if (dev->tx_offloads & NIX_TX_MULTI_SEG_F) {
-		/* [SEC] [TSMP] [MBUF_NOFF] [VLAN] [OL3_L4_CSUM] [L3_L4_CSUM] */
-		event_dev->txa_enqueue = sso_hws_tx_adptr_enq_seg
-			[!!(dev->tx_offloads & NIX_TX_OFFLOAD_TSTAMP_F)]
-			[!!(dev->tx_offloads & NIX_TX_OFFLOAD_TSO_F)]
-			[!!(dev->tx_offloads & NIX_TX_OFFLOAD_MBUF_NOFF_F)]
-			[!!(dev->tx_offloads & NIX_TX_OFFLOAD_VLAN_QINQ_F)]
-			[!!(dev->tx_offloads & NIX_TX_OFFLOAD_OL3_OL4_CSUM_F)]
-			[!!(dev->tx_offloads & NIX_TX_OFFLOAD_L3_L4_CSUM_F)];
-	} else {
-		event_dev->txa_enqueue = sso_hws_tx_adptr_enq
-			[!!(dev->tx_offloads & NIX_TX_OFFLOAD_TSTAMP_F)]
-			[!!(dev->tx_offloads & NIX_TX_OFFLOAD_TSO_F)]
-			[!!(dev->tx_offloads & NIX_TX_OFFLOAD_MBUF_NOFF_F)]
-			[!!(dev->tx_offloads & NIX_TX_OFFLOAD_VLAN_QINQ_F)]
-			[!!(dev->tx_offloads & NIX_TX_OFFLOAD_OL3_OL4_CSUM_F)]
-			[!!(dev->tx_offloads & NIX_TX_OFFLOAD_L3_L4_CSUM_F)];
-	}
+	if (dev->tx_offloads & NIX_TX_MULTI_SEG_F)
+		CN9K_SET_EVDEV_ENQ_OP(dev, event_dev->txa_enqueue,
+				      sso_hws_tx_adptr_enq_seg);
+	else
+		CN9K_SET_EVDEV_ENQ_OP(dev, event_dev->txa_enqueue,
+				      sso_hws_tx_adptr_enq);
 
 	if (dev->dual_ws) {
 		event_dev->enqueue = cn9k_sso_hws_dual_enq;
@@ -570,134 +520,37 @@ cn9k_sso_fp_fns_set(struct rte_eventdev *event_dev)
 			cn9k_sso_hws_dual_enq_fwd_burst;
 
 		if (dev->rx_offloads & NIX_RX_MULTI_SEG_F) {
-			event_dev->dequeue = sso_hws_dual_deq_seg
-				[!!(dev->rx_offloads &
-				    NIX_RX_OFFLOAD_VLAN_STRIP_F)]
-				[!!(dev->rx_offloads & NIX_RX_OFFLOAD_TSTAMP_F)]
-				[!!(dev->rx_offloads &
-				    NIX_RX_OFFLOAD_MARK_UPDATE_F)]
-				[!!(dev->rx_offloads &
-				    NIX_RX_OFFLOAD_CHECKSUM_F)]
-				[!!(dev->rx_offloads & NIX_RX_OFFLOAD_PTYPE_F)]
-				[!!(dev->rx_offloads & NIX_RX_OFFLOAD_RSS_F)];
-			event_dev->dequeue_burst = sso_hws_dual_deq_seg_burst
-				[!!(dev->rx_offloads &
-				    NIX_RX_OFFLOAD_VLAN_STRIP_F)]
-				[!!(dev->rx_offloads & NIX_RX_OFFLOAD_TSTAMP_F)]
-				[!!(dev->rx_offloads &
-				    NIX_RX_OFFLOAD_MARK_UPDATE_F)]
-				[!!(dev->rx_offloads &
-				    NIX_RX_OFFLOAD_CHECKSUM_F)]
-				[!!(dev->rx_offloads & NIX_RX_OFFLOAD_PTYPE_F)]
-				[!!(dev->rx_offloads & NIX_RX_OFFLOAD_RSS_F)];
+			CN9K_SET_EVDEV_DEQ_OP(dev, event_dev->dequeue,
+					      sso_hws_dual_deq_seg);
+			CN9K_SET_EVDEV_DEQ_OP(dev, event_dev->dequeue_burst,
+					      sso_hws_dual_deq_seg_burst);
 			if (dev->is_timeout_deq) {
-				event_dev->dequeue = sso_hws_dual_deq_tmo_seg
-					[!!(dev->rx_offloads &
-					    NIX_RX_OFFLOAD_VLAN_STRIP_F)]
-					[!!(dev->rx_offloads &
-					    NIX_RX_OFFLOAD_TSTAMP_F)]
-					[!!(dev->rx_offloads &
-					    NIX_RX_OFFLOAD_MARK_UPDATE_F)]
-					[!!(dev->rx_offloads &
-					    NIX_RX_OFFLOAD_CHECKSUM_F)]
-					[!!(dev->rx_offloads &
-					    NIX_RX_OFFLOAD_PTYPE_F)]
-					[!!(dev->rx_offloads &
-					    NIX_RX_OFFLOAD_RSS_F)];
-				event_dev->dequeue_burst =
-					sso_hws_dual_deq_tmo_seg_burst
-						[!!(dev->rx_offloads &
-						  NIX_RX_OFFLOAD_VLAN_STRIP_F)]
-						[!!(dev->rx_offloads &
-						    NIX_RX_OFFLOAD_TSTAMP_F)]
-						[!!(dev->rx_offloads &
-						  NIX_RX_OFFLOAD_MARK_UPDATE_F)]
-						[!!(dev->rx_offloads &
-						    NIX_RX_OFFLOAD_CHECKSUM_F)]
-						[!!(dev->rx_offloads &
-						    NIX_RX_OFFLOAD_PTYPE_F)]
-						[!!(dev->rx_offloads &
-						    NIX_RX_OFFLOAD_RSS_F)];
+				CN9K_SET_EVDEV_DEQ_OP(dev, event_dev->dequeue,
+						      sso_hws_dual_deq_tmo_seg);
+				CN9K_SET_EVDEV_DEQ_OP(
+					dev, event_dev->dequeue_burst,
+					sso_hws_dual_deq_tmo_seg_burst);
 			}
 		} else {
-			event_dev->dequeue = sso_hws_dual_deq
-				[!!(dev->rx_offloads &
-				    NIX_RX_OFFLOAD_VLAN_STRIP_F)]
-				[!!(dev->rx_offloads & NIX_RX_OFFLOAD_TSTAMP_F)]
-				[!!(dev->rx_offloads &
-				    NIX_RX_OFFLOAD_MARK_UPDATE_F)]
-				[!!(dev->rx_offloads &
-				    NIX_RX_OFFLOAD_CHECKSUM_F)]
-				[!!(dev->rx_offloads & NIX_RX_OFFLOAD_PTYPE_F)]
-				[!!(dev->rx_offloads & NIX_RX_OFFLOAD_RSS_F)];
-			event_dev->dequeue_burst = sso_hws_dual_deq_burst
-				[!!(dev->rx_offloads &
-				    NIX_RX_OFFLOAD_VLAN_STRIP_F)]
-				[!!(dev->rx_offloads & NIX_RX_OFFLOAD_TSTAMP_F)]
-				[!!(dev->rx_offloads &
-				    NIX_RX_OFFLOAD_MARK_UPDATE_F)]
-				[!!(dev->rx_offloads &
-				    NIX_RX_OFFLOAD_CHECKSUM_F)]
-				[!!(dev->rx_offloads & NIX_RX_OFFLOAD_PTYPE_F)]
-				[!!(dev->rx_offloads & NIX_RX_OFFLOAD_RSS_F)];
+			CN9K_SET_EVDEV_DEQ_OP(dev, event_dev->dequeue,
+					      sso_hws_dual_deq);
+			CN9K_SET_EVDEV_DEQ_OP(dev, event_dev->dequeue_burst,
+					      sso_hws_dual_deq_burst);
 			if (dev->is_timeout_deq) {
-				event_dev->dequeue = sso_hws_dual_deq_tmo
-					[!!(dev->rx_offloads &
-					    NIX_RX_OFFLOAD_VLAN_STRIP_F)]
-					[!!(dev->rx_offloads &
-					    NIX_RX_OFFLOAD_TSTAMP_F)]
-					[!!(dev->rx_offloads &
-					    NIX_RX_OFFLOAD_MARK_UPDATE_F)]
-					[!!(dev->rx_offloads &
-					    NIX_RX_OFFLOAD_CHECKSUM_F)]
-					[!!(dev->rx_offloads &
-					    NIX_RX_OFFLOAD_PTYPE_F)]
-					[!!(dev->rx_offloads &
-					    NIX_RX_OFFLOAD_RSS_F)];
-				event_dev->dequeue_burst =
-					sso_hws_dual_deq_tmo_burst
-						[!!(dev->rx_offloads &
-						  NIX_RX_OFFLOAD_VLAN_STRIP_F)]
-						[!!(dev->rx_offloads &
-						  NIX_RX_OFFLOAD_TSTAMP_F)]
-						[!!(dev->rx_offloads &
-						  NIX_RX_OFFLOAD_MARK_UPDATE_F)]
-						[!!(dev->rx_offloads &
-						  NIX_RX_OFFLOAD_CHECKSUM_F)]
-						[!!(dev->rx_offloads &
-						  NIX_RX_OFFLOAD_PTYPE_F)]
-						[!!(dev->rx_offloads &
-						  NIX_RX_OFFLOAD_RSS_F)];
+				CN9K_SET_EVDEV_DEQ_OP(dev, event_dev->dequeue,
+						      sso_hws_dual_deq_tmo);
+				CN9K_SET_EVDEV_DEQ_OP(
+					dev, event_dev->dequeue_burst,
+					sso_hws_dual_deq_tmo_burst);
 			}
 		}
 
-		if (dev->tx_offloads & NIX_TX_MULTI_SEG_F) {
-			/* [TSMP] [MBUF_NOFF] [VLAN] [OL3_L4_CSUM] [L3_L4_CSUM]
-			 */
-			event_dev->txa_enqueue = sso_hws_dual_tx_adptr_enq_seg
-				[!!(dev->tx_offloads & NIX_TX_OFFLOAD_TSTAMP_F)]
-				[!!(dev->tx_offloads & NIX_TX_OFFLOAD_TSO_F)]
-				[!!(dev->tx_offloads &
-				    NIX_TX_OFFLOAD_MBUF_NOFF_F)]
-				[!!(dev->tx_offloads &
-				    NIX_TX_OFFLOAD_VLAN_QINQ_F)]
-				[!!(dev->tx_offloads &
-				    NIX_TX_OFFLOAD_OL3_OL4_CSUM_F)]
-				[!!(dev->tx_offloads &
-				    NIX_TX_OFFLOAD_L3_L4_CSUM_F)];
-		} else {
-			event_dev->txa_enqueue = sso_hws_dual_tx_adptr_enq
-				[!!(dev->tx_offloads & NIX_TX_OFFLOAD_TSTAMP_F)]
-				[!!(dev->tx_offloads & NIX_TX_OFFLOAD_TSO_F)]
-				[!!(dev->tx_offloads &
-				    NIX_TX_OFFLOAD_MBUF_NOFF_F)]
-				[!!(dev->tx_offloads &
-				    NIX_TX_OFFLOAD_VLAN_QINQ_F)]
-				[!!(dev->tx_offloads &
-				    NIX_TX_OFFLOAD_OL3_OL4_CSUM_F)]
-				[!!(dev->tx_offloads &
-				    NIX_TX_OFFLOAD_L3_L4_CSUM_F)];
-		}
+		if (dev->tx_offloads & NIX_TX_MULTI_SEG_F)
+			CN9K_SET_EVDEV_ENQ_OP(dev, event_dev->txa_enqueue,
+					      sso_hws_dual_tx_adptr_enq_seg);
+		else
+			CN9K_SET_EVDEV_ENQ_OP(dev, event_dev->txa_enqueue,
+					      sso_hws_dual_tx_adptr_enq);
 	}
 
 	event_dev->txa_enqueue_same_dest = event_dev->txa_enqueue;
-- 
2.25.1


  parent reply	other threads:[~2021-08-30 11:11 UTC|newest]

Thread overview: 32+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-08-30 11:09 [dpdk-dev] [PATCH 0/8] Crypto adapter support for Marvell CNXK driver Shijith Thotton
2021-08-30 11:09 ` [dpdk-dev] [PATCH 1/8] net/cnxk: add flag to show CPT can enqueue events Shijith Thotton
2021-08-30 11:09 ` Shijith Thotton [this message]
2021-08-30 11:09 ` [dpdk-dev] [PATCH 3/8] common/cnxk: add API to check CPT IQ is full Shijith Thotton
2021-08-30 11:09 ` [dpdk-dev] [PATCH 4/8] drivers: add cnxk crypto adapter eventdev ops Shijith Thotton
2021-08-30 11:09 ` [dpdk-dev] [PATCH 5/8] crypto/cnxk: add cn9k crypto adapter fast path ops Shijith Thotton
2021-08-31 15:43   ` Kinsella, Ray
2021-09-01  8:45     ` [dpdk-dev] [EXT] " Anoob Joseph
2021-08-30 11:09 ` [dpdk-dev] [PATCH 6/8] event/cnxk: " Shijith Thotton
2021-08-30 11:09 ` [dpdk-dev] [PATCH 7/8] crypto/cnxk: add cn10k " Shijith Thotton
2021-08-31 15:42   ` Kinsella, Ray
2021-09-01  8:46     ` [dpdk-dev] [EXT] " Anoob Joseph
2021-08-30 11:09 ` [dpdk-dev] [PATCH 8/8] event/cnxk: " Shijith Thotton
2021-09-02 12:17 ` [dpdk-dev] [PATCH v2 0/8] Crypto adapter support for Marvell CNXK driver Shijith Thotton
2021-09-02 12:17   ` [dpdk-dev] [PATCH v2 1/8] net/cnxk: add flag to show CPT can enqueue events Shijith Thotton
2021-09-02 12:17   ` [dpdk-dev] [PATCH v2 2/8] event/cnxk: add macro to set eventdev ops Shijith Thotton
2021-09-02 12:17   ` [dpdk-dev] [PATCH v2 3/8] common/cnxk: add API to check CPT IQ is full Shijith Thotton
2021-09-02 12:17   ` [dpdk-dev] [PATCH v2 4/8] drivers: add cnxk crypto adapter eventdev ops Shijith Thotton
2021-09-02 12:17   ` [dpdk-dev] [PATCH v2 5/8] crypto/cnxk: add cn9k crypto adapter fast path ops Shijith Thotton
2021-09-02 12:17   ` [dpdk-dev] [PATCH v2 6/8] event/cnxk: " Shijith Thotton
2021-09-02 12:17   ` [dpdk-dev] [PATCH v2 7/8] crypto/cnxk: add cn10k " Shijith Thotton
2021-09-02 12:17   ` [dpdk-dev] [PATCH v2 8/8] event/cnxk: " Shijith Thotton
2021-09-02 14:41   ` [dpdk-dev] [PATCH v3 0/8] Crypto adapter support for Marvell CNXK driver Shijith Thotton
2021-09-02 14:41     ` [dpdk-dev] [PATCH v3 1/8] net/cnxk: add flag to show CPT can enqueue events Shijith Thotton
2021-09-02 14:41     ` [dpdk-dev] [PATCH v3 2/8] event/cnxk: add macro to set eventdev ops Shijith Thotton
2021-09-02 14:41     ` [dpdk-dev] [PATCH v3 3/8] common/cnxk: add API to check CPT IQ is full Shijith Thotton
2021-09-02 14:41     ` [dpdk-dev] [PATCH v3 4/8] drivers: add cnxk crypto adapter eventdev ops Shijith Thotton
2021-09-02 14:41     ` [dpdk-dev] [PATCH v3 5/8] crypto/cnxk: add cn9k crypto adapter fast path ops Shijith Thotton
2021-09-02 14:41     ` [dpdk-dev] [PATCH v3 6/8] event/cnxk: " Shijith Thotton
2021-09-02 14:41     ` [dpdk-dev] [PATCH v3 7/8] crypto/cnxk: add cn10k " Shijith Thotton
2021-09-02 14:41     ` [dpdk-dev] [PATCH v3 8/8] event/cnxk: " Shijith Thotton
2021-09-03 15:04     ` [dpdk-dev] [PATCH v3 0/8] Crypto adapter support for Marvell CNXK driver Akhil Goyal

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