* [PATCH v2] target/i386: Added VGIF feature
@ 2021-07-28 11:37 Lara Lazier
2021-07-29 7:59 ` Paolo Bonzini
2021-07-29 8:01 ` Paolo Bonzini
0 siblings, 2 replies; 3+ messages in thread
From: Lara Lazier @ 2021-07-28 11:37 UTC (permalink / raw)
To: qemu-devel; +Cc: pbonzini, Lara Lazier
VGIF allows STGI and CLGI to execute in guest mode and control virtual
interrupts in guest mode.
When the VGIF feature is enabled then:
* executing STGI in the guest sets bit 9 of the VMCB offset 60h.
* executing CLGI in the guest clears bit 9 of the VMCB offset 60h.
Signed-off-by: Lara Lazier <laramglazier@gmail.com>
---
target/i386/cpu.c | 3 ++-
target/i386/svm.h | 6 ++++++
target/i386/tcg/sysemu/svm_helper.c | 27 +++++++++++++++++++++++++--
3 files changed, 33 insertions(+), 3 deletions(-)
diff --git a/target/i386/cpu.c b/target/i386/cpu.c
index edb97ebbbe..71d26cf1bd 100644
--- a/target/i386/cpu.c
+++ b/target/i386/cpu.c
@@ -631,7 +631,8 @@ void x86_cpu_vendor_words2str(char *dst, uint32_t vendor1,
#define TCG_EXT3_FEATURES (CPUID_EXT3_LAHF_LM | CPUID_EXT3_SVM | \
CPUID_EXT3_CR8LEG | CPUID_EXT3_ABM | CPUID_EXT3_SSE4A)
#define TCG_EXT4_FEATURES 0
-#define TCG_SVM_FEATURES CPUID_SVM_NPT
+#define TCG_SVM_FEATURES (CPUID_SVM_NPT | CPUID_SVM_VGIF | \
+ CPUID_SVM_SVME_ADDR_CHK)
#define TCG_KVM_FEATURES 0
#define TCG_7_0_EBX_FEATURES (CPUID_7_0_EBX_SMEP | CPUID_7_0_EBX_SMAP | \
CPUID_7_0_EBX_BMI1 | CPUID_7_0_EBX_BMI2 | CPUID_7_0_EBX_ADX | \
diff --git a/target/i386/svm.h b/target/i386/svm.h
index e54670ef12..dab2f90925 100644
--- a/target/i386/svm.h
+++ b/target/i386/svm.h
@@ -9,6 +9,12 @@
#define V_IRQ_SHIFT 8
#define V_IRQ_MASK (1 << V_IRQ_SHIFT)
+#define V_GIF_ENABLED_SHIFT 25
+#define V_GIF_ENABLED_MASK (1 << V_GIF_ENABLED_SHIFT)
+
+#define V_GIF_SHIFT 9
+#define V_GIF_MASK (1 << V_GIF_SHIFT)
+
#define V_INTR_PRIO_SHIFT 16
#define V_INTR_PRIO_MASK (0x0f << V_INTR_PRIO_SHIFT)
diff --git a/target/i386/tcg/sysemu/svm_helper.c b/target/i386/tcg/sysemu/svm_helper.c
index 7b80f7bc85..72ea7c9a08 100644
--- a/target/i386/tcg/sysemu/svm_helper.c
+++ b/target/i386/tcg/sysemu/svm_helper.c
@@ -120,6 +120,11 @@ static inline void svm_vmload_canonicalization(CPUX86State *env)
env->segs[R_GS].base = (long) (env->segs[R_GS].base & mask);
}
+static inline bool virtual_gif_enabled(CPUX86State *env, uint32_t int_ctl)
+{
+ return (int_ctl & V_GIF_ENABLED_MASK) && (env->features[FEAT_SVM] & CPUID_SVM_VGIF);
+}
+
void helper_vmrun(CPUX86State *env, int aflag, int next_eip_addend)
{
CPUState *cs = env_cpu(env);
@@ -517,13 +522,31 @@ void helper_vmsave(CPUX86State *env, int aflag)
void helper_stgi(CPUX86State *env)
{
cpu_svm_check_intercept_param(env, SVM_EXIT_STGI, 0, GETPC());
- env->hflags2 |= HF2_GIF_MASK;
+
+ CPUState *cs = env_cpu(env);
+ uint32_t int_ctl = x86_ldl_phys(cs,
+ env->vm_vmcb + offsetof(struct vmcb, control.int_ctl));
+ if (virtual_gif_enabled(env, int_ctl) && likely(env->hflags & HF_GUEST_MASK)) {
+ x86_stl_phys(cs, env->vm_vmcb + offsetof(struct vmcb, control.int_ctl),
+ int_ctl | V_GIF_MASK);
+ } else {
+ env->hflags2 |= HF2_GIF_MASK;
+ }
}
void helper_clgi(CPUX86State *env)
{
cpu_svm_check_intercept_param(env, SVM_EXIT_CLGI, 0, GETPC());
- env->hflags2 &= ~HF2_GIF_MASK;
+
+ CPUState *cs = env_cpu(env);
+ uint32_t int_ctl = x86_ldl_phys(cs,
+ env->vm_vmcb + offsetof(struct vmcb, control.int_ctl));
+ if (virtual_gif_enabled(env, int_ctl) && likely(env->hflags & HF_GUEST_MASK)) {
+ x86_stl_phys(cs, env->vm_vmcb + offsetof(struct vmcb, control.int_ctl),
+ int_ctl & ~V_GIF_MASK);
+ } else {
+ env->hflags2 &= ~HF2_GIF_MASK;
+ }
}
bool cpu_svm_has_intercept(CPUX86State *env, uint32_t type)
--
2.25.1
^ permalink raw reply related [flat|nested] 3+ messages in thread
* Re: [PATCH v2] target/i386: Added VGIF feature
2021-07-28 11:37 [PATCH v2] target/i386: Added VGIF feature Lara Lazier
@ 2021-07-29 7:59 ` Paolo Bonzini
2021-07-29 8:01 ` Paolo Bonzini
1 sibling, 0 replies; 3+ messages in thread
From: Paolo Bonzini @ 2021-07-29 7:59 UTC (permalink / raw)
To: Lara Lazier, qemu-devel
On 28/07/21 13:37, Lara Lazier wrote:
> + if (virtual_gif_enabled(env, int_ctl) && likely(env->hflags & HF_GUEST_MASK)) {
> + x86_stl_phys(cs, env->vm_vmcb + offsetof(struct vmcb, control.int_ctl),
> + int_ctl | V_GIF_MASK);
> + } else {
I would put the HF_GUEST_MASK check in virtual_gif_enabled.
In fact, the more logical order for the three checks is:
- am I in guest mode? (if not, the VMCB and thus int_ctl is unused)
- is the CPUID bit set? (if not, bit 9 has no effect)
- is bit 9 of int_ctl set?
Thanks,
Paolo
^ permalink raw reply [flat|nested] 3+ messages in thread
* Re: [PATCH v2] target/i386: Added VGIF feature
2021-07-28 11:37 [PATCH v2] target/i386: Added VGIF feature Lara Lazier
2021-07-29 7:59 ` Paolo Bonzini
@ 2021-07-29 8:01 ` Paolo Bonzini
1 sibling, 0 replies; 3+ messages in thread
From: Paolo Bonzini @ 2021-07-29 8:01 UTC (permalink / raw)
To: Lara Lazier, qemu-devel
On 28/07/21 13:37, Lara Lazier wrote:
> + uint32_t int_ctl = x86_ldl_phys(cs,
> + env->vm_vmcb + offsetof(struct vmcb, control.int_ctl));
> + if (virtual_gif_enabled(env, int_ctl) && likely(env->hflags & HF_GUEST_MASK)) {
> + x86_stl_phys(cs, env->vm_vmcb + offsetof(struct vmcb, control.int_ctl),
> + int_ctl & ~V_GIF_MASK);
> + } else {
Sorry for the double reply. env->vm_vmcb is not guaranteed to be valid
if not in guest mode, so there are two possibilities.
1) Keep the HF_GUEST_MASK check directly in the helpers, but do it
before x86_ldl_phys
2) Move x86_ldl_phys to virtual_gif_enabled, with a prototype like
bool virtual_gif_enabled(CPUX86State *env, uint32_t *int_ctl)
i.e. returning int_ctl from virtual_gif_enabled via pass-by-reference.
Thanks,
Paolo
^ permalink raw reply [flat|nested] 3+ messages in thread
end of thread, other threads:[~2021-07-29 8:02 UTC | newest]
Thread overview: 3+ messages (download: mbox.gz / follow: Atom feed)
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2021-07-28 11:37 [PATCH v2] target/i386: Added VGIF feature Lara Lazier
2021-07-29 7:59 ` Paolo Bonzini
2021-07-29 8:01 ` Paolo Bonzini
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