From mboxrd@z Thu Jan  1 00:00:00 1970
From: Marek Vasut <marex@denx.de>
Date: Fri, 5 May 2017 13:14:19 +0200
Subject: [U-Boot] [PATCH 6/7] arm: socfpga: Add Arria10 FPGA manager
 program assembly driver
In-Reply-To: <1493979992-7584-7-git-send-email-tien.fong.chee@intel.com>
References: <1493979992-7584-1-git-send-email-tien.fong.chee@intel.com>
 <1493979992-7584-7-git-send-email-tien.fong.chee@intel.com>
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On 05/05/2017 12:26 PM, tien.fong.chee at intel.com wrote:
> From: Tien Fong Chee <tien.fong.chee@intel.com>
> 
> Adding the Arria10 FPGA manager program assembly driver which can be used
> to feed bitstream into FPGA manager for configuring FPGA.
> 
> Signed-off-by: Tien Fong Chee <tien.fong.chee@intel.com>
> ---
>  arch/arm/mach-socfpga/Makefile        |    1 +
>  arch/arm/mach-socfpga/lowlevel_init.S |   48 +++++++++++++++++++++++++++++++++
>  2 files changed, 49 insertions(+), 0 deletions(-)
>  create mode 100644 arch/arm/mach-socfpga/lowlevel_init.S
> 
> diff --git a/arch/arm/mach-socfpga/Makefile b/arch/arm/mach-socfpga/Makefile
> index 824cd8e..8b86dc7 100644
> --- a/arch/arm/mach-socfpga/Makefile
> +++ b/arch/arm/mach-socfpga/Makefile
> @@ -24,6 +24,7 @@ endif
>  
>  ifdef CONFIG_TARGET_SOCFPGA_ARRIA10
>  obj-y	+= clock_manager_arria10.o
> +obj-y	+= lowlevel_init.o
>  obj-y	+= misc_arria10.o
>  obj-y	+= pinmux_arria10.o
>  obj-y	+= reset_manager_arria10.o
> diff --git a/arch/arm/mach-socfpga/lowlevel_init.S b/arch/arm/mach-socfpga/lowlevel_init.S
> new file mode 100644
> index 0000000..79e9d07
> --- /dev/null
> +++ b/arch/arm/mach-socfpga/lowlevel_init.S
> @@ -0,0 +1,48 @@
> +/*
> + * Copyright (C) 2017 Intel Corporation <www.intel.com>
> + *
> + * SPDX-License-Identifier:    GPL-2.0
> + */
> +
> +#include <asm-offsets.h>
> +#include <config.h>
> +#include <linux/linkage.h>
> +
> +/*
> + * Write RBF data in burst form to FPGA Manager
> + * [r0] RBF binary source address
> + * [r1] FPGA Manager data address
> + * [r2] RBF data length
> + */

We do the same for Gen5 in C code with a bit of assembly, so do the same.

> +ENTRY(fpgamgr_axi_write)
> +	PUSH    {r4-r11, lr}            /* save registers per AAPCS */
> +
> +write_burst:
> +	cmp     r2,#32
> +	beq     write_burst_cont
> +	bls     write_word
> +write_burst_cont:
> +	ldmia   r0!, {r4-r11}
> +	stmia   r1, {r4-r11}
> +	subs    r2, r2, #32
> +	b       write_burst
> +
> +write_word:
> +	cmp     r2,#4
> +	beq     write_word_cont
> +	bls     write_byte
> +write_word_cont:
> +	ldmia   r0!, {r4}
> +	stmia   r1, {r4}
> +	subs    r2, r2, #4
> +	b       write_word
> +
> +write_byte:
> +	cmp     r2,#0
> +	beq     write_end
> +	ldr     r3, [r0]
> +	str     r3, [r1]
> +write_end:
> +	POP     {r4-r11, pc}
> +ENDPROC(fpgamgr_axi_write)
> 


-- 
Best regards,
Marek Vasut