Re: [PATCH v2 1/1] spi: pxa2xx: Default thresholds to PXA configuration

[Jarkko Nikula <jarkko.nikula-VuQAYsv1563Yd54FQh9/CA@public.gmane.org>]

On 09/07/2016 04:11 AM, Andy Shevchenko wrote:
> Most of the devices in the supported list have PXA configuration of FIFO. In
> particularly Intel Merrifield has bigger FIFO, than it's defined for CE4100.
>
> Split CE4100 in the similar way how it was done for Intel Quark, i.e. prefix
> definitions by CE4100 and append necessary pieces of code to switch case
> conditions.
>
> Cc: Jarkko Nikula <jarkko.nikula-VuQAYsv1563Yd54FQh9/CA@public.gmane.org>
> Signed-off-by: Andy Shevchenko <andriy.shevchenko-VuQAYsv1563Yd54FQh9/CA@public.gmane.org>
> ---
> - convert SSCR1_CHANGE_MASK as well
>
>  drivers/spi/spi-pxa2xx.c   | 47 +++++++++++++++++++++++++++++++++++++++++-----
>  include/linux/pxa2xx_ssp.h | 20 ++++++++------------
>  2 files changed, 50 insertions(+), 17 deletions(-)
>
...
> -#ifdef CONFIG_ARCH_PXA
>  #define RX_THRESH_DFLT	8
>  #define TX_THRESH_DFLT	8
>
Does this removal and

> @@ -95,19 +94,16 @@
>  #define SSCR1_RFT	(0x00003c00)	/* Receive FIFO Threshold (mask) */
>  #define SSCR1_RxTresh(x) (((x) - 1) << 10) /* level [1..16] */
>
> -#else
> -
> -#define RX_THRESH_DFLT	2
> -#define TX_THRESH_DFLT	2
> +#define RX_THRESH_CE4100_DFLT	2
> +#define TX_THRESH_CE4100_DFLT	2
>
> -#define SSSR_TFL_MASK	(0x3 << 8)	/* Transmit FIFO Level mask */
> -#define SSSR_RFL_MASK	(0x3 << 12)	/* Receive FIFO Level mask */
> +#define CE4100_SSSR_TFL_MASK	(0x3 << 8)	/* Transmit FIFO Level mask */
> +#define CE4100_SSSR_RFL_MASK	(0x3 << 12)	/* Receive FIFO Level mask */
>
> -#define SSCR1_TFT	(0x000000c0)	/* Transmit FIFO Threshold (mask) */
> -#define SSCR1_TxTresh(x) (((x) - 1) << 6) /* level [1..4] */
> -#define SSCR1_RFT	(0x00000c00)	/* Receive FIFO Threshold (mask) */
> -#define SSCR1_RxTresh(x) (((x) - 1) << 10) /* level [1..4] */
> -#endif

these actually break other x86 platforms than CE4100 since thresholds, 
SSSR and SSCR1 definitions are different between PXA and others?

-- 
Jarkko
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