Re: [PATCH v4 1/3] target/arm: Add support for FEAT_TLBIRANGE

[Rebecca Cran <rebecca@nuviainc.com>]

On 3/16/21 12:09 PM, Richard Henderson wrote:
> On 3/16/21 9:49 AM, Rebecca Cran wrote:
>> +    for (page = addr; page < (addr + length); page += 
>> TARGET_PAGE_SIZE) {
> 
> This test means that it's impossible to flush the last page of the 
> address space (addr + length == 0).  I think better to do
> 
>    for (l = 0; l < length; l += TARGET_PAGE_SIZE)
>        page = addr + l;
>        ...
> 
>> +        for (mmu_idx = 0; mmu_idx < NB_MMU_MODES; mmu_idx++) {
>> +            if ((idxmap >> mmu_idx) & 1) {
>> +                tlb_flush_page_bits_locked(env, mmu_idx, page, bits);
> 
> Hmm.  I'm not keen on this.  You're not able to notice the special cases 
> within, where we flush the entire tlb -- and therefore you do not need 
> to continue the outer loop for this mmuidx.

Would you be happy to have tlb_flush_page_bits_locked updated to return 
a bool, indicating if an entire flush has been done?

> The cputlb changes should have remained a separate patch.

Ok, I'll split it out.

-- 
Rebecca Cran