All of lore.kernel.org
 help / color / mirror / Atom feed
From: Daniel Henrique Barboza <danielhb413@gmail.com>
To: "Cédric Le Goater" <clg@kaod.org>, qemu-ppc@nongnu.org
Cc: qemu-devel@nongnu.org, BALATON Zoltan <balaton@eik.bme.hu>
Subject: Re: [PATCH v2 15/20] ppc/ppc405: QOM'ify PLB
Date: Wed, 3 Aug 2022 20:38:57 -0300	[thread overview]
Message-ID: <1e5f2017-313d-0613-c5a7-dbd520cff85d@gmail.com> (raw)
In-Reply-To: <20220803132844.2370514-16-clg@kaod.org>



On 8/3/22 10:28, Cédric Le Goater wrote:
> Reviewed-by: Daniel Henrique Barboza <danielhb413@gmail.com>
> Signed-off-by: Cédric Le Goater <clg@kaod.org>
> ---
>   hw/ppc/ppc405.h    | 14 ++++++++++
>   hw/ppc/ppc405_uc.c | 67 +++++++++++++++++++++++++++++++++-------------
>   2 files changed, 62 insertions(+), 19 deletions(-)
> 
> diff --git a/hw/ppc/ppc405.h b/hw/ppc/ppc405.h
> index 8acb90427596..8ca32f35ce67 100644
> --- a/hw/ppc/ppc405.h
> +++ b/hw/ppc/ppc405.h
> @@ -65,6 +65,19 @@ struct ppc4xx_bd_info_t {
>   
>   typedef struct Ppc405SoCState Ppc405SoCState;
>   
> +/* Peripheral local bus arbitrer */
> +#define TYPE_PPC405_PLB "ppc405-plb"
> +OBJECT_DECLARE_SIMPLE_TYPE(Ppc405PlbState, PPC405_PLB);
> +struct Ppc405PlbState {
> +    DeviceState parent_obj;
> +
> +    PowerPCCPU *cpu;
> +
> +    uint32_t acr;
> +    uint32_t bear;
> +    uint32_t besr;
> +};
> +
>   /* PLB to OPB bridge */
>   #define TYPE_PPC405_POB "ppc405-pob"
>   OBJECT_DECLARE_SIMPLE_TYPE(Ppc405PobState, PPC405_POB);
> @@ -245,6 +258,7 @@ struct Ppc405SoCState {
>       Ppc405EbcState ebc;
>       Ppc405OpbaState opba;
>       Ppc405PobState pob;
> +    Ppc405PlbState plb;
>   };
>   
>   /* PowerPC 405 core */
> diff --git a/hw/ppc/ppc405_uc.c b/hw/ppc/ppc405_uc.c
> index ca214ee4d741..9bbd524ad5ea 100644
> --- a/hw/ppc/ppc405_uc.c
> +++ b/hw/ppc/ppc405_uc.c
> @@ -148,19 +148,11 @@ enum {
>       PLB4A1_ACR = 0x089,
>   };
>   
> -typedef struct ppc4xx_plb_t ppc4xx_plb_t;
> -struct ppc4xx_plb_t {
> -    uint32_t acr;
> -    uint32_t bear;
> -    uint32_t besr;
> -};
> -
>   static uint32_t dcr_read_plb (void *opaque, int dcrn)
>   {
> -    ppc4xx_plb_t *plb;
> +    Ppc405PlbState *plb = PPC405_PLB(opaque);
>       uint32_t ret;
>   
> -    plb = opaque;
>       switch (dcrn) {
>       case PLB0_ACR:
>           ret = plb->acr;
> @@ -182,9 +174,8 @@ static uint32_t dcr_read_plb (void *opaque, int dcrn)
>   
>   static void dcr_write_plb (void *opaque, int dcrn, uint32_t val)
>   {
> -    ppc4xx_plb_t *plb;
> +    Ppc405PlbState *plb = PPC405_PLB(opaque);
>   
> -    plb = opaque;
>       switch (dcrn) {
>       case PLB0_ACR:
>           /* We don't care about the actual parameters written as
> @@ -202,28 +193,55 @@ static void dcr_write_plb (void *opaque, int dcrn, uint32_t val)
>       }
>   }
>   
> -static void ppc4xx_plb_reset (void *opaque)
> +static void ppc405_plb_reset(DeviceState *dev)
>   {
> -    ppc4xx_plb_t *plb;
> +    Ppc405PlbState *plb = PPC405_PLB(dev);
>   
> -    plb = opaque;
>       plb->acr = 0x00000000;
>       plb->bear = 0x00000000;
>       plb->besr = 0x00000000;
>   }
>   
> -void ppc4xx_plb_init(CPUPPCState *env)
> +static void ppc405_plb_realize(DeviceState *dev, Error **errp)
>   {
> -    ppc4xx_plb_t *plb;
> +    Ppc405PlbState *plb = PPC405_PLB(dev);
> +    CPUPPCState *env;
> +
> +    assert(plb->cpu);
> +
> +    env = &plb->cpu->env;
>   
> -    plb = g_new0(ppc4xx_plb_t, 1);
>       ppc_dcr_register(env, PLB3A0_ACR, plb, &dcr_read_plb, &dcr_write_plb);
>       ppc_dcr_register(env, PLB4A0_ACR, plb, &dcr_read_plb, &dcr_write_plb);
>       ppc_dcr_register(env, PLB0_ACR, plb, &dcr_read_plb, &dcr_write_plb);
>       ppc_dcr_register(env, PLB0_BEAR, plb, &dcr_read_plb, &dcr_write_plb);
>       ppc_dcr_register(env, PLB0_BESR, plb, &dcr_read_plb, &dcr_write_plb);
>       ppc_dcr_register(env, PLB4A1_ACR, plb, &dcr_read_plb, &dcr_write_plb);
> -    qemu_register_reset(ppc4xx_plb_reset, plb);
> +}
> +
> +static Property ppc405_plb_properties[] = {
> +    DEFINE_PROP_LINK("cpu", Ppc405PlbState, cpu, TYPE_POWERPC_CPU,
> +                     PowerPCCPU *),
> +    DEFINE_PROP_END_OF_LIST(),
> +};
> +
> +static void ppc405_plb_class_init(ObjectClass *oc, void *data)
> +{
> +    DeviceClass *dc = DEVICE_CLASS(oc);
> +
> +    dc->realize = ppc405_plb_realize;
> +    dc->user_creatable = false;
> +    dc->reset = ppc405_plb_reset;
> +    device_class_set_props(dc, ppc405_plb_properties);
> +}
> +
> +void ppc4xx_plb_init(CPUPPCState *env)
> +{
> +    PowerPCCPU *cpu = env_archcpu(env);
> +    DeviceState *dev = qdev_new(TYPE_PPC405_EBC);
> +
> +    object_property_set_link(OBJECT(cpu), "cpu", OBJECT(dev), &error_abort);

This causes the same problem that happened in patch 12:


$ ./qemu-system-ppc64 -display none -M sam460ex
Unexpected error in object_property_find_err() at ../qom/object.c:1304:
qemu-system-ppc64: Property '460exb-powerpc64-cpu.cpu' not found
Aborted (core dumped)


The same fix applies here as well:


$ git diff
diff --git a/hw/ppc/ppc405_uc.c b/hw/ppc/ppc405_uc.c
index dd3c05a28b..fd53cf38e5 100644
--- a/hw/ppc/ppc405_uc.c
+++ b/hw/ppc/ppc405_uc.c
@@ -240,7 +240,7 @@ void ppc4xx_plb_init(CPUPPCState *env)
      PowerPCCPU *cpu = env_archcpu(env);
      DeviceState *dev = qdev_new(TYPE_PPC405_EBC);
  
-    object_property_set_link(OBJECT(cpu), "cpu", OBJECT(dev), &error_abort);
+    object_property_set_link(OBJECT(dev), "cpu", OBJECT(cpu), &error_abort);
      qdev_realize_and_unref(dev, NULL, &error_fatal);
  }
  

Daniel


> +    qdev_realize_and_unref(dev, NULL, &error_fatal);
>   }
>   
>   /*****************************************************************************/
> @@ -1446,6 +1464,8 @@ static void ppc405_soc_instance_init(Object *obj)
>       object_initialize_child(obj, "opba", &s->opba, TYPE_PPC405_OPBA);
>   
>       object_initialize_child(obj, "pob", &s->pob, TYPE_PPC405_POB);
> +
> +    object_initialize_child(obj, "plb", &s->plb, TYPE_PPC405_PLB);
>   }
>   
>   static void ppc405_soc_realize(DeviceState *dev, Error **errp)
> @@ -1484,7 +1504,11 @@ static void ppc405_soc_realize(DeviceState *dev, Error **errp)
>       }
>   
>       /* PLB arbitrer */
> -    ppc4xx_plb_init(env);
> +    object_property_set_link(OBJECT(&s->plb), "cpu", OBJECT(&s->cpu),
> +                             &error_abort);
> +    if (!qdev_realize(DEVICE(&s->plb), NULL, errp)) {
> +        return;
> +    }
>   
>       /* PLB to OPB bridge */
>       object_property_set_link(OBJECT(&s->pob), "cpu", OBJECT(&s->cpu),
> @@ -1615,6 +1639,11 @@ static void ppc405_soc_class_init(ObjectClass *oc, void *data)
>   
>   static const TypeInfo ppc405_types[] = {
>       {
> +        .name           = TYPE_PPC405_PLB,
> +        .parent         = TYPE_DEVICE,
> +        .instance_size  = sizeof(Ppc405PlbState),
> +        .class_init     = ppc405_plb_class_init,
> +    }, {
>           .name           = TYPE_PPC405_POB,
>           .parent         = TYPE_DEVICE,
>           .instance_size  = sizeof(Ppc405PobState),


  reply	other threads:[~2022-08-03 23:40 UTC|newest]

Thread overview: 61+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-08-03 13:28 [PATCH v2 00/20] ppc: QOM'ify 405 board Cédric Le Goater
2022-08-03 13:28 ` [PATCH v2 01/20] ppc/ppc405: Remove taihu machine Cédric Le Goater
2022-08-03 17:16   ` Daniel Henrique Barboza
2022-08-03 13:28 ` [PATCH v2 02/20] ppc/ppc405: Introduce a PPC405 generic machine Cédric Le Goater
2022-08-03 17:03   ` BALATON Zoltan
2022-08-03 17:35     ` Daniel Henrique Barboza
2022-08-03 22:07   ` BALATON Zoltan
2022-08-04  5:40     ` Cédric Le Goater
2022-08-03 13:28 ` [PATCH v2 03/20] ppc/ppc405: Move devices under the ref405ep machine Cédric Le Goater
2022-08-03 13:28 ` [PATCH v2 04/20] ppc/ppc405: Introduce a PPC405 SoC Cédric Le Goater
2022-08-03 22:13   ` BALATON Zoltan
2022-08-03 13:28 ` [PATCH v2 05/20] ppc/ppc405: Start QOMification of the SoC Cédric Le Goater
2022-08-03 22:23   ` BALATON Zoltan
2022-08-04  6:00     ` Cédric Le Goater
2022-08-03 13:28 ` [PATCH v2 06/20] ppc/ppc405: QOM'ify CPU Cédric Le Goater
2022-08-03 13:28 ` [PATCH v2 07/20] ppc/ppc405: QOM'ify CPC Cédric Le Goater
2022-08-03 17:16   ` BALATON Zoltan
2022-08-04  5:09     ` Cédric Le Goater
2022-08-03 13:28 ` [PATCH v2 08/20] ppc/ppc405: QOM'ify GPT Cédric Le Goater
2022-08-03 13:28 ` [PATCH v2 09/20] ppc/ppc405: QOM'ify OCM Cédric Le Goater
2022-08-03 13:28 ` [PATCH v2 10/20] ppc/ppc405: QOM'ify GPIO Cédric Le Goater
2022-08-03 13:28 ` [PATCH v2 11/20] ppc/ppc405: QOM'ify DMA Cédric Le Goater
2022-08-03 13:28 ` [PATCH v2 12/20] ppc/ppc405: QOM'ify EBC Cédric Le Goater
2022-08-03 23:04   ` BALATON Zoltan
2022-08-04  7:55     ` Mark Cave-Ayland
2022-08-04 10:58       ` BALATON Zoltan
2022-08-03 23:36   ` Daniel Henrique Barboza
2022-08-04  5:14     ` Cédric Le Goater
2022-08-04 12:09       ` BALATON Zoltan
2022-08-04 16:21         ` Cédric Le Goater
     [not found]         ` <3b1bc6c5-a363-0a42-f0dc-eafc14376fe2@kaod.org>
     [not found]           ` <1e6be2f3-4c7a-2432-5034-fa012c662df@eik.bme.hu>
2022-08-04 16:31             ` Cédric Le Goater
2022-08-04 18:00               ` BALATON Zoltan
2022-08-04 18:18                 ` Peter Maydell
2022-08-04 19:26                   ` BALATON Zoltan
2022-08-05  7:07                     ` Cédric Le Goater
2022-08-05 12:55                       ` BALATON Zoltan
2022-08-05 13:16                         ` Peter Maydell
2022-08-05 16:50                           ` BALATON Zoltan
2022-08-05 16:55                             ` Peter Maydell
2022-08-05 17:03                               ` BALATON Zoltan
2022-08-05 19:15                                 ` BALATON Zoltan
2022-08-06  9:38                                 ` BALATON Zoltan
2022-08-08  6:42                                   ` Cédric Le Goater
2022-08-03 13:28 ` [PATCH v2 13/20] ppc/ppc405: QOM'ify OPBA Cédric Le Goater
2022-08-03 13:28 ` [PATCH v2 14/20] ppc/ppc405: QOM'ify POB Cédric Le Goater
2022-08-03 13:28 ` [PATCH v2 15/20] ppc/ppc405: QOM'ify PLB Cédric Le Goater
2022-08-03 23:38   ` Daniel Henrique Barboza [this message]
2022-08-03 13:28 ` [PATCH v2 16/20] ppc/ppc405: QOM'ify MAL Cédric Le Goater
2022-08-03 23:45   ` Daniel Henrique Barboza
2022-08-03 13:28 ` [PATCH v2 17/20] ppc/ppc405: QOM'ify FPGA Cédric Le Goater
2022-08-03 13:28 ` [PATCH v2 18/20] ppc/ppc405: QOM'ify UIC Cédric Le Goater
2022-08-03 23:26   ` BALATON Zoltan
2022-08-03 13:28 ` [PATCH v2 19/20] ppc/ppc405: QOM'ify I2C Cédric Le Goater
2022-08-03 23:31   ` BALATON Zoltan
2022-08-04  5:42     ` Cédric Le Goater
2022-08-04 11:21       ` BALATON Zoltan
2022-08-04 14:14         ` Cédric Le Goater
2022-08-03 13:28 ` [PATCH v2 20/20] ppc/ppc4xx: Fix sdram trace events Cédric Le Goater
2022-08-04  6:07 ` [PATCH v2 00/20] ppc: QOM'ify 405 board Cédric Le Goater
2022-08-04 10:07   ` Daniel Henrique Barboza
2022-08-04 12:26     ` Cédric Le Goater

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=1e5f2017-313d-0613-c5a7-dbd520cff85d@gmail.com \
    --to=danielhb413@gmail.com \
    --cc=balaton@eik.bme.hu \
    --cc=clg@kaod.org \
    --cc=qemu-devel@nongnu.org \
    --cc=qemu-ppc@nongnu.org \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.