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Fri, 22 May 2020 17:46:17 +0000 Subject: RE: [PATCH v3 07/10] x86/resctrl: Add arch_needs_linear to explain AMD/Intel MBA difference To: James Morse , "x86@kernel.org" , "linux-kernel@vger.kernel.org" Cc: Fenghua Yu , Reinette Chatre , Thomas Gleixner , Ingo Molnar , Borislav Petkov , H Peter Anvin References: <20200518131924.7741-1-james.morse@arm.com> <20200518131924.7741-8-james.morse@arm.com> From: Babu Moger Message-ID: <1eb6e476-9fe9-db84-693e-99b13d6d9102@amd.com> Date: Fri, 22 May 2020 12:46:15 -0500 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:68.0) Gecko/20100101 Thunderbird/68.7.0 In-Reply-To: <20200518131924.7741-8-james.morse@arm.com> Content-Type: text/plain; charset=windows-1252 Content-Language: en-US Content-Transfer-Encoding: 7bit X-ClientProxiedBy: DM5PR1401CA0015.namprd14.prod.outlook.com (2603:10b6:4:4a::25) To SN1PR12MB2560.namprd12.prod.outlook.com (2603:10b6:802:26::19) MIME-Version: 1.0 X-MS-Exchange-MessageSentRepresentingType: 1 Received: from [10.236.30.87] (165.204.77.1) by DM5PR1401CA0015.namprd14.prod.outlook.com (2603:10b6:4:4a::25) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.3021.23 via Frontend Transport; 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X-MS-Exchange-AntiSpam-MessageData: RiVgJoHs4KdabKfv1K+JhXcBRI46+L50PnFK9hXGRCuDO2sSq5hZ3/4LWWXdiFM8Dtbeirai6GJYskr5OkjqbwxJrJhGQTz0tYD1pMtjmRi8Agoo+kzfmVckG03mh3nH6zqWcGqVBEq2GDIvPp1GSN5iKS8BehD5zJ9fwJ3JAlDsUNErk/+c5S2oSn8SwvJayk1WaiqO+HkjP1l9MRUzQ9ipShHJ/kgbRsebDJ42425gDrH0ZcrOh9oXLQAeLuh5+8JT3xT38yVfb0y7VTyZGpjH7ZKO3n/RSxIsYmB/REk7FmSptGxyQHWUkge0Y5VckiqbWQQ2OYGlGFyJ/SJOGPpny9Zu++wzxWjt02lJKJy7roL+wiDUEZYkG08VGuK9tS/bsWxWf41PXw3UBjHwtudPnWLcFWpCkqIwOAoZUtsk2Zl/Fa+zrrjefvCoabe6IPFNNYa+9TQ00aIxRotsL2ewoDUDeRX4uK2Inv7hyTo= X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-Network-Message-Id: af668567-d4a2-41cf-1172-08d7fe780751 X-MS-Exchange-CrossTenant-OriginalArrivalTime: 22 May 2020 17:46:17.6124 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-MailboxType: HOSTED X-MS-Exchange-CrossTenant-UserPrincipalName: /zf10epzbmd1ARkucofRCObGZfVrPcS4Q/JcBaOwBt+GVlE7X/4t8QXU3rUUTHKc X-MS-Exchange-Transport-CrossTenantHeadersStamped: SN1PR12MB2382 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Looks good. > -----Original Message----- > From: James Morse > Sent: Monday, May 18, 2020 8:19 AM > To: x86@kernel.org; linux-kernel@vger.kernel.org > Cc: Fenghua Yu ; Reinette Chatre > ; Thomas Gleixner ; Ingo > Molnar ; Borislav Petkov ; H Peter Anvin > ; Moger, Babu ; James Morse > > Subject: [PATCH v3 07/10] x86/resctrl: Add arch_needs_linear to explain > AMD/Intel MBA difference > > The configuration values user-space provides to the resctrl filesystem > are ABI. To make this work on another architecture we want to move all > the ABI bits out of /arch/x86 and under /fs. > > To do this, the differences between AMD and Intel CPUs needs to be > explained to resctrl via resource properties, instead of function > pointers that let the arch code accept subtly different values on > different platforms/architectures. > > For MBA, Intel CPUs reject configuration attempts for non-linear > resources, whereas AMD ignore this field as its MBA resource is never > linear. To merge the parse/validate functions we need to explain > this difference. > > Add arch_needs_linear to indicate the arch code needs the linear > property to be true to configure this resource. AMD can set this > and delay_linear to false. Intel can set arch_needs_linear > to true to keep the existing "No support for non-linear MB domains" > error message for affected platforms. > > CC: Babu Moger > Signed-off-by: James Morse > Reviewed-by: Reinette Chatre Reviewed-by: Babu Moger > > --- > An alternative to this is for Intel non-linear MBA resources to > clear alloc_capable as they can't be configured anyway. > --- > arch/x86/kernel/cpu/resctrl/core.c | 3 +++ > arch/x86/kernel/cpu/resctrl/ctrlmondata.c | 8 +++++++- > arch/x86/kernel/cpu/resctrl/internal.h | 2 ++ > 3 files changed, 12 insertions(+), 1 deletion(-) > > diff --git a/arch/x86/kernel/cpu/resctrl/core.c > b/arch/x86/kernel/cpu/resctrl/core.c > index e1fed3928b59..c6b73b0ee070 100644 > --- a/arch/x86/kernel/cpu/resctrl/core.c > +++ b/arch/x86/kernel/cpu/resctrl/core.c > @@ -260,6 +260,7 @@ static bool __get_mem_config_intel(struct rdt_resource > *r) > r->num_closid = edx.split.cos_max + 1; > max_delay = eax.split.max_delay + 1; > r->default_ctrl = MAX_MBA_BW; > + r->membw.arch_needs_linear = true; > if (ecx & MBA_IS_LINEAR) { > r->membw.delay_linear = true; > r->membw.min_bw = MAX_MBA_BW - max_delay; > @@ -267,6 +268,7 @@ static bool __get_mem_config_intel(struct rdt_resource > *r) > } else { > if (!rdt_get_mb_table(r)) > return false; > + r->membw.arch_needs_linear = false; > } > r->data_width = 3; > > @@ -288,6 +290,7 @@ static bool __rdt_get_mem_config_amd(struct > rdt_resource *r) > > /* AMD does not use delay */ > r->membw.delay_linear = false; > + r->membw.arch_needs_linear = false; > > r->membw.min_bw = 0; > r->membw.bw_gran = 1; > diff --git a/arch/x86/kernel/cpu/resctrl/ctrlmondata.c > b/arch/x86/kernel/cpu/resctrl/ctrlmondata.c > index 934c8fb8a64a..e3bcd77add2b 100644 > --- a/arch/x86/kernel/cpu/resctrl/ctrlmondata.c > +++ b/arch/x86/kernel/cpu/resctrl/ctrlmondata.c > @@ -33,6 +33,12 @@ static bool bw_validate_amd(char *buf, unsigned long > *data, > unsigned long bw; > int ret; > > + /* temporary: always false on AMD */ > + if (!r->membw.delay_linear && r->membw.arch_needs_linear) { > + rdt_last_cmd_puts("No support for non-linear MB domains\n"); > + return false; > + } > + > ret = kstrtoul(buf, 10, &bw); > if (ret) { > rdt_last_cmd_printf("Non-decimal digit in MB value %s\n", buf); > @@ -82,7 +88,7 @@ static bool bw_validate(char *buf, unsigned long *data, > struct rdt_resource *r) > /* > * Only linear delay values is supported for current Intel SKUs. > */ > - if (!r->membw.delay_linear) { > + if (!r->membw.delay_linear && r->membw.arch_needs_linear) { > rdt_last_cmd_puts("No support for non-linear MB domains\n"); > return false; > } > diff --git a/arch/x86/kernel/cpu/resctrl/internal.h > b/arch/x86/kernel/cpu/resctrl/internal.h > index dd51e23e346b..0b288b6fefd9 100644 > --- a/arch/x86/kernel/cpu/resctrl/internal.h > +++ b/arch/x86/kernel/cpu/resctrl/internal.h > @@ -370,6 +370,7 @@ struct rdt_cache { > * struct rdt_membw - Memory bandwidth allocation related data > * @min_bw: Minimum memory bandwidth percentage user can > request > * @bw_gran: Granularity at which the memory bandwidth is allocated > + * @arch_needs_linear: True if we can't configure non-linear resources > * @delay_linear: True if memory B/W delay is in linear scale > * @mba_sc: True if MBA software controller(mba_sc) is enabled > * @mb_map: Mapping of memory B/W percentage to memory B/W > delay > @@ -378,6 +379,7 @@ struct rdt_membw { > u32 min_bw; > u32 bw_gran; > u32 delay_linear; > + bool arch_needs_linear; > bool mba_sc; > u32 *mb_map; > }; > -- > 2.19.1