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From: Tvrtko Ursulin <tvrtko.ursulin@linux.intel.com>
To: Chris Wilson <chris@chris-wilson.co.uk>, intel-gfx@lists.freedesktop.org
Subject: Re: [Intel-gfx] [PATCH v2] drm/i915: Check for awaits on still currently executing requests
Date: Fri, 29 May 2020 17:01:55 +0100	[thread overview]
Message-ID: <1ecf4b4c-49fa-5356-7329-0a29a33322df@linux.intel.com> (raw)
In-Reply-To: <20200529143926.3245-1-chris@chris-wilson.co.uk>


On 29/05/2020 15:39, Chris Wilson wrote:
> With the advent of preempt-to-busy, a request may still be on the GPU as
> we unwind. And in the case of a unpreemptible [due to HW] request, that
> request will remain indefinitely on the GPU even though we have
> returned it back to our submission queue, and cleared the active bit.
> 
> We only run the execution callbacks on transferring the request from our
> submission queue to the execution queue, but if this is a bonded request
> that the HW is waiting for, we will not submit it (as we wait for a
> fresh execution) even though it is still being executed.
> 
> As we know that there are always preemption points between requests, we
> know that only the currently executing request may be still active even
> though we have cleared the flag. However, we do not precisely know which
> request is in ELSP[0] due to a delay in processing events, and
> furthermore we only store the last request in a context in our state
> tracker.
> 
> Fixes: 22b7a426bbe1 ("drm/i915/execlists: Preempt-to-busy")
> Testcase: igt/gem_exec_balancer/bonded-dual
> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
> Cc: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
> ---
>   drivers/gpu/drm/i915/i915_request.c | 49 ++++++++++++++++++++++++++++-
>   1 file changed, 48 insertions(+), 1 deletion(-)
> 
> diff --git a/drivers/gpu/drm/i915/i915_request.c b/drivers/gpu/drm/i915/i915_request.c
> index e5aba6824e26..c5d7220de529 100644
> --- a/drivers/gpu/drm/i915/i915_request.c
> +++ b/drivers/gpu/drm/i915/i915_request.c
> @@ -363,6 +363,53 @@ static void __llist_add(struct llist_node *node, struct llist_head *head)
>   	head->first = node;
>   }
>   
> +static struct i915_request * const *
> +__engine_active(struct intel_engine_cs *engine)
> +{
> +	return READ_ONCE(engine->execlists.active);
> +}
> +
> +static bool __request_in_flight(const struct i915_request *signal)
> +{
> +	struct i915_request * const *port, *rq;
> +	bool inflight = false;
> +
> +	if (!i915_request_is_ready(signal))
> +		return false;
> +
> +	/*
> +	 * Even if we have unwound the request, it may still be on
> +	 * the GPU (preempt-to-busy). If that request is inside an
> +	 * unpreemptible critical section, it will not be removed. Some
> +	 * GPU functions may even be stuck waiting for the paired request
> +	 * (__await_execution) to be submitted and cannot be preempted
> +	 * until the bond is executing.
> +	 *
> +	 * As we know that there are always preemption points between
> +	 * requests, we know that only the currently executing request
> +	 * may be still active even though we have cleared the flag.
> +	 * However, we can't rely on our tracking of ELSP[0] to known
> +	 * which request is currently active and so maybe stuck, as
> +	 * the tracking maybe an event behind. Instead assume that
> +	 * if the context is still inflight, then it is still active
> +	 * even if the active flag has been cleared.
> +	 */
> +	if (!intel_context_inflight(signal->context))
> +		return false;
> +
> +	rcu_read_lock();
> +	for (port = __engine_active(signal->engine); (rq = *port); port++) {
> +		if (rq->context == signal->context) {
> +			inflight = i915_seqno_passed(rq->fence.seqno,
> +						     signal->fence.seqno);
> +			break;
> +		}
> +	}
> +	rcu_read_unlock();
> +
> +	return inflight;
> +}
> +
>   static int
>   __await_execution(struct i915_request *rq,
>   		  struct i915_request *signal,
> @@ -393,7 +440,7 @@ __await_execution(struct i915_request *rq,
>   	}
>   
>   	spin_lock_irq(&signal->lock);
> -	if (i915_request_is_active(signal)) {
> +	if (i915_request_is_active(signal) || __request_in_flight(signal)) {
>   		if (hook) {
>   			hook(rq, &signal->fence);
>   			i915_request_put(signal);
> 

Reviewed-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>

Regards,

Tvrtko
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  reply	other threads:[~2020-05-29 16:02 UTC|newest]

Thread overview: 20+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-05-29  8:58 [Intel-gfx] [PATCH 1/2] drm/i915: Add a few asserts around handling of i915_request_is_active() Chris Wilson
2020-05-29  8:58 ` [Intel-gfx] [PATCH 2/2] drm/i915: Once executed, always executed Chris Wilson
2020-05-29 10:09   ` [Intel-gfx] [PATCH v2] drm/i915: Check for awaits on still currently executing requests Chris Wilson
2020-05-29 10:17   ` [Intel-gfx] [PATCH v3] " Chris Wilson
2020-05-29 12:28   ` [Intel-gfx] [PATCH v4] " Chris Wilson
2020-05-29 14:03     ` Chris Wilson
2020-05-29 14:39     ` [Intel-gfx] [PATCH v2] " Chris Wilson
2020-05-29 16:01       ` Tvrtko Ursulin [this message]
2020-05-29  9:28 ` [Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [1/2] drm/i915: Add a few asserts around handling of i915_request_is_active() Patchwork
2020-05-29 10:31 ` [Intel-gfx] ✗ Fi.CI.IGT: failure " Patchwork
2020-05-29 10:44 ` [Intel-gfx] ✗ Fi.CI.BAT: failure for series starting with [1/2] drm/i915: Add a few asserts around handling of i915_request_is_active() (rev2) Patchwork
2020-05-29 11:33 ` [Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [1/2] drm/i915: Add a few asserts around handling of i915_request_is_active() (rev3) Patchwork
2020-05-29 12:54 ` [Intel-gfx] ✓ Fi.CI.IGT: " Patchwork
2020-05-29 13:18 ` [Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [1/2] drm/i915: Add a few asserts around handling of i915_request_is_active() (rev4) Patchwork
2020-05-29 13:57 ` [Intel-gfx] [PATCH 1/2] drm/i915: Add a few asserts around handling of i915_request_is_active() Tvrtko Ursulin
2020-05-29 14:44 ` [Intel-gfx] ✗ Fi.CI.IGT: failure for series starting with [1/2] drm/i915: Add a few asserts around handling of i915_request_is_active() (rev4) Patchwork
2020-05-29 15:24 ` [Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [1/2] drm/i915: Add a few asserts around handling of i915_request_is_active() (rev5) Patchwork
2020-05-29 17:42 ` [Intel-gfx] ✗ Fi.CI.IGT: failure " Patchwork
2020-05-29 17:46 ` [Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [1/2] drm/i915: Add a few asserts around handling of i915_request_is_active() (rev6) Patchwork
2020-05-29 20:07 ` [Intel-gfx] ✓ Fi.CI.IGT: " Patchwork

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