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From: Marek Vasut <marex@denx.de>
To: u-boot@lists.denx.de
Subject: [PATCH 1/3] arm: caches: protect dram_bank_mmu_setup access to bi_dram
Date: Wed, 8 Apr 2020 19:57:41 +0200	[thread overview]
Message-ID: <1ed7200f-3425-5c13-096f-1ea5694ea731@denx.de> (raw)
In-Reply-To: <a6908629697c460483b35ded72b69e96@SFHDAG6NODE3.st.com>

On 4/8/20 7:54 PM, Patrick DELAUNAY wrote:
> Dear Marek,
> 
>> From: Marek Vasut <marex@denx.de>
>> Sent: vendredi 3 avril 2020 23:27
>>
>> On 4/3/20 10:28 AM, Patrick Delaunay wrote:
>>> Add protection in dram_bank_mmu_setup() to avoid access to bd->bi_dram
>>> before relocation.
>>>
>>> This patch allow to use the generic weak function dram_bank_mmu_setup
>>> to activate the MMU and the data cache in SPL or in U-Boot before
>>> relocation, when bd->bi_dram is not yet initialized.
>>>
>>> In this cases, the MMU must be initialized explicitly with
>>> mmu_set_region_dcache_behaviour function.
>>>
>>> Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
>>> ---
>>>
>>>  arch/arm/lib/cache-cp15.c | 4 ++++
>>>  1 file changed, 4 insertions(+)
>>>
>>> diff --git a/arch/arm/lib/cache-cp15.c b/arch/arm/lib/cache-cp15.c
>>> index f8d20960da..54509f11c3 100644
>>> --- a/arch/arm/lib/cache-cp15.c
>>> +++ b/arch/arm/lib/cache-cp15.c
>>> @@ -91,6 +91,10 @@ __weak void dram_bank_mmu_setup(int bank)
>>>  	bd_t *bd = gd->bd;
>>>  	int	i;
>>>
>>> +	/* bd->bi_dram is available only after relocation */
>>> +	if ((gd->flags & GD_FLG_RELOC) == 0)
>>> +		return;
>>
>> Why not just set the bd->bi_dram correctly before this is called ?
> 
> Just set "bd->bi_dram" seens as a hack.
> 
> For me the bd struct can be updated only in  common/board_f.c
> after reserve_board() for U-Boot 
> Or other spl_set_bd() called in board_init_r() for SPL. 
> 
> And that can cause issue if CONFIG_NR_DRAM_BANKS > 1
> (even it is not the case today for STM32MP1).
> 
> But if this kind of protection is not correct here I prefer come back
> to overidde of the weak fucntio dram_bank_mmu_setup in stm32mp arch
> (it is the reason this weak definition)

I'd say, let's wait for feedback from the others.

I would be inclined to set bd->bi_dram, but maybe others have other
opinions.

      reply	other threads:[~2020-04-08 17:57 UTC|newest]

Thread overview: 22+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-04-03  8:28 [PATCH 1/3] arm: caches: protect dram_bank_mmu_setup access to bi_dram Patrick Delaunay
2020-04-03  8:28 ` [PATCH 2/3] arm: caches: add DCACHE_DEFAULT_OPTION Patrick Delaunay
2020-04-03 21:29   ` Marek Vasut
2020-04-08 18:16     ` Patrick DELAUNAY
2020-04-08 18:18       ` Marek Vasut
2020-04-08 19:07         ` Patrick DELAUNAY
2020-04-08 19:18           ` Marek Vasut
2020-04-09 10:01       ` Patrick DELAUNAY
2020-04-09 10:21         ` Marek Vasut
2020-04-09 18:06           ` Patrick DELAUNAY
2020-04-10  8:13             ` Marek Vasut
2020-04-10 14:58               ` Patrick DELAUNAY
2020-04-10 17:58                 ` Marek Vasut
2020-04-03  8:28 ` [PATCH 3/3] arm: caches: manage phys_addr_t overflow in mmu_set_region_dcache_behaviour Patrick Delaunay
2020-04-03 21:30   ` Marek Vasut
2020-04-09 14:18     ` Patrick DELAUNAY
2020-04-10  8:05       ` Marek Vasut
2020-04-10 13:24         ` Patrick DELAUNAY
2020-04-10 17:57           ` Marek Vasut
2020-04-03 21:27 ` [PATCH 1/3] arm: caches: protect dram_bank_mmu_setup access to bi_dram Marek Vasut
2020-04-08 17:54   ` Patrick DELAUNAY
2020-04-08 17:57     ` Marek Vasut [this message]

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