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From: Dmitry Osipenko <digetx@gmail.com>
To: Sowjanya Komatineni <skomatineni@nvidia.com>,
	"thierry.reding@gmail.com" <thierry.reding@gmail.com>,
	Jonathan Hunter <jonathanh@nvidia.com>,
	Mantravadi Karthik <mkarthik@nvidia.com>,
	Shardar Mohammed <smohammed@nvidia.com>,
	Timo Alho <talho@nvidia.com>
Cc: "linux-tegra@vger.kernel.org" <linux-tegra@vger.kernel.org>,
	"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
	"linux-i2c@vger.kernel.org" <linux-i2c@vger.kernel.org>
Subject: Re: [PATCH V9 4/5] i2c: tegra: update transfer timeout
Date: Fri, 1 Feb 2019 22:41:59 +0300	[thread overview]
Message-ID: <1f0a6315-8e38-236a-c16c-0b8699bba1b5@gmail.com> (raw)
In-Reply-To: <BYAPR12MB3398D89D631E65C484DC8267C2920@BYAPR12MB3398.namprd12.prod.outlook.com>

01.02.2019 22:37, Sowjanya Komatineni пишет:
> 
>>> BYTES_PER_FIFO_WORD 4
>>>  
>>>  #define I2C_CNFG				0x000
>>> @@ -893,8 +892,9 @@ static int tegra_i2c_issue_bus_clear(struct tegra_i2c_dev *i2c_dev)
>>>  		i2c_writel(i2c_dev, reg, I2C_BUS_CLEAR_CNFG);
>>>  		tegra_i2c_unmask_irq(i2c_dev, I2C_INT_BUS_CLR_DONE);
>>>  
>>> -		time_left = wait_for_completion_timeout(&i2c_dev->msg_complete,
>>> -							TEGRA_I2C_TIMEOUT);
>>> +		time_left = wait_for_completion_timeout(
>>> +						&i2c_dev->msg_complete,
>>> +						msecs_to_jiffies(1000));
>>
>> So potentially tegra_i2c_xfer_msg() could take more than 1 second and then fail with -EAGAIN, correct? In that case we should set adapter.timeout in probe to a larger value:
>>
> Bus clear pulse threshold we are setting is 9 (default as per spec) so bus clear should happen after finishing sending of 9 pulses.
> So 1sec is very long time for bus to get released and in case of ARB LOST whole transfer to return EAGAIN will be much less then 1sec

Okay, thank you very much for the clarification. What about to set the timeout to a shorter value then? Maybe 10ms.

  reply	other threads:[~2019-02-01 19:41 UTC|newest]

Thread overview: 37+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-02-01 17:07 [PATCH V9 1/5] i2c: tegra: sort all the include headers alphabetically Sowjanya Komatineni
2019-02-01 17:07 ` Sowjanya Komatineni
2019-02-01 17:07 ` [PATCH V9 2/5] i2c: tegra: add bus clear master support Sowjanya Komatineni
2019-02-01 17:07   ` Sowjanya Komatineni
2019-02-01 19:06   ` Dmitry Osipenko
2019-02-01 17:07 ` [PATCH V9 3/5] i2c: tegra: Add DMA support Sowjanya Komatineni
2019-02-01 17:07   ` Sowjanya Komatineni
2019-02-01 18:57   ` Dmitry Osipenko
2019-02-01 19:20     ` Sowjanya Komatineni
2019-02-01 19:22       ` Dmitry Osipenko
2019-02-02 14:13         ` Dmitry Osipenko
2019-02-02 18:43           ` Sowjanya Komatineni
2019-02-03 16:42             ` Dmitry Osipenko
2019-02-01 20:21     ` Sowjanya Komatineni
2019-02-01 20:30       ` Dmitry Osipenko
2019-02-01 21:36         ` Sowjanya Komatineni
2019-02-01 21:45           ` Dmitry Osipenko
2019-02-02 14:01   ` Dmitry Osipenko
2019-02-02 18:32     ` Sowjanya Komatineni
2019-02-03 16:48       ` Dmitry Osipenko
2019-02-04  8:18         ` Thierry Reding
2019-02-03 14:19   ` Dmitry Osipenko
2019-02-03 14:47   ` Dmitry Osipenko
2019-02-03 15:27     ` Dmitry Osipenko
2019-02-04 12:57     ` Dmitry Osipenko
2019-02-05  1:37       ` Sowjanya Komatineni
2019-02-05  6:20         ` Dmitry Osipenko
2019-02-04  8:04   ` Thierry Reding
2019-02-01 17:07 ` [PATCH V9 4/5] i2c: tegra: update transfer timeout Sowjanya Komatineni
2019-02-01 17:07   ` Sowjanya Komatineni
2019-02-01 19:16   ` Dmitry Osipenko
2019-02-01 19:37     ` Sowjanya Komatineni
2019-02-01 19:41       ` Dmitry Osipenko [this message]
2019-02-04  7:54       ` Thierry Reding
2019-02-01 17:07 ` [PATCH V9 5/5] i2c: tegra: add i2c interface timing support Sowjanya Komatineni
2019-02-01 17:07   ` Sowjanya Komatineni
2019-02-01 19:05 ` [PATCH V9 1/5] i2c: tegra: sort all the include headers alphabetically Dmitry Osipenko

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