From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 2E55FC433EF for ; Fri, 8 Apr 2022 01:28:24 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233424AbiDHBaX (ORCPT ); Thu, 7 Apr 2022 21:30:23 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:43130 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233384AbiDHBaU (ORCPT ); Thu, 7 Apr 2022 21:30:20 -0400 Received: from mailgw02.mediatek.com (unknown [210.61.82.184]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id C2EF116AA64; Thu, 7 Apr 2022 18:28:13 -0700 (PDT) X-UUID: b923c1f18c9e42a49e9ebade0122da11-20220408 X-UUID: b923c1f18c9e42a49e9ebade0122da11-20220408 Received: from mtkmbs10n1.mediatek.inc [(172.21.101.34)] by mailgw02.mediatek.com (envelope-from ) (Generic MTA with TLSv1.2 ECDHE-RSA-AES256-GCM-SHA384 256/256) with ESMTP id 1942514810; Fri, 08 Apr 2022 09:28:07 +0800 Received: from mtkcas11.mediatek.inc (172.21.101.40) by mtkmbs10n2.mediatek.inc (172.21.101.183) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_CBC_SHA384) id 15.2.792.3; Fri, 8 Apr 2022 09:28:05 +0800 Received: from mtksdccf07 (172.21.84.99) by mtkcas11.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.0.1497.2 via Frontend Transport; Fri, 8 Apr 2022 09:28:05 +0800 Message-ID: <1f1692b6d14280fed40e53f464145ed70b67135f.camel@mediatek.com> Subject: Re: [RESEND v17 3/7] soc: mediatek: add mtk-mmsys support for mt8195 vdosys0 From: CK Hu To: Jason-JH Lin , Rob Herring , Matthias Brugger , "Chun-Kuang Hu" , AngeloGioacchino Del Regno CC: David Airlie , , "Alexandre Torgue" , , "Fabien Parent" , John 'Warthog9' Hawley , , , , Philipp Zabel , , Daniel Vetter , , , , , , , Maxime Coquelin Date: Fri, 8 Apr 2022 09:28:05 +0800 In-Reply-To: References: <20220407030409.9664-1-jason-jh.lin@mediatek.com> <20220407030409.9664-4-jason-jh.lin@mediatek.com> <67b3e42d6a094108f724ed9b8c73f5cd6b2ce219.camel@mediatek.com> Content-Type: text/plain; charset="UTF-8" X-Mailer: Evolution 3.28.5-0ubuntu0.18.04.2 MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-MTK: N Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Hi, Jason: On Thu, 2022-04-07 at 14:27 +0800, Jason-JH Lin wrote: > Hi CK, > > Thanks for the reviews. > > On Thu, 2022-04-07 at 13:45 +0800, CK Hu wrote: > > Hi, Jason: > > > > On Thu, 2022-04-07 at 11:04 +0800, jason-jh.lin wrote: > > > 1. Add mt8195 mmsys compatible for vdosys0. > > > 2. Add mt8195 routing table settings and fix build fail. > > > 3. Add clock name, clock driver name and routing table into the > > > driver data > > > of mt8195 vdosys0. > > > 4. Add get match data by clock name function and clock platform > > > labels > > > to identify which mmsys node is corresponding to vdosys0. > > > > > > Signed-off-by: jason-jh.lin > > > --- > > > drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c | 2 +- > > > drivers/gpu/drm/mediatek/mtk_drm_drv.c | 6 +- > > > drivers/soc/mediatek/mt8167-mmsys.h | 2 +- > > > drivers/soc/mediatek/mt8183-mmsys.h | 2 +- > > > drivers/soc/mediatek/mt8186-mmsys.h | 4 +- > > > drivers/soc/mediatek/mt8192-mmsys.h | 4 +- > > > drivers/soc/mediatek/mt8195-mmsys.h | 370 > > > ++++++++++++++++++++ > > > drivers/soc/mediatek/mt8365-mmsys.h | 4 +- > > > drivers/soc/mediatek/mtk-mmsys.c | 62 ++++ > > > drivers/soc/mediatek/mtk-mmsys.h | 1 + > > > drivers/soc/mediatek/mtk-mutex.c | 8 +- > > > include/linux/soc/mediatek/mtk-mmsys.h | 13 +- > > > 12 files changed, 461 insertions(+), 17 deletions(-) > > > create mode 100644 drivers/soc/mediatek/mt8195-mmsys.h > > > > > > > [snip] > > > > > diff --git a/drivers/soc/mediatek/mtk-mmsys.c > > > b/drivers/soc/mediatek/mtk-mmsys.c > > > index 4fc4c2c9ea20..b2fa239c5f5f 100644 > > > --- a/drivers/soc/mediatek/mtk-mmsys.c > > > +++ b/drivers/soc/mediatek/mtk-mmsys.c > > > @@ -4,6 +4,8 @@ > > > * Author: James Liao > > > */ > > > > > > +#include > > > +#include > > > #include > > > #include > > > #include > > > @@ -17,6 +19,7 @@ > > > #include "mt8183-mmsys.h" > > > #include "mt8186-mmsys.h" > > > #include "mt8192-mmsys.h" > > > +#include "mt8195-mmsys.h" > > > #include "mt8365-mmsys.h" > > > > > > static const struct mtk_mmsys_driver_data > > > mt2701_mmsys_driver_data > > > = > > > { > > > @@ -72,12 +75,24 @@ static const struct mtk_mmsys_driver_data > > > mt8192_mmsys_driver_data = { > > > .num_routes = ARRAY_SIZE(mmsys_mt8192_routing_table), > > > }; > > > > > > +static const struct mtk_mmsys_driver_data > > > mt8195_vdosys0_driver_data > > > = { > > > + .clk_name = "cfg_vdo0", > > > + .clk_driver = "clk-mt8195-vdo0", > > > + .routes = mmsys_mt8195_routing_table, > > > + .num_routes = ARRAY_SIZE(mmsys_mt8195_routing_table), > > > +}; > > > + > > > static const struct mtk_mmsys_driver_data > > > mt8365_mmsys_driver_data > > > = > > > { > > > .clk_driver = "clk-mt8365-mm", > > > .routes = mt8365_mmsys_routing_table, > > > .num_routes = ARRAY_SIZE(mt8365_mmsys_routing_table), > > > }; > > > > > > +static const struct of_device_id mtk_clk_platform_labels[] = { > > > + { .compatible = "mediatek,mt8195-mmsys", > > > + .data = (void *)"clk-mt8195"}, > > > +}; > > > + > > > struct mtk_mmsys { > > > void __iomem *regs; > > > const struct mtk_mmsys_driver_data *data; > > > @@ -85,6 +100,45 @@ struct mtk_mmsys { > > > struct reset_controller_dev rcdev; > > > }; > > > > > > +static int mtk_mmsys_get_match_data_by_clk_name(const struct > > > mtk_mmsys_driver_data **data, > > > + struct device *dev) > > > +{ > > > + int i; > > > + struct clk *clk; > > > + const char *clk_name; > > > + const struct of_device_id *of_id = > > > of_match_node(mtk_clk_platform_labels, > > > + dev->of_node); > > > + const struct mtk_mmsys_driver_data *drvdata[] = { > > > + &mt8195_vdosys0_driver_data, > > > + }; > > > + > > > + if (!of_id || !of_id->data) { > > > + dev_err(dev, "Can't find match clk platform labels\n"); > > > + return -EINVAL; > > > + } > > > + > > > + clk = devm_clk_get(dev, NULL); > > > + if (IS_ERR(clk)) { > > > + dev_err(dev, "failed to get mmsys clk\n"); > > > + return PTR_ERR(clk); > > > + } > > > + > > > + clk_name = __clk_get_name(clk); > > > + if (!clk_name) { > > > + dev_err(dev, "invalid mmsys clk name\n"); > > > + return -EINVAL; > > > + } > > > + > > > + for (i = 0; i < ARRAY_SIZE(drvdata); i++) > > > + if (strncmp(drvdata[i]->clk_name, clk_name, > > > strlen(clk_name)) == 0 && > > > + strncmp(drvdata[i]->clk_driver, of_id->data, > > > strlen(of_id->data)) == 0) { > > > > I think clk_name is enough to identify the mmsys, why do you need > > clk_driver? > > I think there might be another chip that needs to get driver data by > clk_name . > So I use "clk-mt8195" in clk_driver to identify the corresponding > platform whose clk_name of mmsys is also "cfg_vod0". We usually don't care the future because the future may not happen. If it's sure that would happen, I think clk_driver is not a good choice. For now, the clk_driver name is different for each SoC, but it could be the same for each SoC because only one clock driver would be compiled. I think "compatible" would be different for each SoC. Regards, CK > > > > + *data = drvdata[i]; > > > + return 0; > > > + } > > > + > > > + return -EINVAL; > > > +} > > > + > > > void mtk_mmsys_ddp_connect(struct device *dev, > > > enum mtk_ddp_comp_id cur, > > > enum mtk_ddp_comp_id next) > > > @@ -206,6 +260,11 @@ static int mtk_mmsys_probe(struct > > > platform_device *pdev) > > > } > > > > > > mmsys->data = of_device_get_match_data(&pdev->dev); > > > + if (!mmsys->data && > > > mtk_mmsys_get_match_data_by_clk_name(&mmsys->data, dev) < 0) { > > > + dev_err(dev, "Couldn't get match driver data\n"); > > > + return -EINVAL; > > > + } > > > + > > > platform_set_drvdata(pdev, mmsys); > > > > > > clks = platform_device_register_data(&pdev->dev, mmsys->data- > > > > clk_driver, > > > > > > @@ -260,6 +319,9 @@ static const struct of_device_id > > > of_match_mtk_mmsys[] = { > > > .compatible = "mediatek,mt8192-mmsys", > > > .data = &mt8192_mmsys_driver_data, > > > }, > > > + { > > > + .compatible = "mediatek,mt8195-mmsys", > > > + }, > > > { > > > .compatible = "mediatek,mt8365-mmsys", > > > .data = &mt8365_mmsys_driver_data, > > > > > > > [snip] > > > > > b/include/linux/soc/mediatek/mtk-mmsys.h > > > index 4bba275e235a..fb719fd1281c 100644 > > > --- a/include/linux/soc/mediatek/mtk-mmsys.h > > > +++ b/include/linux/soc/mediatek/mtk-mmsys.h > > > @@ -16,14 +16,25 @@ enum mtk_ddp_comp_id { > > > DDP_COMPONENT_CCORR, > > > DDP_COMPONENT_COLOR0, > > > DDP_COMPONENT_COLOR1, > > > - DDP_COMPONENT_DITHER, > > > + DDP_COMPONENT_DITHER0, > > > > I would like soc and drm modification to go through different tree, > > so > > this setting would not modify drm driver in this patch. > > > > DDP_COMPONENT_DITHER0 = DDP_COMPONENT_DITHER, > > > > Then modify drm driver after this patch. > > > > Regards, > > CK > > OK, I will use this modification at the next version. > Thanks! > > Regards, > Jason-JH.Lin > > > > > > + DDP_COMPONENT_DITHER1, > > > + DDP_COMPONENT_DP_INTF0, > > > + DDP_COMPONENT_DP_INTF1, > > > DDP_COMPONENT_DPI0, > > > DDP_COMPONENT_DPI1, > > > + DDP_COMPONENT_DSC0, > > > + DDP_COMPONENT_DSC1, > > > DDP_COMPONENT_DSI0, > > > DDP_COMPONENT_DSI1, > > > DDP_COMPONENT_DSI2, > > > DDP_COMPONENT_DSI3, > > > DDP_COMPONENT_GAMMA, > > > + DDP_COMPONENT_MERGE0, > > > + DDP_COMPONENT_MERGE1, > > > + DDP_COMPONENT_MERGE2, > > > + DDP_COMPONENT_MERGE3, > > > + DDP_COMPONENT_MERGE4, > > > + DDP_COMPONENT_MERGE5, > > > DDP_COMPONENT_OD0, > > > DDP_COMPONENT_OD1, > > > DDP_COMPONENT_OVL0, > > > > From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id EB784C433F5 for ; Fri, 8 Apr 2022 01:28:33 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Date:CC:To:From:Subject:Message-ID:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=g7ZLXjTH7bfPnukpLZ2ctUTxnsy8HplXGxMcGGUuG0s=; b=NkW/KsXeyr9E67 Iomuo2S+eLd7sgVK34DPttdJv58Qm7xJnvJahIS2zvT5SXlDG5SksxKo+8Q3QFZBEtj/eHbUfJHXV DPxjHqzwAqNk+YW4IVNkKC8HY/riurdrHH1kcFXSDo3p4Xb3hhusVGEC74Zq89gdCKY8fWe28Pr6y s8vkfdrE/65zkZCVK3FaWlXI9FKbNTzmOoSGfHJyoKAcdHlUHUeZwjVJPq+QayiCJD2ibdsHWksZm nTukbSfh4IGkUT6DuhO8p6mqkja179dvUJS3auu5BQKBeTtdNWHqssCoYWIl+arPdnaRuzp59HWgK 5HkXx+5UC2vjE5Qon/6A==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1ncdQJ-00EXqU-79; Fri, 08 Apr 2022 01:28:27 +0000 Received: from mailgw02.mediatek.com ([216.200.240.185]) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1ncdQ7-00EXoP-OM; Fri, 08 Apr 2022 01:28:17 +0000 X-UUID: 798772c72c2641f08c36fd70b7bd56d3-20220407 X-UUID: 798772c72c2641f08c36fd70b7bd56d3-20220407 Received: from mtkcas66.mediatek.inc [(172.29.193.44)] by mailgw02.mediatek.com (envelope-from ) (musrelay.mediatek.com ESMTP with TLSv1.2 ECDHE-RSA-AES256-SHA384 256/256) with ESMTP id 2119576322; Thu, 07 Apr 2022 18:28:09 -0700 Received: from mtkmbs10n2.mediatek.inc (172.21.101.183) by MTKMBS62N2.mediatek.inc (172.29.193.42) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Thu, 7 Apr 2022 18:28:07 -0700 Received: from mtkcas11.mediatek.inc (172.21.101.40) by mtkmbs10n2.mediatek.inc (172.21.101.183) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_CBC_SHA384) id 15.2.792.3; Fri, 8 Apr 2022 09:28:05 +0800 Received: from mtksdccf07 (172.21.84.99) by mtkcas11.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.0.1497.2 via Frontend Transport; Fri, 8 Apr 2022 09:28:05 +0800 Message-ID: <1f1692b6d14280fed40e53f464145ed70b67135f.camel@mediatek.com> Subject: Re: [RESEND v17 3/7] soc: mediatek: add mtk-mmsys support for mt8195 vdosys0 From: CK Hu To: Jason-JH Lin , Rob Herring , Matthias Brugger , "Chun-Kuang Hu" , AngeloGioacchino Del Regno CC: David Airlie , , "Alexandre Torgue" , , "Fabien Parent" , John 'Warthog9' Hawley , , , , Philipp Zabel , , Daniel Vetter , , , , , , , Maxime Coquelin Date: Fri, 8 Apr 2022 09:28:05 +0800 In-Reply-To: References: <20220407030409.9664-1-jason-jh.lin@mediatek.com> <20220407030409.9664-4-jason-jh.lin@mediatek.com> <67b3e42d6a094108f724ed9b8c73f5cd6b2ce219.camel@mediatek.com> X-Mailer: Evolution 3.28.5-0ubuntu0.18.04.2 MIME-Version: 1.0 X-MTK: N X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20220407_182815_853923_52ED5231 X-CRM114-Status: GOOD ( 42.68 ) X-BeenThere: linux-mediatek@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "Linux-mediatek" Errors-To: linux-mediatek-bounces+linux-mediatek=archiver.kernel.org@lists.infradead.org Hi, Jason: On Thu, 2022-04-07 at 14:27 +0800, Jason-JH Lin wrote: > Hi CK, > > Thanks for the reviews. > > On Thu, 2022-04-07 at 13:45 +0800, CK Hu wrote: > > Hi, Jason: > > > > On Thu, 2022-04-07 at 11:04 +0800, jason-jh.lin wrote: > > > 1. Add mt8195 mmsys compatible for vdosys0. > > > 2. Add mt8195 routing table settings and fix build fail. > > > 3. Add clock name, clock driver name and routing table into the > > > driver data > > > of mt8195 vdosys0. > > > 4. Add get match data by clock name function and clock platform > > > labels > > > to identify which mmsys node is corresponding to vdosys0. > > > > > > Signed-off-by: jason-jh.lin > > > --- > > > drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c | 2 +- > > > drivers/gpu/drm/mediatek/mtk_drm_drv.c | 6 +- > > > drivers/soc/mediatek/mt8167-mmsys.h | 2 +- > > > drivers/soc/mediatek/mt8183-mmsys.h | 2 +- > > > drivers/soc/mediatek/mt8186-mmsys.h | 4 +- > > > drivers/soc/mediatek/mt8192-mmsys.h | 4 +- > > > drivers/soc/mediatek/mt8195-mmsys.h | 370 > > > ++++++++++++++++++++ > > > drivers/soc/mediatek/mt8365-mmsys.h | 4 +- > > > drivers/soc/mediatek/mtk-mmsys.c | 62 ++++ > > > drivers/soc/mediatek/mtk-mmsys.h | 1 + > > > drivers/soc/mediatek/mtk-mutex.c | 8 +- > > > include/linux/soc/mediatek/mtk-mmsys.h | 13 +- > > > 12 files changed, 461 insertions(+), 17 deletions(-) > > > create mode 100644 drivers/soc/mediatek/mt8195-mmsys.h > > > > > > > [snip] > > > > > diff --git a/drivers/soc/mediatek/mtk-mmsys.c > > > b/drivers/soc/mediatek/mtk-mmsys.c > > > index 4fc4c2c9ea20..b2fa239c5f5f 100644 > > > --- a/drivers/soc/mediatek/mtk-mmsys.c > > > +++ b/drivers/soc/mediatek/mtk-mmsys.c > > > @@ -4,6 +4,8 @@ > > > * Author: James Liao > > > */ > > > > > > +#include > > > +#include > > > #include > > > #include > > > #include > > > @@ -17,6 +19,7 @@ > > > #include "mt8183-mmsys.h" > > > #include "mt8186-mmsys.h" > > > #include "mt8192-mmsys.h" > > > +#include "mt8195-mmsys.h" > > > #include "mt8365-mmsys.h" > > > > > > static const struct mtk_mmsys_driver_data > > > mt2701_mmsys_driver_data > > > = > > > { > > > @@ -72,12 +75,24 @@ static const struct mtk_mmsys_driver_data > > > mt8192_mmsys_driver_data = { > > > .num_routes = ARRAY_SIZE(mmsys_mt8192_routing_table), > > > }; > > > > > > +static const struct mtk_mmsys_driver_data > > > mt8195_vdosys0_driver_data > > > = { > > > + .clk_name = "cfg_vdo0", > > > + .clk_driver = "clk-mt8195-vdo0", > > > + .routes = mmsys_mt8195_routing_table, > > > + .num_routes = ARRAY_SIZE(mmsys_mt8195_routing_table), > > > +}; > > > + > > > static const struct mtk_mmsys_driver_data > > > mt8365_mmsys_driver_data > > > = > > > { > > > .clk_driver = "clk-mt8365-mm", > > > .routes = mt8365_mmsys_routing_table, > > > .num_routes = ARRAY_SIZE(mt8365_mmsys_routing_table), > > > }; > > > > > > +static const struct of_device_id mtk_clk_platform_labels[] = { > > > + { .compatible = "mediatek,mt8195-mmsys", > > > + .data = (void *)"clk-mt8195"}, > > > +}; > > > + > > > struct mtk_mmsys { > > > void __iomem *regs; > > > const struct mtk_mmsys_driver_data *data; > > > @@ -85,6 +100,45 @@ struct mtk_mmsys { > > > struct reset_controller_dev rcdev; > > > }; > > > > > > +static int mtk_mmsys_get_match_data_by_clk_name(const struct > > > mtk_mmsys_driver_data **data, > > > + struct device *dev) > > > +{ > > > + int i; > > > + struct clk *clk; > > > + const char *clk_name; > > > + const struct of_device_id *of_id = > > > of_match_node(mtk_clk_platform_labels, > > > + dev->of_node); > > > + const struct mtk_mmsys_driver_data *drvdata[] = { > > > + &mt8195_vdosys0_driver_data, > > > + }; > > > + > > > + if (!of_id || !of_id->data) { > > > + dev_err(dev, "Can't find match clk platform labels\n"); > > > + return -EINVAL; > > > + } > > > + > > > + clk = devm_clk_get(dev, NULL); > > > + if (IS_ERR(clk)) { > > > + dev_err(dev, "failed to get mmsys clk\n"); > > > + return PTR_ERR(clk); > > > + } > > > + > > > + clk_name = __clk_get_name(clk); > > > + if (!clk_name) { > > > + dev_err(dev, "invalid mmsys clk name\n"); > > > + return -EINVAL; > > > + } > > > + > > > + for (i = 0; i < ARRAY_SIZE(drvdata); i++) > > > + if (strncmp(drvdata[i]->clk_name, clk_name, > > > strlen(clk_name)) == 0 && > > > + strncmp(drvdata[i]->clk_driver, of_id->data, > > > strlen(of_id->data)) == 0) { > > > > I think clk_name is enough to identify the mmsys, why do you need > > clk_driver? > > I think there might be another chip that needs to get driver data by > clk_name . > So I use "clk-mt8195" in clk_driver to identify the corresponding > platform whose clk_name of mmsys is also "cfg_vod0". We usually don't care the future because the future may not happen. If it's sure that would happen, I think clk_driver is not a good choice. For now, the clk_driver name is different for each SoC, but it could be the same for each SoC because only one clock driver would be compiled. I think "compatible" would be different for each SoC. Regards, CK > > > > + *data = drvdata[i]; > > > + return 0; > > > + } > > > + > > > + return -EINVAL; > > > +} > > > + > > > void mtk_mmsys_ddp_connect(struct device *dev, > > > enum mtk_ddp_comp_id cur, > > > enum mtk_ddp_comp_id next) > > > @@ -206,6 +260,11 @@ static int mtk_mmsys_probe(struct > > > platform_device *pdev) > > > } > > > > > > mmsys->data = of_device_get_match_data(&pdev->dev); > > > + if (!mmsys->data && > > > mtk_mmsys_get_match_data_by_clk_name(&mmsys->data, dev) < 0) { > > > + dev_err(dev, "Couldn't get match driver data\n"); > > > + return -EINVAL; > > > + } > > > + > > > platform_set_drvdata(pdev, mmsys); > > > > > > clks = platform_device_register_data(&pdev->dev, mmsys->data- > > > > clk_driver, > > > > > > @@ -260,6 +319,9 @@ static const struct of_device_id > > > of_match_mtk_mmsys[] = { > > > .compatible = "mediatek,mt8192-mmsys", > > > .data = &mt8192_mmsys_driver_data, > > > }, > > > + { > > > + .compatible = "mediatek,mt8195-mmsys", > > > + }, > > > { > > > .compatible = "mediatek,mt8365-mmsys", > > > .data = &mt8365_mmsys_driver_data, > > > > > > > [snip] > > > > > b/include/linux/soc/mediatek/mtk-mmsys.h > > > index 4bba275e235a..fb719fd1281c 100644 > > > --- a/include/linux/soc/mediatek/mtk-mmsys.h > > > +++ b/include/linux/soc/mediatek/mtk-mmsys.h > > > @@ -16,14 +16,25 @@ enum mtk_ddp_comp_id { > > > DDP_COMPONENT_CCORR, > > > DDP_COMPONENT_COLOR0, > > > DDP_COMPONENT_COLOR1, > > > - DDP_COMPONENT_DITHER, > > > + DDP_COMPONENT_DITHER0, > > > > I would like soc and drm modification to go through different tree, > > so > > this setting would not modify drm driver in this patch. > > > > DDP_COMPONENT_DITHER0 = DDP_COMPONENT_DITHER, > > > > Then modify drm driver after this patch. > > > > Regards, > > CK > > OK, I will use this modification at the next version. > Thanks! > > Regards, > Jason-JH.Lin > > > > > > + DDP_COMPONENT_DITHER1, > > > + DDP_COMPONENT_DP_INTF0, > > > + DDP_COMPONENT_DP_INTF1, > > > DDP_COMPONENT_DPI0, > > > DDP_COMPONENT_DPI1, > > > + DDP_COMPONENT_DSC0, > > > + DDP_COMPONENT_DSC1, > > > DDP_COMPONENT_DSI0, > > > DDP_COMPONENT_DSI1, > > > DDP_COMPONENT_DSI2, > > > DDP_COMPONENT_DSI3, > > > DDP_COMPONENT_GAMMA, > > > + DDP_COMPONENT_MERGE0, > > > + DDP_COMPONENT_MERGE1, > > > + DDP_COMPONENT_MERGE2, > > > + DDP_COMPONENT_MERGE3, > > > + DDP_COMPONENT_MERGE4, > > > + DDP_COMPONENT_MERGE5, > > > DDP_COMPONENT_OD0, > > > DDP_COMPONENT_OD1, > > > DDP_COMPONENT_OVL0, > > > > _______________________________________________ Linux-mediatek mailing list Linux-mediatek@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-mediatek From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id EFA40C433EF for ; Fri, 8 Apr 2022 01:29:51 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Date:CC:To:From:Subject:Message-ID:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=sS06KPnI17dpTsaW2dI2CQ9+SxcfNNJKSBc4mvH4E4s=; b=4gEV4gY84jEfu3 3HJ7GQnrk5AGrWuFrtNVEAYUp0EXrKMsn22cREBSIOk9ilgUv+0lxd2nB3/DBm/cP5bb4Clgn5lVN Ps0zqdgx/wA7hJBiw088w6cCEZ2d2slauAz95yVZ0itnIge5Qe2s8a7i18XhUOBY4+6IKFlZO9729 c77Drp0UloJCVfqddnFBmbfKri8fKT8KLzg9txKF+Z9nJLsLzyjA+/dIwPRAd9a14vc/YWMQEVuqQ saVcHxFEf0RHgx+039SsdseLxUEUT6u2O2cijhxzzR/PncjxQaVevHWin2qCtk8XMpVuSkCcXaxLx lle03RVaF8cZpqr8ulOw==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1ncdQB-00EXp0-BW; Fri, 08 Apr 2022 01:28:19 +0000 Received: from mailgw02.mediatek.com ([216.200.240.185]) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1ncdQ7-00EXoP-OM; Fri, 08 Apr 2022 01:28:17 +0000 X-UUID: 798772c72c2641f08c36fd70b7bd56d3-20220407 X-UUID: 798772c72c2641f08c36fd70b7bd56d3-20220407 Received: from mtkcas66.mediatek.inc [(172.29.193.44)] by mailgw02.mediatek.com (envelope-from ) (musrelay.mediatek.com ESMTP with TLSv1.2 ECDHE-RSA-AES256-SHA384 256/256) with ESMTP id 2119576322; Thu, 07 Apr 2022 18:28:09 -0700 Received: from mtkmbs10n2.mediatek.inc (172.21.101.183) by MTKMBS62N2.mediatek.inc (172.29.193.42) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Thu, 7 Apr 2022 18:28:07 -0700 Received: from mtkcas11.mediatek.inc (172.21.101.40) by mtkmbs10n2.mediatek.inc (172.21.101.183) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_CBC_SHA384) id 15.2.792.3; Fri, 8 Apr 2022 09:28:05 +0800 Received: from mtksdccf07 (172.21.84.99) by mtkcas11.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.0.1497.2 via Frontend Transport; Fri, 8 Apr 2022 09:28:05 +0800 Message-ID: <1f1692b6d14280fed40e53f464145ed70b67135f.camel@mediatek.com> Subject: Re: [RESEND v17 3/7] soc: mediatek: add mtk-mmsys support for mt8195 vdosys0 From: CK Hu To: Jason-JH Lin , Rob Herring , Matthias Brugger , "Chun-Kuang Hu" , AngeloGioacchino Del Regno CC: David Airlie , , "Alexandre Torgue" , , "Fabien Parent" , John 'Warthog9' Hawley , , , , Philipp Zabel , , Daniel Vetter , , , , , , , Maxime Coquelin Date: Fri, 8 Apr 2022 09:28:05 +0800 In-Reply-To: References: <20220407030409.9664-1-jason-jh.lin@mediatek.com> <20220407030409.9664-4-jason-jh.lin@mediatek.com> <67b3e42d6a094108f724ed9b8c73f5cd6b2ce219.camel@mediatek.com> X-Mailer: Evolution 3.28.5-0ubuntu0.18.04.2 MIME-Version: 1.0 X-MTK: N X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20220407_182815_853923_52ED5231 X-CRM114-Status: GOOD ( 42.68 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Hi, Jason: On Thu, 2022-04-07 at 14:27 +0800, Jason-JH Lin wrote: > Hi CK, > > Thanks for the reviews. > > On Thu, 2022-04-07 at 13:45 +0800, CK Hu wrote: > > Hi, Jason: > > > > On Thu, 2022-04-07 at 11:04 +0800, jason-jh.lin wrote: > > > 1. Add mt8195 mmsys compatible for vdosys0. > > > 2. Add mt8195 routing table settings and fix build fail. > > > 3. Add clock name, clock driver name and routing table into the > > > driver data > > > of mt8195 vdosys0. > > > 4. Add get match data by clock name function and clock platform > > > labels > > > to identify which mmsys node is corresponding to vdosys0. > > > > > > Signed-off-by: jason-jh.lin > > > --- > > > drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c | 2 +- > > > drivers/gpu/drm/mediatek/mtk_drm_drv.c | 6 +- > > > drivers/soc/mediatek/mt8167-mmsys.h | 2 +- > > > drivers/soc/mediatek/mt8183-mmsys.h | 2 +- > > > drivers/soc/mediatek/mt8186-mmsys.h | 4 +- > > > drivers/soc/mediatek/mt8192-mmsys.h | 4 +- > > > drivers/soc/mediatek/mt8195-mmsys.h | 370 > > > ++++++++++++++++++++ > > > drivers/soc/mediatek/mt8365-mmsys.h | 4 +- > > > drivers/soc/mediatek/mtk-mmsys.c | 62 ++++ > > > drivers/soc/mediatek/mtk-mmsys.h | 1 + > > > drivers/soc/mediatek/mtk-mutex.c | 8 +- > > > include/linux/soc/mediatek/mtk-mmsys.h | 13 +- > > > 12 files changed, 461 insertions(+), 17 deletions(-) > > > create mode 100644 drivers/soc/mediatek/mt8195-mmsys.h > > > > > > > [snip] > > > > > diff --git a/drivers/soc/mediatek/mtk-mmsys.c > > > b/drivers/soc/mediatek/mtk-mmsys.c > > > index 4fc4c2c9ea20..b2fa239c5f5f 100644 > > > --- a/drivers/soc/mediatek/mtk-mmsys.c > > > +++ b/drivers/soc/mediatek/mtk-mmsys.c > > > @@ -4,6 +4,8 @@ > > > * Author: James Liao > > > */ > > > > > > +#include > > > +#include > > > #include > > > #include > > > #include > > > @@ -17,6 +19,7 @@ > > > #include "mt8183-mmsys.h" > > > #include "mt8186-mmsys.h" > > > #include "mt8192-mmsys.h" > > > +#include "mt8195-mmsys.h" > > > #include "mt8365-mmsys.h" > > > > > > static const struct mtk_mmsys_driver_data > > > mt2701_mmsys_driver_data > > > = > > > { > > > @@ -72,12 +75,24 @@ static const struct mtk_mmsys_driver_data > > > mt8192_mmsys_driver_data = { > > > .num_routes = ARRAY_SIZE(mmsys_mt8192_routing_table), > > > }; > > > > > > +static const struct mtk_mmsys_driver_data > > > mt8195_vdosys0_driver_data > > > = { > > > + .clk_name = "cfg_vdo0", > > > + .clk_driver = "clk-mt8195-vdo0", > > > + .routes = mmsys_mt8195_routing_table, > > > + .num_routes = ARRAY_SIZE(mmsys_mt8195_routing_table), > > > +}; > > > + > > > static const struct mtk_mmsys_driver_data > > > mt8365_mmsys_driver_data > > > = > > > { > > > .clk_driver = "clk-mt8365-mm", > > > .routes = mt8365_mmsys_routing_table, > > > .num_routes = ARRAY_SIZE(mt8365_mmsys_routing_table), > > > }; > > > > > > +static const struct of_device_id mtk_clk_platform_labels[] = { > > > + { .compatible = "mediatek,mt8195-mmsys", > > > + .data = (void *)"clk-mt8195"}, > > > +}; > > > + > > > struct mtk_mmsys { > > > void __iomem *regs; > > > const struct mtk_mmsys_driver_data *data; > > > @@ -85,6 +100,45 @@ struct mtk_mmsys { > > > struct reset_controller_dev rcdev; > > > }; > > > > > > +static int mtk_mmsys_get_match_data_by_clk_name(const struct > > > mtk_mmsys_driver_data **data, > > > + struct device *dev) > > > +{ > > > + int i; > > > + struct clk *clk; > > > + const char *clk_name; > > > + const struct of_device_id *of_id = > > > of_match_node(mtk_clk_platform_labels, > > > + dev->of_node); > > > + const struct mtk_mmsys_driver_data *drvdata[] = { > > > + &mt8195_vdosys0_driver_data, > > > + }; > > > + > > > + if (!of_id || !of_id->data) { > > > + dev_err(dev, "Can't find match clk platform labels\n"); > > > + return -EINVAL; > > > + } > > > + > > > + clk = devm_clk_get(dev, NULL); > > > + if (IS_ERR(clk)) { > > > + dev_err(dev, "failed to get mmsys clk\n"); > > > + return PTR_ERR(clk); > > > + } > > > + > > > + clk_name = __clk_get_name(clk); > > > + if (!clk_name) { > > > + dev_err(dev, "invalid mmsys clk name\n"); > > > + return -EINVAL; > > > + } > > > + > > > + for (i = 0; i < ARRAY_SIZE(drvdata); i++) > > > + if (strncmp(drvdata[i]->clk_name, clk_name, > > > strlen(clk_name)) == 0 && > > > + strncmp(drvdata[i]->clk_driver, of_id->data, > > > strlen(of_id->data)) == 0) { > > > > I think clk_name is enough to identify the mmsys, why do you need > > clk_driver? > > I think there might be another chip that needs to get driver data by > clk_name . > So I use "clk-mt8195" in clk_driver to identify the corresponding > platform whose clk_name of mmsys is also "cfg_vod0". We usually don't care the future because the future may not happen. If it's sure that would happen, I think clk_driver is not a good choice. For now, the clk_driver name is different for each SoC, but it could be the same for each SoC because only one clock driver would be compiled. I think "compatible" would be different for each SoC. Regards, CK > > > > + *data = drvdata[i]; > > > + return 0; > > > + } > > > + > > > + return -EINVAL; > > > +} > > > + > > > void mtk_mmsys_ddp_connect(struct device *dev, > > > enum mtk_ddp_comp_id cur, > > > enum mtk_ddp_comp_id next) > > > @@ -206,6 +260,11 @@ static int mtk_mmsys_probe(struct > > > platform_device *pdev) > > > } > > > > > > mmsys->data = of_device_get_match_data(&pdev->dev); > > > + if (!mmsys->data && > > > mtk_mmsys_get_match_data_by_clk_name(&mmsys->data, dev) < 0) { > > > + dev_err(dev, "Couldn't get match driver data\n"); > > > + return -EINVAL; > > > + } > > > + > > > platform_set_drvdata(pdev, mmsys); > > > > > > clks = platform_device_register_data(&pdev->dev, mmsys->data- > > > > clk_driver, > > > > > > @@ -260,6 +319,9 @@ static const struct of_device_id > > > of_match_mtk_mmsys[] = { > > > .compatible = "mediatek,mt8192-mmsys", > > > .data = &mt8192_mmsys_driver_data, > > > }, > > > + { > > > + .compatible = "mediatek,mt8195-mmsys", > > > + }, > > > { > > > .compatible = "mediatek,mt8365-mmsys", > > > .data = &mt8365_mmsys_driver_data, > > > > > > > [snip] > > > > > b/include/linux/soc/mediatek/mtk-mmsys.h > > > index 4bba275e235a..fb719fd1281c 100644 > > > --- a/include/linux/soc/mediatek/mtk-mmsys.h > > > +++ b/include/linux/soc/mediatek/mtk-mmsys.h > > > @@ -16,14 +16,25 @@ enum mtk_ddp_comp_id { > > > DDP_COMPONENT_CCORR, > > > DDP_COMPONENT_COLOR0, > > > DDP_COMPONENT_COLOR1, > > > - DDP_COMPONENT_DITHER, > > > + DDP_COMPONENT_DITHER0, > > > > I would like soc and drm modification to go through different tree, > > so > > this setting would not modify drm driver in this patch. > > > > DDP_COMPONENT_DITHER0 = DDP_COMPONENT_DITHER, > > > > Then modify drm driver after this patch. > > > > Regards, > > CK > > OK, I will use this modification at the next version. > Thanks! > > Regards, > Jason-JH.Lin > > > > > > + DDP_COMPONENT_DITHER1, > > > + DDP_COMPONENT_DP_INTF0, > > > + DDP_COMPONENT_DP_INTF1, > > > DDP_COMPONENT_DPI0, > > > DDP_COMPONENT_DPI1, > > > + DDP_COMPONENT_DSC0, > > > + DDP_COMPONENT_DSC1, > > > DDP_COMPONENT_DSI0, > > > DDP_COMPONENT_DSI1, > > > DDP_COMPONENT_DSI2, > > > DDP_COMPONENT_DSI3, > > > DDP_COMPONENT_GAMMA, > > > + DDP_COMPONENT_MERGE0, > > > + DDP_COMPONENT_MERGE1, > > > + DDP_COMPONENT_MERGE2, > > > + DDP_COMPONENT_MERGE3, > > > + DDP_COMPONENT_MERGE4, > > > + DDP_COMPONENT_MERGE5, > > > DDP_COMPONENT_OD0, > > > DDP_COMPONENT_OD1, > > > DDP_COMPONENT_OVL0, > > > > _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel