[U-Boot] [LVDS dual channel] TCON0_LVDS_IF_REG seem have undocumented bit 30 ?

[U-Boot] [LVDS dual channel] TCON0_LVDS_IF_REG seem have undocumented bit 30 ?

[far5893]

I try to read BSP code  for enabling dual channel LVDS (for more than 768 Vertical lines),in BSP code :

<https://github.com/WigWagCo/wwrelay-bsp/blob/40ae1e9a5ebcbc22ee221fdce806b577b6606983/sunxi-bsp/linux-sunxi/drivers/video/sunxi/disp/de_lcdc.c>

#define LCDC_LVDS_OFF (0x084) /* LVDS registers offset */


LCDC_WUINT32(sel, LCDC_LVDS_OFF,(info->lcd_lvds_ch << 30)
| (0 << 29) | (0 << 28)
     | (info->lcd_lvds_mode << 27)
|(info->lcd_lvds_bitwidth << 26) | (0 << 23));


there is a lcd_lvds_ch parameter from fex file that set bit30

but in documentation only bit 31 28 27 26 23  of TCON0_LVDS_IF_REG(0x084) are documented,

i'm reading wrong documentation or is really undocumented ?

I'm trying to enable lvds dual channel on A10/A20 SOC.




Thanks