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[82.65.169.74]) by smtp.gmail.com with ESMTPSA id h13sm22758075wml.26.2021.05.19.08.10.26 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 19 May 2021 08:10:26 -0700 (PDT) References: <20210517203724.1006254-1-martin.blumenstingl@googlemail.com> <20210517203724.1006254-4-martin.blumenstingl@googlemail.com> <1jo8d81nw3.fsf@starbuckisacylon.baylibre.com> User-agent: mu4e 1.4.15; emacs 27.1 From: Jerome Brunet To: Martin Blumenstingl Cc: mturquette@baylibre.com, sboyd@kernel.org, Neil Armstrong , linux-clk@vger.kernel.org, khilman@baylibre.com, linux-kernel@vger.kernel.org, linux-amlogic@lists.infradead.org, linux-arm-kernel@lists.infradead.org Subject: Re: [PATCH RFC v1 3/3] clk: meson: pll: switch to determine_rate for the PLL ops In-reply-to: Message-ID: <1j1ra2dajh.fsf@starbuckisacylon.baylibre.com> Date: Wed, 19 May 2021 17:10:26 +0200 MIME-Version: 1.0 Content-Type: text/plain Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Tue 18 May 2021 at 22:17, Martin Blumenstingl wrote: > Hi Jerome, > > On Tue, May 18, 2021 at 9:50 AM Jerome Brunet wrote: >> >> >> On Mon 17 May 2021 at 22:37, Martin Blumenstingl wrote: >> >> > This increases the maxmium supported frequency on 32-bit systems from >> > 2^31 (signed long as used by clk_ops.round_rate, maximum value: >> > approx. 2.14GHz) to 2^32 (unsigned long as used by >> > clk_ops.determine_rate, maximum value: approx. 4.29GHz). >> > On Meson8/8b/8m2 the HDMI PLL and it's OD (post-dividers) are >> > capable of running at up to 2.97GHz. So switch the divider >> > implementation in clk-regmap to clk_ops.determine_rate to support these >> > higher frequencies on 32-bit systems. >> > >> > Signed-off-by: Martin Blumenstingl >> >> Looks good. I see no reason to keep this one as RFC. > Great, thanks for checking! > >> I can take it directly if this is OK with you ? > That would be amazing. > Obviously no objections from my side :-) > > > Best regards, > Martin Applied then. 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[82.65.169.74]) by smtp.gmail.com with ESMTPSA id h13sm22758075wml.26.2021.05.19.08.10.26 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 19 May 2021 08:10:26 -0700 (PDT) References: <20210517203724.1006254-1-martin.blumenstingl@googlemail.com> <20210517203724.1006254-4-martin.blumenstingl@googlemail.com> <1jo8d81nw3.fsf@starbuckisacylon.baylibre.com> User-agent: mu4e 1.4.15; emacs 27.1 From: Jerome Brunet To: Martin Blumenstingl Cc: mturquette@baylibre.com, sboyd@kernel.org, Neil Armstrong , linux-clk@vger.kernel.org, khilman@baylibre.com, linux-kernel@vger.kernel.org, linux-amlogic@lists.infradead.org, linux-arm-kernel@lists.infradead.org Subject: Re: [PATCH RFC v1 3/3] clk: meson: pll: switch to determine_rate for the PLL ops In-reply-to: Message-ID: <1j1ra2dajh.fsf@starbuckisacylon.baylibre.com> Date: Wed, 19 May 2021 17:10:26 +0200 MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20210519_081028_878775_7C46C906 X-CRM114-Status: GOOD ( 17.74 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On Tue 18 May 2021 at 22:17, Martin Blumenstingl wrote: > Hi Jerome, > > On Tue, May 18, 2021 at 9:50 AM Jerome Brunet wrote: >> >> >> On Mon 17 May 2021 at 22:37, Martin Blumenstingl wrote: >> >> > This increases the maxmium supported frequency on 32-bit systems from >> > 2^31 (signed long as used by clk_ops.round_rate, maximum value: >> > approx. 2.14GHz) to 2^32 (unsigned long as used by >> > clk_ops.determine_rate, maximum value: approx. 4.29GHz). >> > On Meson8/8b/8m2 the HDMI PLL and it's OD (post-dividers) are >> > capable of running at up to 2.97GHz. So switch the divider >> > implementation in clk-regmap to clk_ops.determine_rate to support these >> > higher frequencies on 32-bit systems. >> > >> > Signed-off-by: Martin Blumenstingl >> >> Looks good. I see no reason to keep this one as RFC. > Great, thanks for checking! > >> I can take it directly if this is OK with you ? > That would be amazing. > Obviously no objections from my side :-) > > > Best regards, > Martin Applied then. Thx _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-9.1 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id DD916C433B4 for ; Wed, 19 May 2021 15:10:52 +0000 (UTC) Received: from desiato.infradead.org (desiato.infradead.org [90.155.92.199]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 3C8ED61042 for ; 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[82.65.169.74]) by smtp.gmail.com with ESMTPSA id h13sm22758075wml.26.2021.05.19.08.10.26 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 19 May 2021 08:10:26 -0700 (PDT) References: <20210517203724.1006254-1-martin.blumenstingl@googlemail.com> <20210517203724.1006254-4-martin.blumenstingl@googlemail.com> <1jo8d81nw3.fsf@starbuckisacylon.baylibre.com> User-agent: mu4e 1.4.15; emacs 27.1 From: Jerome Brunet To: Martin Blumenstingl Cc: mturquette@baylibre.com, sboyd@kernel.org, Neil Armstrong , linux-clk@vger.kernel.org, khilman@baylibre.com, linux-kernel@vger.kernel.org, linux-amlogic@lists.infradead.org, linux-arm-kernel@lists.infradead.org Subject: Re: [PATCH RFC v1 3/3] clk: meson: pll: switch to determine_rate for the PLL ops In-reply-to: Message-ID: <1j1ra2dajh.fsf@starbuckisacylon.baylibre.com> Date: Wed, 19 May 2021 17:10:26 +0200 MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20210519_081028_876025_D93305EA X-CRM114-Status: GOOD ( 16.21 ) X-BeenThere: linux-amlogic@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-amlogic" Errors-To: linux-amlogic-bounces+linux-amlogic=archiver.kernel.org@lists.infradead.org On Tue 18 May 2021 at 22:17, Martin Blumenstingl wrote: > Hi Jerome, > > On Tue, May 18, 2021 at 9:50 AM Jerome Brunet wrote: >> >> >> On Mon 17 May 2021 at 22:37, Martin Blumenstingl wrote: >> >> > This increases the maxmium supported frequency on 32-bit systems from >> > 2^31 (signed long as used by clk_ops.round_rate, maximum value: >> > approx. 2.14GHz) to 2^32 (unsigned long as used by >> > clk_ops.determine_rate, maximum value: approx. 4.29GHz). >> > On Meson8/8b/8m2 the HDMI PLL and it's OD (post-dividers) are >> > capable of running at up to 2.97GHz. So switch the divider >> > implementation in clk-regmap to clk_ops.determine_rate to support these >> > higher frequencies on 32-bit systems. >> > >> > Signed-off-by: Martin Blumenstingl >> >> Looks good. I see no reason to keep this one as RFC. > Great, thanks for checking! > >> I can take it directly if this is OK with you ? > That would be amazing. > Obviously no objections from my side :-) > > > Best regards, > Martin Applied then. Thx _______________________________________________ linux-amlogic mailing list linux-amlogic@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-amlogic