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[82.243.161.21]) by smtp.gmail.com with ESMTPSA id b17sm6464442wrp.49.2019.12.12.07.48.19 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 12 Dec 2019 07:48:19 -0800 (PST) References: <20191208180525.1076152-1-martin.blumenstingl@googlemail.com> User-agent: mu4e 1.3.3; emacs 26.3 From: Jerome Brunet To: Martin Blumenstingl , linux-amlogic@lists.infradead.org, khilman@baylibre.com Cc: linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Subject: Re: [PATCH 0/3] ARM: dts: meson: clock updates In-reply-to: <20191208180525.1076152-1-martin.blumenstingl@googlemail.com> Date: Thu, 12 Dec 2019 16:48:18 +0100 Message-ID: <1j8snhbl4t.fsf@starbuckisacylon.baylibre.com> MIME-Version: 1.0 Content-Type: text/plain Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Sun 08 Dec 2019 at 19:05, Martin Blumenstingl wrote: > This series moves the XTAL clock out of the main (HHI) clock controller > because it's an actual dedicated crystal on the PCBs. > > The last two patches add the DDR clock controller whose output is used > as input for some of the audio clocks. > > > Dependencies: > - patch #1 has a runtime dependency on my other series: > "provide the XTAL clock via OF on Meson8/8b/8m2" [0] > Jerome has already queued this for v5.6 > - patches #2 and #3 have a compile time dependency on my other series: > "add the DDR clock controller on Meson8 and Meson8b" [1] > Jerome has already queued this for v5.6, but you need an immutable > tag for the dt-bindings Bindings tag clk-meson-dt-v5.6-1 available with the necessary ids branch v5.6/drivers with the actual driver changes > > > Jerome: can you please rebase the v5.6/dt branch tomorrow on top of > v5.6-rc1 and provide a tag so Kevin can apply this series? > > > [0] https://patchwork.kernel.org/cover/11248377/ > [1] https://patchwork.kernel.org/cover/11248423/ > > > Martin Blumenstingl (3): > ARM: dts: meson: provide the XTAL clock using a fixed-clock > ARM: dts: meson8: add the DDR clock controller > ARM: dts: meson8b: add the DDR clock controller > > arch/arm/boot/dts/meson.dtsi | 7 +++++++ > arch/arm/boot/dts/meson6.dtsi | 7 ------- > arch/arm/boot/dts/meson8.dtsi | 24 +++++++++++++++++------- > arch/arm/boot/dts/meson8b-ec100.dts | 2 +- > arch/arm/boot/dts/meson8b-mxq.dts | 2 +- > arch/arm/boot/dts/meson8b-odroidc1.dts | 2 +- > arch/arm/boot/dts/meson8b.dtsi | 24 +++++++++++++++++------- > 7 files changed, 44 insertions(+), 24 deletions(-) From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-0.8 required=3.0 tests=DKIMWL_WL_HIGH,DKIM_SIGNED, DKIM_VALID,HEADER_FROM_DIFFERENT_DOMAINS,MAILING_LIST_MULTI,SPF_HELO_NONE, SPF_PASS autolearn=no autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 69037C43603 for ; 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[82.243.161.21]) by smtp.gmail.com with ESMTPSA id b17sm6464442wrp.49.2019.12.12.07.48.19 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 12 Dec 2019 07:48:19 -0800 (PST) References: <20191208180525.1076152-1-martin.blumenstingl@googlemail.com> User-agent: mu4e 1.3.3; emacs 26.3 From: Jerome Brunet To: Martin Blumenstingl , linux-amlogic@lists.infradead.org, khilman@baylibre.com Subject: Re: [PATCH 0/3] ARM: dts: meson: clock updates In-reply-to: <20191208180525.1076152-1-martin.blumenstingl@googlemail.com> Date: Thu, 12 Dec 2019 16:48:18 +0100 Message-ID: <1j8snhbl4t.fsf@starbuckisacylon.baylibre.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20191212_074821_617007_39D61C5A X-CRM114-Status: GOOD ( 14.14 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+infradead-linux-arm-kernel=archiver.kernel.org@lists.infradead.org On Sun 08 Dec 2019 at 19:05, Martin Blumenstingl wrote: > This series moves the XTAL clock out of the main (HHI) clock controller > because it's an actual dedicated crystal on the PCBs. > > The last two patches add the DDR clock controller whose output is used > as input for some of the audio clocks. > > > Dependencies: > - patch #1 has a runtime dependency on my other series: > "provide the XTAL clock via OF on Meson8/8b/8m2" [0] > Jerome has already queued this for v5.6 > - patches #2 and #3 have a compile time dependency on my other series: > "add the DDR clock controller on Meson8 and Meson8b" [1] > Jerome has already queued this for v5.6, but you need an immutable > tag for the dt-bindings Bindings tag clk-meson-dt-v5.6-1 available with the necessary ids branch v5.6/drivers with the actual driver changes > > > Jerome: can you please rebase the v5.6/dt branch tomorrow on top of > v5.6-rc1 and provide a tag so Kevin can apply this series? > > > [0] https://patchwork.kernel.org/cover/11248377/ > [1] https://patchwork.kernel.org/cover/11248423/ > > > Martin Blumenstingl (3): > ARM: dts: meson: provide the XTAL clock using a fixed-clock > ARM: dts: meson8: add the DDR clock controller > ARM: dts: meson8b: add the DDR clock controller > > arch/arm/boot/dts/meson.dtsi | 7 +++++++ > arch/arm/boot/dts/meson6.dtsi | 7 ------- > arch/arm/boot/dts/meson8.dtsi | 24 +++++++++++++++++------- > arch/arm/boot/dts/meson8b-ec100.dts | 2 +- > arch/arm/boot/dts/meson8b-mxq.dts | 2 +- > arch/arm/boot/dts/meson8b-odroidc1.dts | 2 +- > arch/arm/boot/dts/meson8b.dtsi | 24 +++++++++++++++++------- > 7 files changed, 44 insertions(+), 24 deletions(-) _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-0.8 required=3.0 tests=DKIMWL_WL_HIGH,DKIM_SIGNED, DKIM_VALID,HEADER_FROM_DIFFERENT_DOMAINS,MAILING_LIST_MULTI,SPF_HELO_NONE, SPF_PASS autolearn=no autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 01AADC43603 for ; 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[82.243.161.21]) by smtp.gmail.com with ESMTPSA id b17sm6464442wrp.49.2019.12.12.07.48.19 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 12 Dec 2019 07:48:19 -0800 (PST) References: <20191208180525.1076152-1-martin.blumenstingl@googlemail.com> User-agent: mu4e 1.3.3; emacs 26.3 From: Jerome Brunet To: Martin Blumenstingl , linux-amlogic@lists.infradead.org, khilman@baylibre.com Subject: Re: [PATCH 0/3] ARM: dts: meson: clock updates In-reply-to: <20191208180525.1076152-1-martin.blumenstingl@googlemail.com> Date: Thu, 12 Dec 2019 16:48:18 +0100 Message-ID: <1j8snhbl4t.fsf@starbuckisacylon.baylibre.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20191212_074821_620955_45767F8C X-CRM114-Status: GOOD ( 12.56 ) X-BeenThere: linux-amlogic@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-amlogic" Errors-To: linux-amlogic-bounces+linux-amlogic=archiver.kernel.org@lists.infradead.org On Sun 08 Dec 2019 at 19:05, Martin Blumenstingl wrote: > This series moves the XTAL clock out of the main (HHI) clock controller > because it's an actual dedicated crystal on the PCBs. > > The last two patches add the DDR clock controller whose output is used > as input for some of the audio clocks. > > > Dependencies: > - patch #1 has a runtime dependency on my other series: > "provide the XTAL clock via OF on Meson8/8b/8m2" [0] > Jerome has already queued this for v5.6 > - patches #2 and #3 have a compile time dependency on my other series: > "add the DDR clock controller on Meson8 and Meson8b" [1] > Jerome has already queued this for v5.6, but you need an immutable > tag for the dt-bindings Bindings tag clk-meson-dt-v5.6-1 available with the necessary ids branch v5.6/drivers with the actual driver changes > > > Jerome: can you please rebase the v5.6/dt branch tomorrow on top of > v5.6-rc1 and provide a tag so Kevin can apply this series? > > > [0] https://patchwork.kernel.org/cover/11248377/ > [1] https://patchwork.kernel.org/cover/11248423/ > > > Martin Blumenstingl (3): > ARM: dts: meson: provide the XTAL clock using a fixed-clock > ARM: dts: meson8: add the DDR clock controller > ARM: dts: meson8b: add the DDR clock controller > > arch/arm/boot/dts/meson.dtsi | 7 +++++++ > arch/arm/boot/dts/meson6.dtsi | 7 ------- > arch/arm/boot/dts/meson8.dtsi | 24 +++++++++++++++++------- > arch/arm/boot/dts/meson8b-ec100.dts | 2 +- > arch/arm/boot/dts/meson8b-mxq.dts | 2 +- > arch/arm/boot/dts/meson8b-odroidc1.dts | 2 +- > arch/arm/boot/dts/meson8b.dtsi | 24 +++++++++++++++++------- > 7 files changed, 44 insertions(+), 24 deletions(-) _______________________________________________ linux-amlogic mailing list linux-amlogic@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-amlogic