From mboxrd@z Thu Jan 1 00:00:00 1970 From: Juergen Beisert Date: Fri, 18 Jul 2003 14:11:30 +0200 Subject: [U-Boot-Users] Debugging u-boot with BDI2000 In-Reply-To: <200307181321.29058.jbeisert@eurodsn.de> References: <200307181321.29058.jbeisert@eurodsn.de> Message-ID: <200307181411.30216.jbeisert@eurodsn.de> List-Id: MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit To: u-boot@lists.denx.de I have wrote > With "reset halt", "info" I see the CPU waiting at address 0xFFFF'FFFC, > after one single step ("ti") it waits at address 0xFFFF'C0100. Seems ok. Uuups. One 'F' to much. The cpu waits at 0xFFFC'0100 after the first step. -- JB